Fixed some bugs in register stack pass.

[llvm/zpu.git] / test / CodeGen / X86 / sse-align-11.ll

; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin8 | grep movaps
; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-linux-gnu | grep movups

define <4 x float> @foo(float %a, float %b, float %c, float %d) nounwind {
entry:
        %tmp6 = insertelement <4 x float> undef, float %a, i32 0               
        %tmp7 = insertelement <4 x float> %tmp6, float %b, i32 1               
        %tmp8 = insertelement <4 x float> %tmp7, float %c, i32 2               
        %tmp9 = insertelement <4 x float> %tmp8, float %d, i32 3               
        ret <4 x float> %tmp9
}