Fixed some bugs in register stack pass.

[llvm/zpu.git] / test / CodeGen / X86 / vec_set-A.ll

; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {movl.*\$1, %}
define <2 x i64> @test1() nounwind {
entry:
        ret <2 x i64> < i64 1, i64 0 >
}