lib/Target/ZPU/ZPURegisterInfo.cpp

   1 //===- ZPURegisterInfo.cpp - ZPU Register Information -== -----*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the ZPU implementation of the TargetRegisterInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #define DEBUG_TYPE "ZPU-reg-info"
  15
  16 #include "ZPU.h"
  17 #include "ZPURegisterInfo.h"
  18 #include "llvm/Constants.h"
  19 #include "llvm/Type.h"
  20 #include "llvm/Function.h"
  21 #include "llvm/CodeGen/ValueTypes.h"
  22 #include "llvm/CodeGen/MachineInstrBuilder.h"
  23 #include "llvm/CodeGen/MachineFunction.h"
  24 #include "llvm/CodeGen/MachineFrameInfo.h"
  25 #include "llvm/CodeGen/MachineLocation.h"
  26 #include "llvm/Target/TargetFrameInfo.h"
  27 #include "llvm/Target/TargetMachine.h"
  28 #include "llvm/Target/TargetOptions.h"
  29 #include "llvm/Target/TargetInstrInfo.h"
  30 #include "llvm/Support/CommandLine.h"
  31 #include "llvm/Support/Debug.h"
  32 #include "llvm/Support/ErrorHandling.h"
  33 #include "llvm/Support/raw_ostream.h"
  34 #include "llvm/ADT/BitVector.h"
  35 #include "llvm/ADT/STLExtras.h"
  36
  37 using namespace llvm;
  38
  39 ZPURegisterInfo::ZPURegisterInfo(const TargetInstrInfo &tii) :
  40                 ZPUGenRegisterInfo(),
  41                 TII(tii)
  42 {
  43 }
  44
  45 /// getRegisterNumbering - Given the enum value for some register, e.g.
  46 /// ZPU::RA, return the number that it corresponds to (e.g. 31).
  47 unsigned ZPURegisterInfo::
  48 getRegisterNumbering(unsigned RegEnum)
  49 {
  50   switch (RegEnum) {
  51   case ZPU::SP   : return 0;
  52   case ZPU::PC   : return 1;
  53     default: llvm_unreachable("Unknown register number!");
  54   }
  55   return 0; // Not reached
  56 }
  57
  58 //===----------------------------------------------------------------------===//
  59 // Callee Saved Registers methods
  60 //===----------------------------------------------------------------------===//
  61
  62 BitVector ZPURegisterInfo::
  63 getReservedRegs(const MachineFunction &MF) const
  64 {
  65   BitVector Reserved(getNumRegs());
  66   Reserved.set(ZPU::PC);
  67   Reserved.set(ZPU::SP);
  68   Reserved.set(ZPU::FP);
  69   Reserved.set(ZPU::RETVAL);
  70
  71   return Reserved;
  72 }
  73
  74
  75 bool ZPURegisterInfo::
  76 hasFP(const MachineFunction &MF) const {
  77   return false;
  78 }
  79
  80
  81 void ZPURegisterInfo::
  82 emitPrologue(MachineFunction &MF) const
  83 {
  84 #if 0
  85   MachineBasicBlock &MBB   = MF.front();
  86   MachineFrameInfo *MFI    = MF.getFrameInfo();
  87   ZPUFunctionInfo *ZPUFI = MF.getInfo<ZPUFunctionInfo>();
  88   MachineBasicBlock::iterator MBBI = MBB.begin();
  89   DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
  90   bool isPIC = (MF.getTarget().getRelocationModel() == Reloc::PIC_);
  91
  92   // Get the right frame order for ZPU.
  93   adjustZPUStackFrame(MF);
  94
  95   // Get the number of bytes to allocate from the FrameInfo.
  96   unsigned StackSize = MFI->getStackSize();
  97
  98   // No need to allocate space on the stack.
  99   if (StackSize == 0 && !MFI->adjustsStack()) return;
 100
 101   int FPOffset = ZPUFI->getFPStackOffset();
 102   int RAOffset = ZPUFI->getRAStackOffset();
 103
 104   BuildMI(MBB, MBBI, dl, TII.get(ZPU::NOREORDER));
 105
 106   // Adjust stack : addi sp, sp, (-imm)
 107   BuildMI(MBB, MBBI, dl, TII.get(ZPU::ADDiu), ZPU::SP)
 108       .addReg(ZPU::SP).addImm(-StackSize);
 109
 110   // Save the return address only if the function isnt a leaf one.
 111   // sw  $ra, stack_loc($sp)
 112   if (MFI->adjustsStack()) {
 113     BuildMI(MBB, MBBI, dl, TII.get(ZPU::SW))
 114         .addReg(ZPU::RA).addImm(RAOffset).addReg(ZPU::SP);
 115   }
 116 #endif
 117 }
 118
 119 void ZPURegisterInfo::
 120 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
 121 {
 122 #if 0
 123   MachineBasicBlock::iterator MBBI = prior(MBB.end());
 124   MachineFrameInfo *MFI            = MF.getFrameInfo();
 125   ZPUFunctionInfo *ZPUFI         = MF.getInfo<ZPUFunctionInfo>();
 126   DebugLoc dl = MBBI->getDebugLoc();
 127
 128   // Get the number of bytes from FrameInfo
 129   int NumBytes = (int) MFI->getStackSize();
 130
 131   // adjust stack  : insert addi sp, sp, (imm)
 132   if (NumBytes) {
 133     BuildMI(MBB, MBBI, dl, TII.get(ZPU::ADDiu), ZPU::SP)
 134       .addReg(ZPU::SP).addImm(NumBytes);
 135   }
 136 #endif
 137 }
 138
 139
 140 int ZPURegisterInfo::
 141 getDwarfRegNum(unsigned RegNum, bool isEH) const {
 142   llvm_unreachable("What is the dwarf register number");
 143   return -1;
 144 }
 145
 146
 147 unsigned ZPURegisterInfo::
 148 getFrameRegister(const MachineFunction &MF) const
 149 {
 150           return ZPU::FP;
 151 }
 152
 153 void ZPURegisterInfo::
 154 eliminateFrameIndex(MachineBasicBlock::iterator II,
 155                            int SPAdj, RegScavenger *RS) const
 156 {
 157           assert(SPAdj == 0 && "Unxpected");
 158
 159           unsigned i = 0;
 160           MachineInstr &MI = *II;
 161           MachineFunction &MF = *MI.getParent()->getParent();
 162           while (!MI.getOperand(i).isFI()) {
 163             ++i;
 164             assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
 165           }
 166
 167           int FrameIndex = MI.getOperand(i).getIndex();
 168
 169           unsigned BasePtr = ZPU::SP;
 170
 171           // This must be part of a rri or ri operand memory reference.  Replace the
 172           // FrameIndex with base register with BasePtr.  Add an offset to the
 173           // displacement field.
 174           MI.getOperand(i).ChangeToRegister(BasePtr, false);
 175
 176           // Offset is a either 12-bit unsigned or 20-bit signed integer.
 177           // FIXME: handle "too long" displacements.
 178           int Offset =
 179             getFrameIndexOffset(MF, FrameIndex) + MI.getOperand(i+1).getImm();
 180
 181           // Check whether displacement is too long to fit into 12 bit zext field.
 182           MI.setDesc(TII.get(MI.getOpcode()));
 183
 184           MI.getOperand(i+1).ChangeToImmediate(Offset);
 185 }
 186
 187 unsigned ZPURegisterInfo::
 188 getRARegister() const
 189 {
 190    llvm_unreachable("ZPU does not have a return address register");
 191    return 0;
 192 }
 193
 194 ZPURegisterInfo::~ZPURegisterInfo()
 195 {
 196
 197 }
 198
 199 const unsigned* ZPURegisterInfo::
 200 getCalleeSavedRegs(const MachineFunction *MF) const
 201 {
 202   static const unsigned none[] = {0};
 203
 204  return none;
 205 }
 206
 207 #include "ZPUGenRegisterInfo.inc"
 208