zpu: first sign of being able to build a .S file
[llvm/zpu.git] / utils / TableGen / TableGen.cpp
blob0bf64605b46b55d17be3bcc59d4aeec9b22c8415
1 //===- TableGen.cpp - Top-Level TableGen implementation -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // TableGen is a tool which can be used to build up a description of something,
11 // then invoke one or more "tablegen backends" to emit information about the
12 // description in some predefined format. In practice, this is used by the LLVM
13 // code generators to automate generation of a code generator through a
14 // high-level description of the target.
16 //===----------------------------------------------------------------------===//
18 #include "AsmMatcherEmitter.h"
19 #include "AsmWriterEmitter.h"
20 #include "CallingConvEmitter.h"
21 #include "ClangASTNodesEmitter.h"
22 #include "ClangAttrEmitter.h"
23 #include "ClangDiagnosticsEmitter.h"
24 #include "CodeEmitterGen.h"
25 #include "DAGISelEmitter.h"
26 #include "DisassemblerEmitter.h"
27 #include "EDEmitter.h"
28 #include "FastISelEmitter.h"
29 #include "InstrEnumEmitter.h"
30 #include "InstrInfoEmitter.h"
31 #include "IntrinsicEmitter.h"
32 #include "LLVMCConfigurationEmitter.h"
33 #include "NeonEmitter.h"
34 #include "OptParserEmitter.h"
35 #include "Record.h"
36 #include "RegisterInfoEmitter.h"
37 #include "ARMDecoderEmitter.h"
38 #include "SubtargetEmitter.h"
39 #include "TGParser.h"
40 #include "llvm/Support/CommandLine.h"
41 #include "llvm/Support/MemoryBuffer.h"
42 #include "llvm/Support/PrettyStackTrace.h"
43 #include "llvm/Support/ToolOutputFile.h"
44 #include "llvm/System/Signals.h"
45 #include <algorithm>
46 #include <cstdio>
47 using namespace llvm;
49 enum ActionType {
50 PrintRecords,
51 GenEmitter,
52 GenRegisterEnums, GenRegister, GenRegisterHeader,
53 GenInstrEnums, GenInstrs, GenAsmWriter, GenAsmMatcher,
54 GenARMDecoder,
55 GenDisassembler,
56 GenCallingConv,
57 GenClangAttrClasses,
58 GenClangAttrImpl,
59 GenClangAttrList,
60 GenClangAttrPCHRead,
61 GenClangAttrPCHWrite,
62 GenClangAttrSpellingList,
63 GenClangDiagsDefs,
64 GenClangDiagGroups,
65 GenClangDeclNodes,
66 GenClangStmtNodes,
67 GenDAGISel,
68 GenFastISel,
69 GenOptParserDefs, GenOptParserImpl,
70 GenSubtarget,
71 GenIntrinsic,
72 GenTgtIntrinsic,
73 GenLLVMCConf,
74 GenEDInfo,
75 GenArmNeon,
76 GenArmNeonSema,
77 PrintEnums
80 namespace {
81 cl::opt<ActionType>
82 Action(cl::desc("Action to perform:"),
83 cl::values(clEnumValN(PrintRecords, "print-records",
84 "Print all records to stdout (default)"),
85 clEnumValN(GenEmitter, "gen-emitter",
86 "Generate machine code emitter"),
87 clEnumValN(GenRegisterEnums, "gen-register-enums",
88 "Generate enum values for registers"),
89 clEnumValN(GenRegister, "gen-register-desc",
90 "Generate a register info description"),
91 clEnumValN(GenRegisterHeader, "gen-register-desc-header",
92 "Generate a register info description header"),
93 clEnumValN(GenInstrEnums, "gen-instr-enums",
94 "Generate enum values for instructions"),
95 clEnumValN(GenInstrs, "gen-instr-desc",
96 "Generate instruction descriptions"),
97 clEnumValN(GenCallingConv, "gen-callingconv",
98 "Generate calling convention descriptions"),
99 clEnumValN(GenAsmWriter, "gen-asm-writer",
100 "Generate assembly writer"),
101 clEnumValN(GenARMDecoder, "gen-arm-decoder",
102 "Generate decoders for ARM/Thumb"),
103 clEnumValN(GenDisassembler, "gen-disassembler",
104 "Generate disassembler"),
105 clEnumValN(GenAsmMatcher, "gen-asm-matcher",
106 "Generate assembly instruction matcher"),
107 clEnumValN(GenDAGISel, "gen-dag-isel",
108 "Generate a DAG instruction selector"),
109 clEnumValN(GenFastISel, "gen-fast-isel",
110 "Generate a \"fast\" instruction selector"),
111 clEnumValN(GenOptParserDefs, "gen-opt-parser-defs",
112 "Generate option definitions"),
113 clEnumValN(GenOptParserImpl, "gen-opt-parser-impl",
114 "Generate option parser implementation"),
115 clEnumValN(GenSubtarget, "gen-subtarget",
116 "Generate subtarget enumerations"),
117 clEnumValN(GenIntrinsic, "gen-intrinsic",
118 "Generate intrinsic information"),
119 clEnumValN(GenTgtIntrinsic, "gen-tgt-intrinsic",
120 "Generate target intrinsic information"),
121 clEnumValN(GenClangAttrClasses, "gen-clang-attr-classes",
122 "Generate clang attribute clases"),
123 clEnumValN(GenClangAttrImpl, "gen-clang-attr-impl",
124 "Generate clang attribute implementations"),
125 clEnumValN(GenClangAttrList, "gen-clang-attr-list",
126 "Generate a clang attribute list"),
127 clEnumValN(GenClangAttrPCHRead, "gen-clang-attr-pch-read",
128 "Generate clang PCH attribute reader"),
129 clEnumValN(GenClangAttrPCHWrite, "gen-clang-attr-pch-write",
130 "Generate clang PCH attribute writer"),
131 clEnumValN(GenClangAttrSpellingList, "gen-clang-attr-spelling-list",
132 "Generate a clang attribute spelling list"),
133 clEnumValN(GenClangDiagsDefs, "gen-clang-diags-defs",
134 "Generate Clang diagnostics definitions"),
135 clEnumValN(GenClangDiagGroups, "gen-clang-diag-groups",
136 "Generate Clang diagnostic groups"),
137 clEnumValN(GenClangDeclNodes, "gen-clang-decl-nodes",
138 "Generate Clang AST statement nodes"),
139 clEnumValN(GenClangStmtNodes, "gen-clang-stmt-nodes",
140 "Generate Clang AST statement nodes"),
141 clEnumValN(GenLLVMCConf, "gen-llvmc",
142 "Generate LLVMC configuration library"),
143 clEnumValN(GenEDInfo, "gen-enhanced-disassembly-info",
144 "Generate enhanced disassembly info"),
145 clEnumValN(GenArmNeon, "gen-arm-neon",
146 "Generate arm_neon.h for clang"),
147 clEnumValN(GenArmNeonSema, "gen-arm-neon-sema",
148 "Generate ARM NEON sema support for clang"),
149 clEnumValN(PrintEnums, "print-enums",
150 "Print enum values for a class"),
151 clEnumValEnd));
153 cl::opt<std::string>
154 Class("class", cl::desc("Print Enum list for this class"),
155 cl::value_desc("class name"));
157 cl::opt<std::string>
158 OutputFilename("o", cl::desc("Output filename"), cl::value_desc("filename"),
159 cl::init("-"));
161 cl::opt<std::string>
162 InputFilename(cl::Positional, cl::desc("<input file>"), cl::init("-"));
164 cl::list<std::string>
165 IncludeDirs("I", cl::desc("Directory of include files"),
166 cl::value_desc("directory"), cl::Prefix);
168 cl::opt<std::string>
169 ClangComponent("clang-component",
170 cl::desc("Only use warnings from specified component"),
171 cl::value_desc("component"), cl::Hidden);
175 // FIXME: Eliminate globals from tblgen.
176 RecordKeeper llvm::Records;
178 static SourceMgr SrcMgr;
180 void llvm::PrintError(SMLoc ErrorLoc, const Twine &Msg) {
181 SrcMgr.PrintMessage(ErrorLoc, Msg, "error");
186 /// ParseFile - this function begins the parsing of the specified tablegen
187 /// file.
188 static bool ParseFile(const std::string &Filename,
189 const std::vector<std::string> &IncludeDirs,
190 SourceMgr &SrcMgr) {
191 std::string ErrorStr;
192 MemoryBuffer *F = MemoryBuffer::getFileOrSTDIN(Filename.c_str(), &ErrorStr);
193 if (F == 0) {
194 errs() << "Could not open input file '" << Filename << "': "
195 << ErrorStr <<"\n";
196 return true;
199 // Tell SrcMgr about this buffer, which is what TGParser will pick up.
200 SrcMgr.AddNewSourceBuffer(F, SMLoc());
202 // Record the location of the include directory so that the lexer can find
203 // it later.
204 SrcMgr.setIncludeDirs(IncludeDirs);
206 TGParser Parser(SrcMgr);
208 return Parser.ParseFile();
211 int main(int argc, char **argv) {
212 sys::PrintStackTraceOnErrorSignal();
213 PrettyStackTraceProgram X(argc, argv);
214 cl::ParseCommandLineOptions(argc, argv);
217 // Parse the input file.
218 if (ParseFile(InputFilename, IncludeDirs, SrcMgr))
219 return 1;
221 std::string Error;
222 tool_output_file Out(OutputFilename.c_str(), Error);
223 if (!Error.empty()) {
224 errs() << argv[0] << ": error opening " << OutputFilename
225 << ":" << Error << "\n";
226 return 1;
229 try {
230 switch (Action) {
231 case PrintRecords:
232 Out.os() << Records; // No argument, dump all contents
233 break;
234 case GenEmitter:
235 CodeEmitterGen(Records).run(Out.os());
236 break;
238 case GenRegisterEnums:
239 RegisterInfoEmitter(Records).runEnums(Out.os());
240 break;
241 case GenRegister:
242 RegisterInfoEmitter(Records).run(Out.os());
243 break;
244 case GenRegisterHeader:
245 RegisterInfoEmitter(Records).runHeader(Out.os());
246 break;
247 case GenInstrEnums:
248 InstrEnumEmitter(Records).run(Out.os());
249 break;
250 case GenInstrs:
251 InstrInfoEmitter(Records).run(Out.os());
252 break;
253 case GenCallingConv:
254 CallingConvEmitter(Records).run(Out.os());
255 break;
256 case GenAsmWriter:
257 AsmWriterEmitter(Records).run(Out.os());
258 break;
259 case GenARMDecoder:
260 ARMDecoderEmitter(Records).run(Out.os());
261 break;
262 case GenAsmMatcher:
263 AsmMatcherEmitter(Records).run(Out.os());
264 break;
265 case GenClangAttrClasses:
266 ClangAttrClassEmitter(Records).run(Out.os());
267 break;
268 case GenClangAttrImpl:
269 ClangAttrImplEmitter(Records).run(Out.os());
270 break;
271 case GenClangAttrList:
272 ClangAttrListEmitter(Records).run(Out.os());
273 break;
274 case GenClangAttrPCHRead:
275 ClangAttrPCHReadEmitter(Records).run(Out.os());
276 break;
277 case GenClangAttrPCHWrite:
278 ClangAttrPCHWriteEmitter(Records).run(Out.os());
279 break;
280 case GenClangAttrSpellingList:
281 ClangAttrSpellingListEmitter(Records).run(Out.os());
282 break;
283 case GenClangDiagsDefs:
284 ClangDiagsDefsEmitter(Records, ClangComponent).run(Out.os());
285 break;
286 case GenClangDiagGroups:
287 ClangDiagGroupsEmitter(Records).run(Out.os());
288 break;
289 case GenClangDeclNodes:
290 ClangASTNodesEmitter(Records, "Decl", "Decl").run(Out.os());
291 ClangDeclContextEmitter(Records).run(Out.os());
292 break;
293 case GenClangStmtNodes:
294 ClangASTNodesEmitter(Records, "Stmt", "").run(Out.os());
295 break;
296 case GenDisassembler:
297 DisassemblerEmitter(Records).run(Out.os());
298 break;
299 case GenOptParserDefs:
300 OptParserEmitter(Records, true).run(Out.os());
301 break;
302 case GenOptParserImpl:
303 OptParserEmitter(Records, false).run(Out.os());
304 break;
305 case GenDAGISel:
306 DAGISelEmitter(Records).run(Out.os());
307 break;
308 case GenFastISel:
309 FastISelEmitter(Records).run(Out.os());
310 break;
311 case GenSubtarget:
312 SubtargetEmitter(Records).run(Out.os());
313 break;
314 case GenIntrinsic:
315 IntrinsicEmitter(Records).run(Out.os());
316 break;
317 case GenTgtIntrinsic:
318 IntrinsicEmitter(Records, true).run(Out.os());
319 break;
320 case GenLLVMCConf:
321 LLVMCConfigurationEmitter(Records).run(Out.os());
322 break;
323 case GenEDInfo:
324 EDEmitter(Records).run(Out.os());
325 break;
326 case GenArmNeon:
327 NeonEmitter(Records).run(Out.os());
328 break;
329 case GenArmNeonSema:
330 NeonEmitter(Records).runHeader(Out.os());
331 break;
332 case PrintEnums:
334 std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);
335 for (unsigned i = 0, e = Recs.size(); i != e; ++i)
336 Out.os() << Recs[i]->getName() << ", ";
337 Out.os() << "\n";
338 break;
340 default:
341 assert(1 && "Invalid Action");
342 return 1;
345 // Declare success.
346 Out.keep();
347 return 0;
349 } catch (const TGError &Error) {
350 errs() << argv[0] << ": error:\n";
351 PrintError(Error.getLoc(), Error.getMessage());
353 } catch (const std::string &Error) {
354 errs() << argv[0] << ": " << Error << "\n";
355 } catch (const char *Error) {
356 errs() << argv[0] << ": " << Error << "\n";
357 } catch (...) {
358 errs() << argv[0] << ": Unknown unexpected exception occurred.\n";
361 return 1;