zpu: wip eke out some simple instructions for load/store/add
[llvm/zpu.git] / lib / Target / PTX / PTXISelLowering.h
blob68badf538cebde15413df4621c9df8ddc3e3acce
1 //==-- PTXISelLowering.h - PTX DAG Lowering Interface ------------*- C++ -*-==//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the interfaces that PTX uses to lower LLVM code into a
11 // selection DAG.
13 //===----------------------------------------------------------------------===//
15 #ifndef PTX_ISEL_LOWERING_H
16 #define PTX_ISEL_LOWERING_H
18 #include "llvm/Target/TargetLowering.h"
20 namespace llvm {
21 class PTXSubtarget;
22 class PTXTargetMachine;
24 namespace PTXISD {
25 enum NodeType {
26 FIRST_NUMBER = ISD::BUILTIN_OP_END,
27 EXIT,
28 RET
30 } // namespace PTXISD
32 class PTXTargetLowering : public TargetLowering {
33 public:
34 explicit PTXTargetLowering(TargetMachine &TM);
36 virtual const char *getTargetNodeName(unsigned Opcode) const;
38 virtual unsigned getFunctionAlignment(const Function *F) const {
39 return 2; }
41 virtual SDValue
42 LowerFormalArguments(SDValue Chain,
43 CallingConv::ID CallConv,
44 bool isVarArg,
45 const SmallVectorImpl<ISD::InputArg> &Ins,
46 DebugLoc dl,
47 SelectionDAG &DAG,
48 SmallVectorImpl<SDValue> &InVals) const;
50 virtual SDValue
51 LowerReturn(SDValue Chain,
52 CallingConv::ID CallConv,
53 bool isVarArg,
54 const SmallVectorImpl<ISD::OutputArg> &Outs,
55 const SmallVectorImpl<SDValue> &OutVals,
56 DebugLoc dl,
57 SelectionDAG &DAG) const;
58 }; // class PTXTargetLowering
59 } // namespace llvm
61 #endif // PTX_ISEL_LOWERING_H