lib/Target/PTX/PTXInstrInfo.cpp

   1 //===- PTXInstrInfo.cpp - PTX Instruction Information ---------------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the PTX implementation of the TargetInstrInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "PTX.h"
  15 #include "PTXInstrInfo.h"
  16 #include "llvm/CodeGen/MachineInstrBuilder.h"
  17
  18 using namespace llvm;
  19
  20 #include "PTXGenInstrInfo.inc"
  21
  22 PTXInstrInfo::PTXInstrInfo(PTXTargetMachine &_TM)
  23   : TargetInstrInfoImpl(PTXInsts, array_lengthof(PTXInsts)),
  24     RI(_TM, *this), TM(_TM) {}
  25
  26 static const struct map_entry {
  27   const TargetRegisterClass *cls;
  28   const int opcode;
  29 } map[] = {
  30   { &PTX::RRegs32RegClass, PTX::MOVrr },
  31   { &PTX::PredsRegClass,   PTX::MOVpp }
  32 };
  33
  34 void PTXInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
  35                                MachineBasicBlock::iterator I, DebugLoc DL,
  36                                unsigned DstReg, unsigned SrcReg,
  37                                bool KillSrc) const {
  38   for (int i = 0, e = sizeof(map)/sizeof(map[0]); i != e; ++ i)
  39     if (PTX::RRegs32RegClass.contains(DstReg, SrcReg)) {
  40       BuildMI(MBB, I, DL,
  41               get(PTX::MOVrr), DstReg).addReg(SrcReg, getKillRegState(KillSrc));
  42       return;
  43     }
  44
  45   llvm_unreachable("Impossible reg-to-reg copy");
  46 }
  47
  48 bool PTXInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
  49                                 MachineBasicBlock::iterator I,
  50                                 unsigned DstReg, unsigned SrcReg,
  51                                 const TargetRegisterClass *DstRC,
  52                                 const TargetRegisterClass *SrcRC,
  53                                 DebugLoc DL) const {
  54   if (DstRC != SrcRC)
  55     return false;
  56
  57   for (int i = 0, e = sizeof(map)/sizeof(map[0]); i != e; ++ i)
  58     if (DstRC == map[i].cls) {
  59       MachineInstr *MI = BuildMI(MBB, I, DL, get(map[i].opcode),
  60                                  DstReg).addReg(SrcReg);
  61       if (MI->findFirstPredOperandIdx() == -1) {
  62         MI->addOperand(MachineOperand::CreateReg(0, false));
  63         MI->addOperand(MachineOperand::CreateImm(/*IsInv=*/0));
  64       }
  65       return true;
  66     }
  67
  68   return false;
  69 }
  70
  71 bool PTXInstrInfo::isMoveInstr(const MachineInstr& MI,
  72                                unsigned &SrcReg, unsigned &DstReg,
  73                                unsigned &SrcSubIdx, unsigned &DstSubIdx) const {
  74   switch (MI.getOpcode()) {
  75     default:
  76       return false;
  77     case PTX::MOVpp:
  78     case PTX::MOVrr:
  79       assert(MI.getNumOperands() >= 2 &&
  80              MI.getOperand(0).isReg() && MI.getOperand(1).isReg() &&
  81              "Invalid register-register move instruction");
  82       SrcSubIdx = DstSubIdx = 0; // No sub-registers
  83       DstReg = MI.getOperand(0).getReg();
  84       SrcReg = MI.getOperand(1).getReg();
  85       return true;
  86   }
  87 }