lib/Target/ZPU/ZPUISelDAGToDAG.cpp

   1 //===-- ZPUISelDAGToDAG.cpp - A dag to dag inst selector for ZPU --------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines an instruction selector for the ZPU target.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #define DEBUG_TYPE "ZPU-isel"
  15 #include "ZPU.h"
  16 #include "ZPURegisterInfo.h"
  17 #include "ZPUTargetMachine.h"
  18 #include "llvm/GlobalValue.h"
  19 #include "llvm/Instructions.h"
  20 #include "llvm/Intrinsics.h"
  21 #include "llvm/Support/CFG.h"
  22 #include "llvm/Type.h"
  23 #include "llvm/CodeGen/MachineConstantPool.h"
  24 #include "llvm/CodeGen/MachineFunction.h"
  25 #include "llvm/CodeGen/MachineFrameInfo.h"
  26 #include "llvm/CodeGen/MachineInstrBuilder.h"
  27 #include "llvm/CodeGen/MachineRegisterInfo.h"
  28 #include "llvm/CodeGen/SelectionDAGISel.h"
  29 #include "llvm/Target/TargetMachine.h"
  30 #include "llvm/Support/Debug.h"
  31 #include "llvm/Support/ErrorHandling.h"
  32 #include "llvm/Support/raw_ostream.h"
  33 using namespace llvm;
  34
  35 //===----------------------------------------------------------------------===//
  36 // Instruction Selector Implementation
  37 //===----------------------------------------------------------------------===//
  38
  39 //===----------------------------------------------------------------------===//
  40 // ZPUDAGToDAGISel - ZPU specific code to select ZPU machine
  41 // instructions for SelectionDAG operations.
  42 //===----------------------------------------------------------------------===//
  43 namespace {
  44
  45 class ZPUDAGToDAGISel : public SelectionDAGISel {
  46
  47   /// TM - Keep a reference to ZPUTargetMachine.
  48   ZPUTargetMachine &TM;
  49
  50 public:
  51   explicit ZPUDAGToDAGISel(ZPUTargetMachine &tm) :
  52   SelectionDAGISel(tm),
  53   TM(tm) {}
  54
  55   // Pass Name
  56   virtual const char *getPassName() const {
  57     return "ZPU DAG->DAG Pattern Instruction Selection";
  58   }
  59
  60
  61 private:
  62   // Include the pieces autogenerated from the target description.
  63   #include "ZPUGenDAGISel.inc"
  64
  65   SDNode *SelectStore(SDNode *N);
  66   SDNode *SelectOperand(SDNode *N);
  67
  68   /// getTargetMachine - Return a reference to the TargetMachine, casted
  69   /// to the target-specific type.
  70   const ZPUTargetMachine &getTargetMachine() {
  71     return static_cast<const ZPUTargetMachine &>(TM);
  72   }
  73   SDNode *Select(SDNode *N);
  74
  75
  76   /// getInstrInfo - Return a reference to the TargetInstrInfo, casted
  77   /// to the target-specific type.
  78   const ZPUInstrInfo *getInstrInfo() {
  79     return getTargetMachine().getInstrInfo();
  80   }
  81   bool SelectAddr(SDValue N, SDValue &Out);
  82 };
  83
  84 SDNode *ZPUDAGToDAGISel::SelectOperand(SDNode *N) {
  85         return N;
  86 }
  87
  88 SDNode *ZPUDAGToDAGISel::SelectStore(SDNode *N) {
  89   StoreSDNode *SN = cast<StoreSDNode>(N);
  90
  91   SDValue value = N->getOperand(0);
  92 //  SDValue *address = N->getOperand(1);
  93
  94   return value.getNode();
  95 }
  96
  97
  98 /* Translate normal instructions into ZPU instructions */
  99 SDNode *ZPUDAGToDAGISel::Select(SDNode *N) {
 100   unsigned Opcode = N->getOpcode();
 101   DebugLoc dl = N->getDebugLoc();
 102
 103   // If we have a custom node, we already have selected!
 104   if (N->isMachineOpcode()) {
 105         return NULL;
 106   }
 107
 108 //  switch(Opcode) {
 109 //      default: break;
 110 //        case ISD::STORE:
 111 //          return SelectStore(N);
 112 //      }
 113
 114   return SelectCode(N);
 115 }
 116
 117 /// SelectAddr - returns true if it is able pattern match an addressing mode.
 118 /// It returns the operands which make up the maximal addressing mode it can
 119 /// match by reference.
 120 bool ZPUDAGToDAGISel::SelectAddr(SDValue N, SDValue &Out) {
 121   return true;
 122 }
 123
 124
 125 }
 126
 127 /// createZPUISelDag - This pass converts a legalized DAG into a
 128 /// ZPU-specific DAG, ready for instruction scheduling.
 129 FunctionPass *llvm::createZPUISelDag(ZPUTargetMachine &TM) {
 130   return new ZPUDAGToDAGISel(TM);
 131 }