lib/Target/ZPU/ZPURegisterInfo.cpp

   1 //===- ZPURegisterInfo.cpp - ZPU Register Information -== -----*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the ZPU implementation of the TargetRegisterInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #define DEBUG_TYPE "ZPU-reg-info"
  15
  16 #include "ZPU.h"
  17 #include "ZPURegisterInfo.h"
  18 #include "llvm/Constants.h"
  19 #include "llvm/Type.h"
  20 #include "llvm/Function.h"
  21 #include "llvm/CodeGen/ValueTypes.h"
  22 #include "llvm/CodeGen/MachineInstrBuilder.h"
  23 #include "llvm/CodeGen/MachineFunction.h"
  24 #include "llvm/CodeGen/MachineFrameInfo.h"
  25 #include "llvm/CodeGen/MachineLocation.h"
  26 #include "llvm/Target/TargetFrameInfo.h"
  27 #include "llvm/Target/TargetMachine.h"
  28 #include "llvm/Target/TargetOptions.h"
  29 #include "llvm/Target/TargetInstrInfo.h"
  30 #include "llvm/Support/CommandLine.h"
  31 #include "llvm/Support/Debug.h"
  32 #include "llvm/Support/ErrorHandling.h"
  33 #include "llvm/Support/raw_ostream.h"
  34 #include "llvm/ADT/BitVector.h"
  35 #include "llvm/ADT/STLExtras.h"
  36
  37 using namespace llvm;
  38
  39 ZPURegisterInfo::ZPURegisterInfo(const TargetInstrInfo &tii)
  40 {
  41 }
  42
  43 /// getRegisterNumbering - Given the enum value for some register, e.g.
  44 /// ZPU::RA, return the number that it corresponds to (e.g. 31).
  45 unsigned ZPURegisterInfo::
  46 getRegisterNumbering(unsigned RegEnum)
  47 {
  48   switch (RegEnum) {
  49   case ZPU::SP   : return 0;
  50   case ZPU::PC   : return 1;
  51     default: llvm_unreachable("Unknown register number!");
  52   }
  53   return 0; // Not reached
  54 }
  55
  56 //===----------------------------------------------------------------------===//
  57 // Callee Saved Registers methods
  58 //===----------------------------------------------------------------------===//
  59
  60 BitVector ZPURegisterInfo::
  61 getReservedRegs(const MachineFunction &MF) const
  62 {
  63   BitVector Reserved(getNumRegs());
  64   Reserved.set(ZPU::PC);
  65   Reserved.set(ZPU::SP);
  66   Reserved.set(ZPU::FP);
  67   Reserved.set(ZPU::RETVAL);
  68
  69   return Reserved;
  70 }
  71
  72
  73 bool ZPURegisterInfo::
  74 hasFP(const MachineFunction &MF) const {
  75   return false;
  76 }
  77
  78
  79 void ZPURegisterInfo::
  80 emitPrologue(MachineFunction &MF) const
  81 {
  82 #if 0
  83   MachineBasicBlock &MBB   = MF.front();
  84   MachineFrameInfo *MFI    = MF.getFrameInfo();
  85   ZPUFunctionInfo *ZPUFI = MF.getInfo<ZPUFunctionInfo>();
  86   MachineBasicBlock::iterator MBBI = MBB.begin();
  87   DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
  88   bool isPIC = (MF.getTarget().getRelocationModel() == Reloc::PIC_);
  89
  90   // Get the right frame order for ZPU.
  91   adjustZPUStackFrame(MF);
  92
  93   // Get the number of bytes to allocate from the FrameInfo.
  94   unsigned StackSize = MFI->getStackSize();
  95
  96   // No need to allocate space on the stack.
  97   if (StackSize == 0 && !MFI->adjustsStack()) return;
  98
  99   int FPOffset = ZPUFI->getFPStackOffset();
 100   int RAOffset = ZPUFI->getRAStackOffset();
 101
 102   BuildMI(MBB, MBBI, dl, TII.get(ZPU::NOREORDER));
 103
 104   // Adjust stack : addi sp, sp, (-imm)
 105   BuildMI(MBB, MBBI, dl, TII.get(ZPU::ADDiu), ZPU::SP)
 106       .addReg(ZPU::SP).addImm(-StackSize);
 107
 108   // Save the return address only if the function isnt a leaf one.
 109   // sw  $ra, stack_loc($sp)
 110   if (MFI->adjustsStack()) {
 111     BuildMI(MBB, MBBI, dl, TII.get(ZPU::SW))
 112         .addReg(ZPU::RA).addImm(RAOffset).addReg(ZPU::SP);
 113   }
 114 #endif
 115 }
 116
 117 void ZPURegisterInfo::
 118 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
 119 {
 120 #if 0
 121   MachineBasicBlock::iterator MBBI = prior(MBB.end());
 122   MachineFrameInfo *MFI            = MF.getFrameInfo();
 123   ZPUFunctionInfo *ZPUFI         = MF.getInfo<ZPUFunctionInfo>();
 124   DebugLoc dl = MBBI->getDebugLoc();
 125
 126   // Get the number of bytes from FrameInfo
 127   int NumBytes = (int) MFI->getStackSize();
 128
 129   // adjust stack  : insert addi sp, sp, (imm)
 130   if (NumBytes) {
 131     BuildMI(MBB, MBBI, dl, TII.get(ZPU::ADDiu), ZPU::SP)
 132       .addReg(ZPU::SP).addImm(NumBytes);
 133   }
 134 #endif
 135 }
 136
 137
 138 int ZPURegisterInfo::
 139 getDwarfRegNum(unsigned RegNum, bool isEH) const {
 140   llvm_unreachable("What is the dwarf register number");
 141   return -1;
 142 }
 143
 144
 145 unsigned ZPURegisterInfo::
 146 getFrameRegister(const MachineFunction &MF) const
 147 {
 148           return ZPU::FP;
 149 }
 150
 151 void ZPURegisterInfo::
 152 eliminateFrameIndex(MachineBasicBlock::iterator II,
 153                            int SPAdj, RegScavenger *RS) const
 154 {
 155 }
 156
 157 unsigned ZPURegisterInfo::
 158 getRARegister() const
 159 {
 160    llvm_unreachable("ZPU does not have a return address register");
 161    return 0;
 162 }
 163
 164 ZPURegisterInfo::~ZPURegisterInfo()
 165 {
 166
 167 }
 168
 169 const unsigned* ZPURegisterInfo::
 170 getCalleeSavedRegs(const MachineFunction *MF) const
 171 {
 172   static const unsigned none[] = {0};
 173
 174  return none;
 175 }
 176
 177 #include "ZPUGenRegisterInfo.inc"
 178