1 ; RUN: opt %s -sccp -S | FileCheck %s
5 define double @test1() {
6 %t = sitofp i32 undef to double
9 ; CHECK: ret double 0.0
14 ; Check that lots of stuff doesn't get turned into undef.
15 define i32 @test2() nounwind readnone ssp {
18 br label %control.outer.outer
20 control.outer.loopexit.us-lcssa: ; preds = %control
21 br label %control.outer.loopexit
23 control.outer.loopexit: ; preds = %control.outer.loopexit.us-lcssa.us, %control.outer.loopexit.us-lcssa
24 br label %control.outer.outer.backedge
26 control.outer.outer: ; preds = %control.outer.outer.backedge, %init
27 %switchCond.0.ph.ph = phi i32 [ 2, %init ], [ 3, %control.outer.outer.backedge ] ; <i32> [#uses=2]
28 %i.0.ph.ph = phi i32 [ undef, %init ], [ %i.0.ph.ph.be, %control.outer.outer.backedge ] ; <i32> [#uses=1]
29 %tmp4 = icmp eq i32 %i.0.ph.ph, 0 ; <i1> [#uses=1]
30 br i1 %tmp4, label %control.outer.outer.split.us, label %control.outer.outer.control.outer.outer.split_crit_edge
32 control.outer.outer.control.outer.outer.split_crit_edge: ; preds = %control.outer.outer
33 br label %control.outer
35 control.outer.outer.split.us: ; preds = %control.outer.outer
36 br label %control.outer.us
38 control.outer.us: ; preds = %bb3.us, %control.outer.outer.split.us
39 %A.0.ph.us = phi i32 [ %switchCond.0.us, %bb3.us ], [ 4, %control.outer.outer.split.us ] ; <i32> [#uses=2]
40 %switchCond.0.ph.us = phi i32 [ %A.0.ph.us, %bb3.us ], [ %switchCond.0.ph.ph, %control.outer.outer.split.us ] ; <i32> [#uses=1]
43 bb3.us: ; preds = %control.us
44 br label %control.outer.us
46 bb0.us: ; preds = %control.us
49 ; CHECK: control.us: ; preds = %bb0.us, %control.outer.us
50 ; CHECK-NEXT: %switchCond.0.us = phi i32
51 ; CHECK-NEXT: switch i32 %switchCond.0.us
52 control.us: ; preds = %bb0.us, %control.outer.us
53 %switchCond.0.us = phi i32 [ %A.0.ph.us, %bb0.us ], [ %switchCond.0.ph.us, %control.outer.us ] ; <i32> [#uses=2]
54 switch i32 %switchCond.0.us, label %control.outer.loopexit.us-lcssa.us [
56 i32 1, label %bb1.us-lcssa.us
58 i32 4, label %bb4.us-lcssa.us
61 control.outer.loopexit.us-lcssa.us: ; preds = %control.us
62 br label %control.outer.loopexit
64 bb1.us-lcssa.us: ; preds = %control.us
67 bb4.us-lcssa.us: ; preds = %control.us
70 control.outer: ; preds = %bb3, %control.outer.outer.control.outer.outer.split_crit_edge
71 %A.0.ph = phi i32 [ %nextId17, %bb3 ], [ 4, %control.outer.outer.control.outer.outer.split_crit_edge ] ; <i32> [#uses=1]
72 %switchCond.0.ph = phi i32 [ 0, %bb3 ], [ %switchCond.0.ph.ph, %control.outer.outer.control.outer.outer.split_crit_edge ] ; <i32> [#uses=1]
75 control: ; preds = %bb0, %control.outer
76 %switchCond.0 = phi i32 [ %A.0.ph, %bb0 ], [ %switchCond.0.ph, %control.outer ] ; <i32> [#uses=2]
77 switch i32 %switchCond.0, label %control.outer.loopexit.us-lcssa [
79 i32 1, label %bb1.us-lcssa
81 i32 4, label %bb4.us-lcssa
84 bb4.us-lcssa: ; preds = %control
87 bb4: ; preds = %bb4.us-lcssa, %bb4.us-lcssa.us
88 br label %control.outer.outer.backedge
90 control.outer.outer.backedge: ; preds = %bb4, %control.outer.loopexit
91 %i.0.ph.ph.be = phi i32 [ 1, %bb4 ], [ 0, %control.outer.loopexit ] ; <i32> [#uses=1]
92 br label %control.outer.outer
94 bb3: ; preds = %control
95 %nextId17 = add i32 %switchCond.0, -2 ; <i32> [#uses=1]
96 br label %control.outer
98 bb0: ; preds = %control
101 bb1.us-lcssa: ; preds = %control
104 bb1: ; preds = %bb1.us-lcssa, %bb1.us-lcssa.us