zpu: managed to compile program that writes constant to global variable
[llvm/zpu.git] / lib / CodeGen / LiveStackAnalysis.cpp
blob895bd2e4b132e02d16d6b2f8e2a0afe745366db1
1 //===-- LiveStackAnalysis.cpp - Live Stack Slot Analysis ------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the live stack slot analysis pass. It is analogous to
11 // live interval analysis except it's analyzing liveness of stack slots rather
12 // than registers.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "livestacks"
17 #include "llvm/CodeGen/LiveStackAnalysis.h"
18 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Target/TargetRegisterInfo.h"
21 #include "llvm/Support/Debug.h"
22 #include "llvm/Support/raw_ostream.h"
23 #include "llvm/ADT/Statistic.h"
24 #include <limits>
25 using namespace llvm;
27 char LiveStacks::ID = 0;
28 INITIALIZE_PASS(LiveStacks, "livestacks",
29 "Live Stack Slot Analysis", false, false)
31 char &llvm::LiveStacksID = LiveStacks::ID;
33 void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
34 AU.setPreservesAll();
35 AU.addPreserved<SlotIndexes>();
36 AU.addRequiredTransitive<SlotIndexes>();
37 MachineFunctionPass::getAnalysisUsage(AU);
40 void LiveStacks::releaseMemory() {
41 // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd.
42 VNInfoAllocator.Reset();
43 S2IMap.clear();
44 S2RCMap.clear();
47 bool LiveStacks::runOnMachineFunction(MachineFunction &) {
48 // FIXME: No analysis is being done right now. We are relying on the
49 // register allocators to provide the information.
50 return false;
53 /// print - Implement the dump method.
54 void LiveStacks::print(raw_ostream &OS, const Module*) const {
56 OS << "********** INTERVALS **********\n";
57 for (const_iterator I = begin(), E = end(); I != E; ++I) {
58 I->second.print(OS);
59 int Slot = I->first;
60 const TargetRegisterClass *RC = getIntervalRegClass(Slot);
61 if (RC)
62 OS << " [" << RC->getName() << "]\n";
63 else
64 OS << " [Unknown]\n";