lib/CodeGen/RegAllocPBQP.cpp

   1 //===------ RegAllocPBQP.cpp ---- PBQP Register Allocator -------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains a Partitioned Boolean Quadratic Programming (PBQP) based
  11 // register allocator for LLVM. This allocator works by constructing a PBQP
  12 // problem representing the register allocation problem under consideration,
  13 // solving this using a PBQP solver, and mapping the solution back to a
  14 // register assignment. If any variables are selected for spilling then spill
  15 // code is inserted and the process repeated.
  16 //
  17 // The PBQP solver (pbqp.c) provided for this allocator uses a heuristic tuned
  18 // for register allocation. For more information on PBQP for register
  19 // allocation, see the following papers:
  20 //
  21 //   (1) Hames, L. and Scholz, B. 2006. Nearly optimal register allocation with
  22 //   PBQP. In Proceedings of the 7th Joint Modular Languages Conference
  23 //   (JMLC'06). LNCS, vol. 4228. Springer, New York, NY, USA. 346-361.
  24 //
  25 //   (2) Scholz, B., Eckstein, E. 2002. Register allocation for irregular
  26 //   architectures. In Proceedings of the Joint Conference on Languages,
  27 //   Compilers and Tools for Embedded Systems (LCTES'02), ACM Press, New York,
  28 //   NY, USA, 139-148.
  29 //
  30 //===----------------------------------------------------------------------===//
  31
  32 #define DEBUG_TYPE "regalloc"
  33
  34 #include "RenderMachineFunction.h"
  35 #include "Splitter.h"
  36 #include "VirtRegMap.h"
  37 #include "VirtRegRewriter.h"
  38 #include "llvm/CodeGen/CalcSpillWeights.h"
  39 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
  40 #include "llvm/CodeGen/LiveStackAnalysis.h"
  41 #include "llvm/CodeGen/RegAllocPBQP.h"
  42 #include "llvm/CodeGen/MachineFunctionPass.h"
  43 #include "llvm/CodeGen/MachineLoopInfo.h"
  44 #include "llvm/CodeGen/MachineRegisterInfo.h"
  45 #include "llvm/CodeGen/PBQP/HeuristicSolver.h"
  46 #include "llvm/CodeGen/PBQP/Graph.h"
  47 #include "llvm/CodeGen/PBQP/Heuristics/Briggs.h"
  48 #include "llvm/CodeGen/RegAllocRegistry.h"
  49 #include "llvm/CodeGen/RegisterCoalescer.h"
  50 #include "llvm/Support/Debug.h"
  51 #include "llvm/Support/raw_ostream.h"
  52 #include "llvm/Target/TargetInstrInfo.h"
  53 #include "llvm/Target/TargetMachine.h"
  54 #include <limits>
  55 #include <memory>
  56 #include <set>
  57 #include <vector>
  58
  59 using namespace llvm;
  60
  61 static RegisterRegAlloc
  62 registerPBQPRepAlloc("pbqp", "PBQP register allocator",
  63                        createDefaultPBQPRegisterAllocator);
  64
  65 static cl::opt<bool>
  66 pbqpCoalescing("pbqp-coalescing",
  67                 cl::desc("Attempt coalescing during PBQP register allocation."),
  68                 cl::init(false), cl::Hidden);
  69
  70 static cl::opt<bool>
  71 pbqpPreSplitting("pbqp-pre-splitting",
  72                  cl::desc("Pre-split before PBQP register allocation."),
  73                  cl::init(false), cl::Hidden);
  74
  75 namespace {
  76
  77 ///
  78 /// PBQP based allocators solve the register allocation problem by mapping
  79 /// register allocation problems to Partitioned Boolean Quadratic
  80 /// Programming problems.
  81 class RegAllocPBQP : public MachineFunctionPass {
  82 public:
  83
  84   static char ID;
  85
  86   /// Construct a PBQP register allocator.
  87   RegAllocPBQP(std::auto_ptr<PBQPBuilder> b)
  88       : MachineFunctionPass(ID), builder(b) {
  89     initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
  90     initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
  91     initializeRegisterCoalescerAnalysisGroup(*PassRegistry::getPassRegistry());
  92     initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
  93     initializeLiveStacksPass(*PassRegistry::getPassRegistry());
  94     initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
  95     initializeLoopSplitterPass(*PassRegistry::getPassRegistry());
  96     initializeVirtRegMapPass(*PassRegistry::getPassRegistry());
  97     initializeRenderMachineFunctionPass(*PassRegistry::getPassRegistry());
  98   }
  99
 100   /// Return the pass name.
 101   virtual const char* getPassName() const {
 102     return "PBQP Register Allocator";
 103   }
 104
 105   /// PBQP analysis usage.
 106   virtual void getAnalysisUsage(AnalysisUsage &au) const;
 107
 108   /// Perform register allocation
 109   virtual bool runOnMachineFunction(MachineFunction &MF);
 110
 111 private:
 112
 113   typedef std::map<const LiveInterval*, unsigned> LI2NodeMap;
 114   typedef std::vector<const LiveInterval*> Node2LIMap;
 115   typedef std::vector<unsigned> AllowedSet;
 116   typedef std::vector<AllowedSet> AllowedSetMap;
 117   typedef std::pair<unsigned, unsigned> RegPair;
 118   typedef std::map<RegPair, PBQP::PBQPNum> CoalesceMap;
 119   typedef std::vector<PBQP::Graph::NodeItr> NodeVector;
 120   typedef std::set<unsigned> RegSet;
 121
 122
 123   std::auto_ptr<PBQPBuilder> builder;
 124
 125   MachineFunction *mf;
 126   const TargetMachine *tm;
 127   const TargetRegisterInfo *tri;
 128   const TargetInstrInfo *tii;
 129   const MachineLoopInfo *loopInfo;
 130   MachineRegisterInfo *mri;
 131   RenderMachineFunction *rmf;
 132
 133   LiveIntervals *lis;
 134   LiveStacks *lss;
 135   VirtRegMap *vrm;
 136
 137   RegSet vregsToAlloc, emptyIntervalVRegs;
 138
 139   /// \brief Finds the initial set of vreg intervals to allocate.
 140   void findVRegIntervalsToAlloc();
 141
 142   /// \brief Adds a stack interval if the given live interval has been
 143   /// spilled. Used to support stack slot coloring.
 144   void addStackInterval(const LiveInterval *spilled,MachineRegisterInfo* mri);
 145
 146   /// \brief Given a solved PBQP problem maps this solution back to a register
 147   /// assignment.
 148   bool mapPBQPToRegAlloc(const PBQPRAProblem &problem,
 149                          const PBQP::Solution &solution);
 150
 151   /// \brief Postprocessing before final spilling. Sets basic block "live in"
 152   /// variables.
 153   void finalizeAlloc() const;
 154
 155 };
 156
 157 char RegAllocPBQP::ID = 0;
 158
 159 } // End anonymous namespace.
 160
 161 unsigned PBQPRAProblem::getVRegForNode(PBQP::Graph::ConstNodeItr node) const {
 162   Node2VReg::const_iterator vregItr = node2VReg.find(node);
 163   assert(vregItr != node2VReg.end() && "No vreg for node.");
 164   return vregItr->second;
 165 }
 166
 167 PBQP::Graph::NodeItr PBQPRAProblem::getNodeForVReg(unsigned vreg) const {
 168   VReg2Node::const_iterator nodeItr = vreg2Node.find(vreg);
 169   assert(nodeItr != vreg2Node.end() && "No node for vreg.");
 170   return nodeItr->second;
 171
 172 }
 173
 174 const PBQPRAProblem::AllowedSet&
 175   PBQPRAProblem::getAllowedSet(unsigned vreg) const {
 176   AllowedSetMap::const_iterator allowedSetItr = allowedSets.find(vreg);
 177   assert(allowedSetItr != allowedSets.end() && "No pregs for vreg.");
 178   const AllowedSet &allowedSet = allowedSetItr->second;
 179   return allowedSet;
 180 }
 181
 182 unsigned PBQPRAProblem::getPRegForOption(unsigned vreg, unsigned option) const {
 183   assert(isPRegOption(vreg, option) && "Not a preg option.");
 184
 185   const AllowedSet& allowedSet = getAllowedSet(vreg);
 186   assert(option <= allowedSet.size() && "Option outside allowed set.");
 187   return allowedSet[option - 1];
 188 }
 189
 190 std::auto_ptr<PBQPRAProblem> PBQPBuilder::build(MachineFunction *mf,
 191                                                 const LiveIntervals *lis,
 192                                                 const MachineLoopInfo *loopInfo,
 193                                                 const RegSet &vregs) {
 194
 195   typedef std::vector<const LiveInterval*> LIVector;
 196
 197   MachineRegisterInfo *mri = &mf->getRegInfo();
 198   const TargetRegisterInfo *tri = mf->getTarget().getRegisterInfo();
 199
 200   std::auto_ptr<PBQPRAProblem> p(new PBQPRAProblem());
 201   PBQP::Graph &g = p->getGraph();
 202   RegSet pregs;
 203
 204   // Collect the set of preg intervals, record that they're used in the MF.
 205   for (LiveIntervals::const_iterator itr = lis->begin(), end = lis->end();
 206        itr != end; ++itr) {
 207     if (TargetRegisterInfo::isPhysicalRegister(itr->first)) {
 208       pregs.insert(itr->first);
 209       mri->setPhysRegUsed(itr->first);
 210     }
 211   }
 212
 213   BitVector reservedRegs = tri->getReservedRegs(*mf);
 214
 215   // Iterate over vregs.
 216   for (RegSet::const_iterator vregItr = vregs.begin(), vregEnd = vregs.end();
 217        vregItr != vregEnd; ++vregItr) {
 218     unsigned vreg = *vregItr;
 219     const TargetRegisterClass *trc = mri->getRegClass(vreg);
 220     const LiveInterval *vregLI = &lis->getInterval(vreg);
 221
 222     // Compute an initial allowed set for the current vreg.
 223     typedef std::vector<unsigned> VRAllowed;
 224     VRAllowed vrAllowed;
 225     for (TargetRegisterClass::iterator aoItr = trc->allocation_order_begin(*mf),
 226                                        aoEnd = trc->allocation_order_end(*mf);
 227          aoItr != aoEnd; ++aoItr) {
 228       unsigned preg = *aoItr;
 229       if (!reservedRegs.test(preg)) {
 230         vrAllowed.push_back(preg);
 231       }
 232     }
 233
 234     // Remove any physical registers which overlap.
 235     for (RegSet::const_iterator pregItr = pregs.begin(),
 236                                 pregEnd = pregs.end();
 237          pregItr != pregEnd; ++pregItr) {
 238       unsigned preg = *pregItr;
 239       const LiveInterval *pregLI = &lis->getInterval(preg);
 240
 241       if (pregLI->empty())
 242         continue;
 243
 244       if (!vregLI->overlaps(*pregLI))
 245         continue;
 246
 247       // Remove the register from the allowed set.
 248       VRAllowed::iterator eraseItr =
 249         std::find(vrAllowed.begin(), vrAllowed.end(), preg);
 250
 251       if (eraseItr != vrAllowed.end()) {
 252         vrAllowed.erase(eraseItr);
 253       }
 254
 255       // Also remove any aliases.
 256       const unsigned *aliasItr = tri->getAliasSet(preg);
 257       if (aliasItr != 0) {
 258         for (; *aliasItr != 0; ++aliasItr) {
 259           VRAllowed::iterator eraseItr =
 260             std::find(vrAllowed.begin(), vrAllowed.end(), *aliasItr);
 261
 262           if (eraseItr != vrAllowed.end()) {
 263             vrAllowed.erase(eraseItr);
 264           }
 265         }
 266       }
 267     }
 268
 269     // Construct the node.
 270     PBQP::Graph::NodeItr node =
 271       g.addNode(PBQP::Vector(vrAllowed.size() + 1, 0));
 272
 273     // Record the mapping and allowed set in the problem.
 274     p->recordVReg(vreg, node, vrAllowed.begin(), vrAllowed.end());
 275
 276     PBQP::PBQPNum spillCost = (vregLI->weight != 0.0) ?
 277         vregLI->weight : std::numeric_limits<PBQP::PBQPNum>::min();
 278
 279     addSpillCosts(g.getNodeCosts(node), spillCost);
 280   }
 281
 282   for (RegSet::const_iterator vr1Itr = vregs.begin(), vrEnd = vregs.end();
 283          vr1Itr != vrEnd; ++vr1Itr) {
 284     unsigned vr1 = *vr1Itr;
 285     const LiveInterval &l1 = lis->getInterval(vr1);
 286     const PBQPRAProblem::AllowedSet &vr1Allowed = p->getAllowedSet(vr1);
 287
 288     for (RegSet::const_iterator vr2Itr = llvm::next(vr1Itr);
 289          vr2Itr != vrEnd; ++vr2Itr) {
 290       unsigned vr2 = *vr2Itr;
 291       const LiveInterval &l2 = lis->getInterval(vr2);
 292       const PBQPRAProblem::AllowedSet &vr2Allowed = p->getAllowedSet(vr2);
 293
 294       assert(!l2.empty() && "Empty interval in vreg set?");
 295       if (l1.overlaps(l2)) {
 296         PBQP::Graph::EdgeItr edge =
 297           g.addEdge(p->getNodeForVReg(vr1), p->getNodeForVReg(vr2),
 298                     PBQP::Matrix(vr1Allowed.size()+1, vr2Allowed.size()+1, 0));
 299
 300         addInterferenceCosts(g.getEdgeCosts(edge), vr1Allowed, vr2Allowed, tri);
 301       }
 302     }
 303   }
 304
 305   return p;
 306 }
 307
 308 void PBQPBuilder::addSpillCosts(PBQP::Vector &costVec,
 309                                 PBQP::PBQPNum spillCost) {
 310   costVec[0] = spillCost;
 311 }
 312
 313 void PBQPBuilder::addInterferenceCosts(
 314                                     PBQP::Matrix &costMat,
 315                                     const PBQPRAProblem::AllowedSet &vr1Allowed,
 316                                     const PBQPRAProblem::AllowedSet &vr2Allowed,
 317                                     const TargetRegisterInfo *tri) {
 318   assert(costMat.getRows() == vr1Allowed.size() + 1 && "Matrix height mismatch.");
 319   assert(costMat.getCols() == vr2Allowed.size() + 1 && "Matrix width mismatch.");
 320
 321   for (unsigned i = 0; i < vr1Allowed.size(); ++i) {
 322     unsigned preg1 = vr1Allowed[i];
 323
 324     for (unsigned j = 0; j < vr2Allowed.size(); ++j) {
 325       unsigned preg2 = vr2Allowed[j];
 326
 327       if (tri->regsOverlap(preg1, preg2)) {
 328         costMat[i + 1][j + 1] = std::numeric_limits<PBQP::PBQPNum>::infinity();
 329       }
 330     }
 331   }
 332 }
 333
 334 std::auto_ptr<PBQPRAProblem> PBQPBuilderWithCoalescing::build(
 335                                                 MachineFunction *mf,
 336                                                 const LiveIntervals *lis,
 337                                                 const MachineLoopInfo *loopInfo,
 338                                                 const RegSet &vregs) {
 339
 340   std::auto_ptr<PBQPRAProblem> p = PBQPBuilder::build(mf, lis, loopInfo, vregs);
 341   PBQP::Graph &g = p->getGraph();
 342
 343   const TargetMachine &tm = mf->getTarget();
 344   CoalescerPair cp(*tm.getInstrInfo(), *tm.getRegisterInfo());
 345
 346   // Scan the machine function and add a coalescing cost whenever CoalescerPair
 347   // gives the Ok.
 348   for (MachineFunction::const_iterator mbbItr = mf->begin(),
 349                                        mbbEnd = mf->end();
 350        mbbItr != mbbEnd; ++mbbItr) {
 351     const MachineBasicBlock *mbb = &*mbbItr;
 352
 353     for (MachineBasicBlock::const_iterator miItr = mbb->begin(),
 354                                            miEnd = mbb->end();
 355          miItr != miEnd; ++miItr) {
 356       const MachineInstr *mi = &*miItr;
 357
 358       if (!cp.setRegisters(mi))
 359         continue; // Not coalescable.
 360
 361       if (cp.getSrcReg() == cp.getDstReg())
 362         continue; // Already coalesced.
 363
 364       unsigned dst = cp.getDstReg(),
 365                src = cp.getSrcReg();
 366
 367       const float copyFactor = 0.5; // Cost of copy relative to load. Current
 368       // value plucked randomly out of the air.
 369
 370       PBQP::PBQPNum cBenefit =
 371         copyFactor * LiveIntervals::getSpillWeight(false, true,
 372                                                    loopInfo->getLoopDepth(mbb));
 373
 374       if (cp.isPhys()) {
 375         if (!lis->isAllocatable(dst))
 376           continue;
 377
 378         const PBQPRAProblem::AllowedSet &allowed = p->getAllowedSet(src);
 379         unsigned pregOpt = 0;
 380         while (pregOpt < allowed.size() && allowed[pregOpt] != dst)
 381           ++pregOpt;
 382         if (pregOpt < allowed.size()) {
 383           ++pregOpt; // +1 to account for spill option.
 384           PBQP::Graph::NodeItr node = p->getNodeForVReg(src);
 385           addPhysRegCoalesce(g.getNodeCosts(node), pregOpt, cBenefit);
 386         }
 387       } else {
 388         const PBQPRAProblem::AllowedSet *allowed1 = &p->getAllowedSet(dst);
 389         const PBQPRAProblem::AllowedSet *allowed2 = &p->getAllowedSet(src);
 390         PBQP::Graph::NodeItr node1 = p->getNodeForVReg(dst);
 391         PBQP::Graph::NodeItr node2 = p->getNodeForVReg(src);
 392         PBQP::Graph::EdgeItr edge = g.findEdge(node1, node2);
 393         if (edge == g.edgesEnd()) {
 394           edge = g.addEdge(node1, node2, PBQP::Matrix(allowed1->size() + 1,
 395                                                       allowed2->size() + 1,
 396                                                       0));
 397         } else {
 398           if (g.getEdgeNode1(edge) == node2) {
 399             std::swap(node1, node2);
 400             std::swap(allowed1, allowed2);
 401           }
 402         }
 403
 404         addVirtRegCoalesce(g.getEdgeCosts(edge), *allowed1, *allowed2,
 405                            cBenefit);
 406       }
 407     }
 408   }
 409
 410   return p;
 411 }
 412
 413 void PBQPBuilderWithCoalescing::addPhysRegCoalesce(PBQP::Vector &costVec,
 414                                                    unsigned pregOption,
 415                                                    PBQP::PBQPNum benefit) {
 416   costVec[pregOption] += -benefit;
 417 }
 418
 419 void PBQPBuilderWithCoalescing::addVirtRegCoalesce(
 420                                     PBQP::Matrix &costMat,
 421                                     const PBQPRAProblem::AllowedSet &vr1Allowed,
 422                                     const PBQPRAProblem::AllowedSet &vr2Allowed,
 423                                     PBQP::PBQPNum benefit) {
 424
 425   assert(costMat.getRows() == vr1Allowed.size() + 1 && "Size mismatch.");
 426   assert(costMat.getCols() == vr2Allowed.size() + 1 && "Size mismatch.");
 427
 428   for (unsigned i = 0; i < vr1Allowed.size(); ++i) {
 429     unsigned preg1 = vr1Allowed[i];
 430     for (unsigned j = 0; j < vr2Allowed.size(); ++j) {
 431       unsigned preg2 = vr2Allowed[j];
 432
 433       if (preg1 == preg2) {
 434         costMat[i + 1][j + 1] += -benefit;
 435       }
 436     }
 437   }
 438 }
 439
 440
 441 void RegAllocPBQP::getAnalysisUsage(AnalysisUsage &au) const {
 442   au.addRequired<SlotIndexes>();
 443   au.addPreserved<SlotIndexes>();
 444   au.addRequired<LiveIntervals>();
 445   //au.addRequiredID(SplitCriticalEdgesID);
 446   au.addRequired<RegisterCoalescer>();
 447   au.addRequired<CalculateSpillWeights>();
 448   au.addRequired<LiveStacks>();
 449   au.addPreserved<LiveStacks>();
 450   au.addRequired<MachineLoopInfo>();
 451   au.addPreserved<MachineLoopInfo>();
 452   if (pbqpPreSplitting)
 453     au.addRequired<LoopSplitter>();
 454   au.addRequired<VirtRegMap>();
 455   au.addRequired<RenderMachineFunction>();
 456   MachineFunctionPass::getAnalysisUsage(au);
 457 }
 458
 459 void RegAllocPBQP::findVRegIntervalsToAlloc() {
 460
 461   // Iterate over all live ranges.
 462   for (LiveIntervals::iterator itr = lis->begin(), end = lis->end();
 463        itr != end; ++itr) {
 464
 465     // Ignore physical ones.
 466     if (TargetRegisterInfo::isPhysicalRegister(itr->first))
 467       continue;
 468
 469     LiveInterval *li = itr->second;
 470
 471     // If this live interval is non-empty we will use pbqp to allocate it.
 472     // Empty intervals we allocate in a simple post-processing stage in
 473     // finalizeAlloc.
 474     if (!li->empty()) {
 475       vregsToAlloc.insert(li->reg);
 476     }
 477     else {
 478       emptyIntervalVRegs.insert(li->reg);
 479     }
 480   }
 481 }
 482
 483 void RegAllocPBQP::addStackInterval(const LiveInterval *spilled,
 484                                     MachineRegisterInfo* mri) {
 485   int stackSlot = vrm->getStackSlot(spilled->reg);
 486
 487   if (stackSlot == VirtRegMap::NO_STACK_SLOT)
 488     return;
 489
 490   const TargetRegisterClass *RC = mri->getRegClass(spilled->reg);
 491   LiveInterval &stackInterval = lss->getOrCreateInterval(stackSlot, RC);
 492
 493   VNInfo *vni;
 494   if (stackInterval.getNumValNums() != 0)
 495     vni = stackInterval.getValNumInfo(0);
 496   else
 497     vni = stackInterval.getNextValue(
 498       SlotIndex(), 0, lss->getVNInfoAllocator());
 499
 500   LiveInterval &rhsInterval = lis->getInterval(spilled->reg);
 501   stackInterval.MergeRangesInAsValue(rhsInterval, vni);
 502 }
 503
 504 bool RegAllocPBQP::mapPBQPToRegAlloc(const PBQPRAProblem &problem,
 505                                      const PBQP::Solution &solution) {
 506   // Set to true if we have any spills
 507   bool anotherRoundNeeded = false;
 508
 509   // Clear the existing allocation.
 510   vrm->clearAllVirt();
 511
 512   const PBQP::Graph &g = problem.getGraph();
 513   // Iterate over the nodes mapping the PBQP solution to a register
 514   // assignment.
 515   for (PBQP::Graph::ConstNodeItr node = g.nodesBegin(),
 516                                  nodeEnd = g.nodesEnd();
 517        node != nodeEnd; ++node) {
 518     unsigned vreg = problem.getVRegForNode(node);
 519     unsigned alloc = solution.getSelection(node);
 520
 521     if (problem.isPRegOption(vreg, alloc)) {
 522       unsigned preg = problem.getPRegForOption(vreg, alloc);
 523       DEBUG(dbgs() << "VREG " << vreg << " -> " << tri->getName(preg) << "\n");
 524       assert(preg != 0 && "Invalid preg selected.");
 525       vrm->assignVirt2Phys(vreg, preg);
 526     } else if (problem.isSpillOption(vreg, alloc)) {
 527       vregsToAlloc.erase(vreg);
 528       const LiveInterval* spillInterval = &lis->getInterval(vreg);
 529       double oldWeight = spillInterval->weight;
 530       SmallVector<LiveInterval*, 8> spillIs;
 531       rmf->rememberUseDefs(spillInterval);
 532       std::vector<LiveInterval*> newSpills =
 533         lis->addIntervalsForSpills(*spillInterval, spillIs, loopInfo, *vrm);
 534       addStackInterval(spillInterval, mri);
 535       rmf->rememberSpills(spillInterval, newSpills);
 536
 537       (void) oldWeight;
 538       DEBUG(dbgs() << "VREG " << vreg << " -> SPILLED (Cost: "
 539                    << oldWeight << ", New vregs: ");
 540
 541       // Copy any newly inserted live intervals into the list of regs to
 542       // allocate.
 543       for (std::vector<LiveInterval*>::const_iterator
 544            itr = newSpills.begin(), end = newSpills.end();
 545            itr != end; ++itr) {
 546         assert(!(*itr)->empty() && "Empty spill range.");
 547         DEBUG(dbgs() << (*itr)->reg << " ");
 548         vregsToAlloc.insert((*itr)->reg);
 549       }
 550
 551       DEBUG(dbgs() << ")\n");
 552
 553       // We need another round if spill intervals were added.
 554       anotherRoundNeeded |= !newSpills.empty();
 555     } else {
 556       assert(false && "Unknown allocation option.");
 557     }
 558   }
 559
 560   return !anotherRoundNeeded;
 561 }
 562
 563
 564 void RegAllocPBQP::finalizeAlloc() const {
 565   typedef LiveIntervals::iterator LIIterator;
 566   typedef LiveInterval::Ranges::const_iterator LRIterator;
 567
 568   // First allocate registers for the empty intervals.
 569   for (RegSet::const_iterator
 570          itr = emptyIntervalVRegs.begin(), end = emptyIntervalVRegs.end();
 571          itr != end; ++itr) {
 572     LiveInterval *li = &lis->getInterval(*itr);
 573
 574     unsigned physReg = vrm->getRegAllocPref(li->reg);
 575
 576     if (physReg == 0) {
 577       const TargetRegisterClass *liRC = mri->getRegClass(li->reg);
 578       physReg = *liRC->allocation_order_begin(*mf);
 579     }
 580
 581     vrm->assignVirt2Phys(li->reg, physReg);
 582   }
 583
 584   // Finally iterate over the basic blocks to compute and set the live-in sets.
 585   SmallVector<MachineBasicBlock*, 8> liveInMBBs;
 586   MachineBasicBlock *entryMBB = &*mf->begin();
 587
 588   for (LIIterator liItr = lis->begin(), liEnd = lis->end();
 589        liItr != liEnd; ++liItr) {
 590
 591     const LiveInterval *li = liItr->second;
 592     unsigned reg = 0;
 593
 594     // Get the physical register for this interval
 595     if (TargetRegisterInfo::isPhysicalRegister(li->reg)) {
 596       reg = li->reg;
 597     }
 598     else if (vrm->isAssignedReg(li->reg)) {
 599       reg = vrm->getPhys(li->reg);
 600     }
 601     else {
 602       // Ranges which are assigned a stack slot only are ignored.
 603       continue;
 604     }
 605
 606     if (reg == 0) {
 607       // Filter out zero regs - they're for intervals that were spilled.
 608       continue;
 609     }
 610
 611     // Iterate over the ranges of the current interval...
 612     for (LRIterator lrItr = li->begin(), lrEnd = li->end();
 613          lrItr != lrEnd; ++lrItr) {
 614
 615       // Find the set of basic blocks which this range is live into...
 616       if (lis->findLiveInMBBs(lrItr->start, lrItr->end,  liveInMBBs)) {
 617         // And add the physreg for this interval to their live-in sets.
 618         for (unsigned i = 0; i < liveInMBBs.size(); ++i) {
 619           if (liveInMBBs[i] != entryMBB) {
 620             if (!liveInMBBs[i]->isLiveIn(reg)) {
 621               liveInMBBs[i]->addLiveIn(reg);
 622             }
 623           }
 624         }
 625         liveInMBBs.clear();
 626       }
 627     }
 628   }
 629
 630 }
 631
 632 bool RegAllocPBQP::runOnMachineFunction(MachineFunction &MF) {
 633
 634   mf = &MF;
 635   tm = &mf->getTarget();
 636   tri = tm->getRegisterInfo();
 637   tii = tm->getInstrInfo();
 638   mri = &mf->getRegInfo();
 639
 640   lis = &getAnalysis<LiveIntervals>();
 641   lss = &getAnalysis<LiveStacks>();
 642   loopInfo = &getAnalysis<MachineLoopInfo>();
 643   rmf = &getAnalysis<RenderMachineFunction>();
 644
 645   vrm = &getAnalysis<VirtRegMap>();
 646
 647
 648   DEBUG(dbgs() << "PBQP Register Allocating for " << mf->getFunction()->getName() << "\n");
 649
 650   // Allocator main loop:
 651   //
 652   // * Map current regalloc problem to a PBQP problem
 653   // * Solve the PBQP problem
 654   // * Map the solution back to a register allocation
 655   // * Spill if necessary
 656   //
 657   // This process is continued till no more spills are generated.
 658
 659   // Find the vreg intervals in need of allocation.
 660   findVRegIntervalsToAlloc();
 661
 662   // If there are non-empty intervals allocate them using pbqp.
 663   if (!vregsToAlloc.empty()) {
 664
 665     bool pbqpAllocComplete = false;
 666     unsigned round = 0;
 667
 668     while (!pbqpAllocComplete) {
 669       DEBUG(dbgs() << "  PBQP Regalloc round " << round << ":\n");
 670
 671       std::auto_ptr<PBQPRAProblem> problem =
 672         builder->build(mf, lis, loopInfo, vregsToAlloc);
 673       PBQP::Solution solution =
 674         PBQP::HeuristicSolver<PBQP::Heuristics::Briggs>::solve(
 675           problem->getGraph());
 676
 677       pbqpAllocComplete = mapPBQPToRegAlloc(*problem, solution);
 678
 679       ++round;
 680     }
 681   }
 682
 683   // Finalise allocation, allocate empty ranges.
 684   finalizeAlloc();
 685
 686   rmf->renderMachineFunction("After PBQP register allocation.", vrm);
 687
 688   vregsToAlloc.clear();
 689   emptyIntervalVRegs.clear();
 690
 691   DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *vrm << "\n");
 692
 693   // Run rewriter
 694   std::auto_ptr<VirtRegRewriter> rewriter(createVirtRegRewriter());
 695
 696   rewriter->runOnMachineFunction(*mf, *vrm, lis);
 697
 698   return true;
 699 }
 700
 701 FunctionPass* llvm::createPBQPRegisterAllocator(
 702                                            std::auto_ptr<PBQPBuilder> builder) {
 703   return new RegAllocPBQP(builder);
 704 }
 705
 706 FunctionPass* llvm::createDefaultPBQPRegisterAllocator() {
 707   if (pbqpCoalescing) {
 708     return createPBQPRegisterAllocator(
 709              std::auto_ptr<PBQPBuilder>(new PBQPBuilderWithCoalescing()));
 710   } // else
 711   return createPBQPRegisterAllocator(
 712            std::auto_ptr<PBQPBuilder>(new PBQPBuilder()));
 713 }
 714
 715 #undef DEBUG_TYPE