1 set(LLVM_TARGET_DEFINITIONS ARM.td)
3 tablegen(ARMGenRegisterInfo.h.inc -gen-register-desc-header)
4 tablegen(ARMGenRegisterNames.inc -gen-register-enums)
5 tablegen(ARMGenRegisterInfo.inc -gen-register-desc)
6 tablegen(ARMGenInstrNames.inc -gen-instr-enums)
7 tablegen(ARMGenInstrInfo.inc -gen-instr-desc)
8 tablegen(ARMGenCodeEmitter.inc -gen-emitter)
9 tablegen(ARMGenAsmWriter.inc -gen-asm-writer)
10 tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher)
11 tablegen(ARMGenDAGISel.inc -gen-dag-isel)
12 tablegen(ARMGenFastISel.inc -gen-fast-isel)
13 tablegen(ARMGenCallingConv.inc -gen-callingconv)
14 tablegen(ARMGenSubtarget.inc -gen-subtarget)
15 tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info)
16 tablegen(ARMGenDecoderTables.inc -gen-arm-decoder)
18 add_llvm_target(ARMCodeGen
22 ARMBaseRegisterInfo.cpp
24 ARMConstantIslandPass.cpp
25 ARMConstantPoolValue.cpp
27 ARMExpandPseudoInsts.cpp
35 ARMLoadStoreOptimizer.cpp
39 ARMSelectionDAGInfo.cpp
42 ARMTargetObjectFile.cpp
45 Thumb1RegisterInfo.cpp
46 Thumb2HazardRecognizer.cpp
49 Thumb2RegisterInfo.cpp
50 Thumb2SizeReduction.cpp