Fixed some bugs.
[llvm/zpu.git] / lib / Target / ARM / Thumb2HazardRecognizer.cpp
blob172908da228a852414abe6c99d504712e19561de
1 //===-- Thumb2HazardRecognizer.cpp - Thumb2 postra hazard recognizer ------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
10 #include "ARM.h"
11 #include "Thumb2HazardRecognizer.h"
12 #include "llvm/CodeGen/MachineInstr.h"
13 #include "llvm/CodeGen/ScheduleDAG.h"
14 using namespace llvm;
16 ScheduleHazardRecognizer::HazardType
17 Thumb2HazardRecognizer::getHazardType(SUnit *SU) {
18 if (ITBlockSize) {
19 MachineInstr *MI = SU->getInstr();
20 if (!MI->isDebugValue() && MI != ITBlockMIs[ITBlockSize-1])
21 return Hazard;
24 return PostRAHazardRecognizer::getHazardType(SU);
27 void Thumb2HazardRecognizer::Reset() {
28 ITBlockSize = 0;
29 PostRAHazardRecognizer::Reset();
32 void Thumb2HazardRecognizer::EmitInstruction(SUnit *SU) {
33 MachineInstr *MI = SU->getInstr();
34 unsigned Opcode = MI->getOpcode();
35 if (ITBlockSize) {
36 --ITBlockSize;
37 } else if (Opcode == ARM::t2IT) {
38 unsigned Mask = MI->getOperand(1).getImm();
39 unsigned NumTZ = CountTrailingZeros_32(Mask);
40 assert(NumTZ <= 3 && "Invalid IT mask!");
41 ITBlockSize = 4 - NumTZ;
42 MachineBasicBlock::iterator I = MI;
43 for (unsigned i = 0; i < ITBlockSize; ++i) {
44 // Advance to the next instruction, skipping any dbg_value instructions.
45 do {
46 ++I;
47 } while (I->isDebugValue());
48 ITBlockMIs[ITBlockSize-1-i] = &*I;
52 PostRAHazardRecognizer::EmitInstruction(SU);