lib/Target/Alpha/AlphaRegisterInfo.cpp

   1 //===- AlphaRegisterInfo.cpp - Alpha Register Information -------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the Alpha implementation of the TargetRegisterInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #define DEBUG_TYPE "reginfo"
  15 #include "Alpha.h"
  16 #include "AlphaRegisterInfo.h"
  17 #include "llvm/Constants.h"
  18 #include "llvm/Type.h"
  19 #include "llvm/Function.h"
  20 #include "llvm/CodeGen/ValueTypes.h"
  21 #include "llvm/CodeGen/MachineInstrBuilder.h"
  22 #include "llvm/CodeGen/MachineFunction.h"
  23 #include "llvm/CodeGen/MachineFrameInfo.h"
  24 #include "llvm/CodeGen/MachineLocation.h"
  25 #include "llvm/Target/TargetFrameInfo.h"
  26 #include "llvm/Target/TargetMachine.h"
  27 #include "llvm/Target/TargetOptions.h"
  28 #include "llvm/Target/TargetInstrInfo.h"
  29 #include "llvm/Support/CommandLine.h"
  30 #include "llvm/Support/Debug.h"
  31 #include "llvm/Support/ErrorHandling.h"
  32 #include "llvm/Support/raw_ostream.h"
  33 #include "llvm/ADT/BitVector.h"
  34 #include "llvm/ADT/STLExtras.h"
  35 #include <cstdlib>
  36 using namespace llvm;
  37
  38 //These describe LDAx
  39 static const int IMM_LOW  = -32768;
  40 static const int IMM_HIGH = 32767;
  41 static const int IMM_MULT = 65536;
  42
  43 static long getUpper16(long l)
  44 {
  45   long y = l / IMM_MULT;
  46   if (l % IMM_MULT > IMM_HIGH)
  47     ++y;
  48   return y;
  49 }
  50
  51 static long getLower16(long l)
  52 {
  53   long h = getUpper16(l);
  54   return l - h * IMM_MULT;
  55 }
  56
  57 AlphaRegisterInfo::AlphaRegisterInfo(const TargetInstrInfo &tii)
  58   : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP),
  59     TII(tii), curgpdist(0)
  60 {
  61 }
  62
  63 const unsigned* AlphaRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
  64                                                                          const {
  65   static const unsigned CalleeSavedRegs[] = {
  66     Alpha::R9, Alpha::R10,
  67     Alpha::R11, Alpha::R12,
  68     Alpha::R13, Alpha::R14,
  69     Alpha::F2, Alpha::F3,
  70     Alpha::F4, Alpha::F5,
  71     Alpha::F6, Alpha::F7,
  72     Alpha::F8, Alpha::F9,  0
  73   };
  74   return CalleeSavedRegs;
  75 }
  76
  77 BitVector AlphaRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
  78   BitVector Reserved(getNumRegs());
  79   Reserved.set(Alpha::R15);
  80   Reserved.set(Alpha::R30);
  81   Reserved.set(Alpha::R31);
  82   return Reserved;
  83 }
  84
  85 //===----------------------------------------------------------------------===//
  86 // Stack Frame Processing methods
  87 //===----------------------------------------------------------------------===//
  88
  89 // hasFP - Return true if the specified function should have a dedicated frame
  90 // pointer register.  This is true if the function has variable sized allocas or
  91 // if frame pointer elimination is disabled.
  92 //
  93 bool AlphaRegisterInfo::hasFP(const MachineFunction &MF) const {
  94   const MachineFrameInfo *MFI = MF.getFrameInfo();
  95   return MFI->hasVarSizedObjects();
  96 }
  97
  98 void AlphaRegisterInfo::
  99 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
 100                               MachineBasicBlock::iterator I) const {
 101   if (hasFP(MF)) {
 102     // If we have a frame pointer, turn the adjcallstackup instruction into a
 103     // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
 104     // <amt>'
 105     MachineInstr *Old = I;
 106     uint64_t Amount = Old->getOperand(0).getImm();
 107     if (Amount != 0) {
 108       // We need to keep the stack aligned properly.  To do this, we round the
 109       // amount of space needed for the outgoing arguments up to the next
 110       // alignment boundary.
 111       unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
 112       Amount = (Amount+Align-1)/Align*Align;
 113
 114       MachineInstr *New;
 115       if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) {
 116         New=BuildMI(MF, Old->getDebugLoc(), TII.get(Alpha::LDA), Alpha::R30)
 117           .addImm(-Amount).addReg(Alpha::R30);
 118       } else {
 119          assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP);
 120          New=BuildMI(MF, Old->getDebugLoc(), TII.get(Alpha::LDA), Alpha::R30)
 121           .addImm(Amount).addReg(Alpha::R30);
 122       }
 123
 124       // Replace the pseudo instruction with a new instruction...
 125       MBB.insert(I, New);
 126     }
 127   }
 128
 129   MBB.erase(I);
 130 }
 131
 132 //Alpha has a slightly funny stack:
 133 //Args
 134 //<- incoming SP
 135 //fixed locals (and spills, callee saved, etc)
 136 //<- FP
 137 //variable locals
 138 //<- SP
 139
 140 void
 141 AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
 142                                        int SPAdj, RegScavenger *RS) const {
 143   assert(SPAdj == 0 && "Unexpected");
 144
 145   unsigned i = 0;
 146   MachineInstr &MI = *II;
 147   MachineBasicBlock &MBB = *MI.getParent();
 148   MachineFunction &MF = *MBB.getParent();
 149   bool FP = hasFP(MF);
 150
 151   while (!MI.getOperand(i).isFI()) {
 152     ++i;
 153     assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
 154   }
 155
 156   int FrameIndex = MI.getOperand(i).getIndex();
 157
 158   // Add the base register of R30 (SP) or R15 (FP).
 159   MI.getOperand(i + 1).ChangeToRegister(FP ? Alpha::R15 : Alpha::R30, false);
 160
 161   // Now add the frame object offset to the offset from the virtual frame index.
 162   int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
 163
 164   DEBUG(errs() << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
 165
 166   Offset += MF.getFrameInfo()->getStackSize();
 167
 168   DEBUG(errs() << "Corrected Offset " << Offset
 169        << " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
 170
 171   if (Offset > IMM_HIGH || Offset < IMM_LOW) {
 172     DEBUG(errs() << "Unconditionally using R28 for evil purposes Offset: "
 173           << Offset << "\n");
 174     //so in this case, we need to use a temporary register, and move the
 175     //original inst off the SP/FP
 176     //fix up the old:
 177     MI.getOperand(i + 1).ChangeToRegister(Alpha::R28, false);
 178     MI.getOperand(i).ChangeToImmediate(getLower16(Offset));
 179     //insert the new
 180     MachineInstr* nMI=BuildMI(MF, MI.getDebugLoc(),
 181                               TII.get(Alpha::LDAH), Alpha::R28)
 182       .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
 183     MBB.insert(II, nMI);
 184   } else {
 185     MI.getOperand(i).ChangeToImmediate(Offset);
 186   }
 187 }
 188
 189
 190 void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
 191   MachineBasicBlock &MBB = MF.front();   // Prolog goes in entry BB
 192   MachineBasicBlock::iterator MBBI = MBB.begin();
 193   MachineFrameInfo *MFI = MF.getFrameInfo();
 194   DebugLoc dl = (MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc());
 195   bool FP = hasFP(MF);
 196
 197   //handle GOP offset
 198   BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAHg), Alpha::R29)
 199     .addGlobalAddress(MF.getFunction())
 200     .addReg(Alpha::R27).addImm(++curgpdist);
 201   BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAg), Alpha::R29)
 202     .addGlobalAddress(MF.getFunction())
 203     .addReg(Alpha::R29).addImm(curgpdist);
 204
 205   BuildMI(MBB, MBBI, dl, TII.get(Alpha::ALTENT))
 206     .addGlobalAddress(MF.getFunction());
 207
 208   // Get the number of bytes to allocate from the FrameInfo
 209   long NumBytes = MFI->getStackSize();
 210
 211   if (FP)
 212     NumBytes += 8; //reserve space for the old FP
 213
 214   // Do we need to allocate space on the stack?
 215   if (NumBytes == 0) return;
 216
 217   unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
 218   NumBytes = (NumBytes+Align-1)/Align*Align;
 219
 220   // Update frame info to pretend that this is part of the stack...
 221   MFI->setStackSize(NumBytes);
 222
 223   // adjust stack pointer: r30 -= numbytes
 224   NumBytes = -NumBytes;
 225   if (NumBytes >= IMM_LOW) {
 226     BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30).addImm(NumBytes)
 227       .addReg(Alpha::R30);
 228   } else if (getUpper16(NumBytes) >= IMM_LOW) {
 229     BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAH), Alpha::R30)
 230       .addImm(getUpper16(NumBytes)).addReg(Alpha::R30);
 231     BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30)
 232       .addImm(getLower16(NumBytes)).addReg(Alpha::R30);
 233   } else {
 234     report_fatal_error("Too big a stack frame at " + Twine(NumBytes));
 235   }
 236
 237   //now if we need to, save the old FP and set the new
 238   if (FP)
 239   {
 240     BuildMI(MBB, MBBI, dl, TII.get(Alpha::STQ))
 241       .addReg(Alpha::R15).addImm(0).addReg(Alpha::R30);
 242     //this must be the last instr in the prolog
 243     BuildMI(MBB, MBBI, dl, TII.get(Alpha::BISr), Alpha::R15)
 244       .addReg(Alpha::R30).addReg(Alpha::R30);
 245   }
 246
 247 }
 248
 249 void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF,
 250                                      MachineBasicBlock &MBB) const {
 251   const MachineFrameInfo *MFI = MF.getFrameInfo();
 252   MachineBasicBlock::iterator MBBI = prior(MBB.end());
 253   assert((MBBI->getOpcode() == Alpha::RETDAG ||
 254           MBBI->getOpcode() == Alpha::RETDAGp)
 255          && "Can only insert epilog into returning blocks");
 256   DebugLoc dl = MBBI->getDebugLoc();
 257
 258   bool FP = hasFP(MF);
 259
 260   // Get the number of bytes allocated from the FrameInfo...
 261   long NumBytes = MFI->getStackSize();
 262
 263   //now if we need to, restore the old FP
 264   if (FP) {
 265     //copy the FP into the SP (discards allocas)
 266     BuildMI(MBB, MBBI, dl, TII.get(Alpha::BISr), Alpha::R30).addReg(Alpha::R15)
 267       .addReg(Alpha::R15);
 268     //restore the FP
 269     BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDQ), Alpha::R15)
 270       .addImm(0).addReg(Alpha::R15);
 271   }
 272
 273   if (NumBytes != 0) {
 274     if (NumBytes <= IMM_HIGH) {
 275       BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30).addImm(NumBytes)
 276         .addReg(Alpha::R30);
 277     } else if (getUpper16(NumBytes) <= IMM_HIGH) {
 278       BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAH), Alpha::R30)
 279         .addImm(getUpper16(NumBytes)).addReg(Alpha::R30);
 280       BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30)
 281         .addImm(getLower16(NumBytes)).addReg(Alpha::R30);
 282     } else {
 283       report_fatal_error("Too big a stack frame at " + Twine(NumBytes));
 284     }
 285   }
 286 }
 287
 288 unsigned AlphaRegisterInfo::getRARegister() const {
 289   return Alpha::R26;
 290 }
 291
 292 unsigned AlphaRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
 293   return hasFP(MF) ? Alpha::R15 : Alpha::R30;
 294 }
 295
 296 unsigned AlphaRegisterInfo::getEHExceptionRegister() const {
 297   llvm_unreachable("What is the exception register");
 298   return 0;
 299 }
 300
 301 unsigned AlphaRegisterInfo::getEHHandlerRegister() const {
 302   llvm_unreachable("What is the exception handler register");
 303   return 0;
 304 }
 305
 306 int AlphaRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
 307   llvm_unreachable("What is the dwarf register number");
 308   return -1;
 309 }
 310
 311 #include "AlphaGenRegisterInfo.inc"
 312
 313 std::string AlphaRegisterInfo::getPrettyName(unsigned reg)
 314 {
 315   std::string s(RegisterDescriptors[reg].Name);
 316   return s;
 317 }