lib/Target/Blackfin/BlackfinISelLowering.h

   1 //===- BlackfinISelLowering.h - Blackfin DAG Lowering Interface -*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines the interfaces that Blackfin uses to lower LLVM code into a
  11 // selection DAG.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 #ifndef BLACKFIN_ISELLOWERING_H
  16 #define BLACKFIN_ISELLOWERING_H
  17
  18 #include "llvm/Target/TargetLowering.h"
  19 #include "Blackfin.h"
  20
  21 namespace llvm {
  22
  23   namespace BFISD {
  24     enum {
  25       FIRST_NUMBER = ISD::BUILTIN_OP_END,
  26       CALL,                     // A call instruction.
  27       RET_FLAG,                 // Return with a flag operand.
  28       Wrapper                   // Address wrapper
  29     };
  30   }
  31
  32   class BlackfinTargetLowering : public TargetLowering {
  33   public:
  34     BlackfinTargetLowering(TargetMachine &TM);
  35     virtual MVT::SimpleValueType getSetCCResultType(EVT VT) const;
  36     virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
  37     virtual void ReplaceNodeResults(SDNode *N,
  38                                     SmallVectorImpl<SDValue> &Results,
  39                                     SelectionDAG &DAG) const;
  40
  41     ConstraintType getConstraintType(const std::string &Constraint) const;
  42
  43     /// Examine constraint string and operand type and determine a weight value.
  44     /// The operand object must already have been set up with the operand type.
  45     ConstraintWeight getSingleConstraintMatchWeight(
  46       AsmOperandInfo &info, const char *constraint) const;
  47
  48     std::pair<unsigned, const TargetRegisterClass*>
  49     getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
  50     std::vector<unsigned>
  51     getRegClassForInlineAsmConstraint(const std::string &Constraint,
  52                                       EVT VT) const;
  53     virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
  54     const char *getTargetNodeName(unsigned Opcode) const;
  55     unsigned getFunctionAlignment(const Function *F) const;
  56
  57   private:
  58     SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
  59     SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
  60     SDValue LowerADDE(SDValue Op, SelectionDAG &DAG) const;
  61
  62     virtual SDValue
  63       LowerFormalArguments(SDValue Chain,
  64                            CallingConv::ID CallConv, bool isVarArg,
  65                            const SmallVectorImpl<ISD::InputArg> &Ins,
  66                            DebugLoc dl, SelectionDAG &DAG,
  67                            SmallVectorImpl<SDValue> &InVals) const;
  68     virtual SDValue
  69       LowerCall(SDValue Chain, SDValue Callee,
  70                 CallingConv::ID CallConv, bool isVarArg, bool &isTailCall,
  71                 const SmallVectorImpl<ISD::OutputArg> &Outs,
  72                 const SmallVectorImpl<SDValue> &OutVals,
  73                 const SmallVectorImpl<ISD::InputArg> &Ins,
  74                 DebugLoc dl, SelectionDAG &DAG,
  75                 SmallVectorImpl<SDValue> &InVals) const;
  76
  77     virtual SDValue
  78       LowerReturn(SDValue Chain,
  79                   CallingConv::ID CallConv, bool isVarArg,
  80                   const SmallVectorImpl<ISD::OutputArg> &Outs,
  81                   const SmallVectorImpl<SDValue> &OutVals,
  82                   DebugLoc dl, SelectionDAG &DAG) const;
  83   };
  84 } // end namespace llvm
  85
  86 #endif    // BLACKFIN_ISELLOWERING_H