Fixed some bugs.
[llvm/zpu.git] / lib / Target / X86 / X86.h
blob27e88505150b4b4cef2bb5d3ee356be296bf7620
1 //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the entry points for global functions defined in the x86
11 // target library, as used by the LLVM JIT.
13 //===----------------------------------------------------------------------===//
15 #ifndef TARGET_X86_H
16 #define TARGET_X86_H
18 #include "llvm/Target/TargetMachine.h"
20 namespace llvm {
22 class FunctionPass;
23 class JITCodeEmitter;
24 class MCCodeEmitter;
25 class MCContext;
26 class MachineCodeEmitter;
27 class Target;
28 class TargetAsmBackend;
29 class X86TargetMachine;
30 class formatted_raw_ostream;
32 /// createX86ISelDag - This pass converts a legalized DAG into a
33 /// X86-specific DAG, ready for instruction scheduling.
34 ///
35 FunctionPass *createX86ISelDag(X86TargetMachine &TM,
36 CodeGenOpt::Level OptLevel);
38 /// createGlobalBaseRegPass - This pass initializes a global base
39 /// register for PIC on x86-32.
40 FunctionPass* createGlobalBaseRegPass();
42 /// createX86FloatingPointStackifierPass - This function returns a pass which
43 /// converts floating point register references and pseudo instructions into
44 /// floating point stack references and physical instructions.
45 ///
46 FunctionPass *createX86FloatingPointStackifierPass();
48 /// createSSEDomainFixPass - This pass twiddles SSE opcodes to prevent domain
49 /// crossings.
50 FunctionPass *createSSEDomainFixPass();
52 /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
53 /// to the specified MCE object.
54 FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
55 JITCodeEmitter &JCE);
57 MCCodeEmitter *createX86_32MCCodeEmitter(const Target &, TargetMachine &TM,
58 MCContext &Ctx);
59 MCCodeEmitter *createX86_64MCCodeEmitter(const Target &, TargetMachine &TM,
60 MCContext &Ctx);
62 TargetAsmBackend *createX86_32AsmBackend(const Target &, const std::string &);
63 TargetAsmBackend *createX86_64AsmBackend(const Target &, const std::string &);
65 /// createX86EmitCodeToMemory - Returns a pass that converts a register
66 /// allocated function into raw machine code in a dynamically
67 /// allocated chunk of memory.
68 ///
69 FunctionPass *createEmitX86CodeToMemory();
71 /// createX86MaxStackAlignmentHeuristicPass - This function returns a pass
72 /// which determines whether the frame pointer register should be
73 /// reserved in case dynamic stack alignment is later required.
74 ///
75 FunctionPass *createX86MaxStackAlignmentHeuristicPass();
77 extern Target TheX86_32Target, TheX86_64Target;
79 } // End llvm namespace
81 // Defines symbolic names for X86 registers. This defines a mapping from
82 // register name to register number.
84 #include "X86GenRegisterNames.inc"
86 // Defines symbolic names for the X86 instructions.
88 #include "X86GenInstrNames.inc"
90 #endif