Fixed some bugs.

[llvm/zpu.git] / test / CodeGen / ARM / fpow.ll

; RUN: llc < %s -march=arm

define double @t(double %x, double %y) nounwind optsize {
entry:
        %0 = tail call double @llvm.pow.f64( double %x, double %y )             ; <double> [#uses=1]
        ret double %0
}

declare double @llvm.pow.f64(double, double) nounwind readonly