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Fixed some bugs.
[llvm/zpu.git]
/
test
/
CodeGen
/
X86
/
pr3216.ll
blob
38c9f324ccac447f7d1b9f31901aefb26701b2e2
1
; RUN: llc < %s -march=x86 | grep {sar. \$5}
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@foo = global i8 127
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define i32 @main() nounwind {
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entry:
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%tmp = load i8* @foo
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%bf.lo = lshr i8 %tmp, 5
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%bf.lo.cleared = and i8 %bf.lo, 7
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%0 = shl i8 %bf.lo.cleared, 5
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%bf.val.sext = ashr i8 %0, 5
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%conv = sext i8 %bf.val.sext to i32
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ret i32 %conv
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}