test/MC/ARM/neon-bitcount-encoding.s

   1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
   2 @ XFAIL: *
   3
   4 @ CHECK: vcnt.8 d16, d16                @ encoding: [0x20,0x05,0xf0,0xf3]
   5         vcnt.8  d16, d16
   6 @ CHECK: vcnt.8 q8, q8                  @ encoding: [0x60,0x05,0xf0,0xf3]
   7         vcnt.8  q8, q8
   8 @ CHECK: vclz.i8        d16, d16                @ encoding: [0xa0,0x04,0xf0,0xf3]
   9         vclz.i8 d16, d16
  10 @ CHECK: vclz.i16       d16, d16        @ encoding: [0xa0,0x04,0xf4,0xf3]
  11         vclz.i16        d16, d16
  12 @ CHECK: vclz.i32       d16, d16        @ encoding: [0xa0,0x04,0xf8,0xf3]
  13         vclz.i32        d16, d16
  14 @ CHECK: vclz.i8        q8, q8                  @ encoding: [0xe0,0x04,0xf0,0xf3]
  15         vclz.i8 q8, q8
  16 @ CHECK: vclz.i16       q8, q8          @ encoding: [0xe0,0x04,0xf4,0xf3]
  17         vclz.i16        q8, q8
  18 @ CHECK: vclz.i32       q8, q8          @ encoding: [0xe0,0x04,0xf8,0xf3]
  19         vclz.i32        q8, q8
  20 @ CHECK: vcls.s8        d16, d16                @ encoding: [0x20,0x04,0xf0,0xf3]
  21         vcls.s8 d16, d16
  22 @ CHECK: vcls.s16       d16, d16        @ encoding: [0x20,0x04,0xf4,0xf3]
  23         vcls.s16        d16, d16
  24 @ CHECK: vcls.s32       d16, d16        @ encoding: [0x20,0x04,0xf8,0xf3]
  25         vcls.s32        d16, d16
  26 @ CHECK: vcls.s8        q8, q8                  @ encoding: [0x60,0x04,0xf0,0xf3]
  27         vcls.s8 q8, q8
  28 @ CHECK: vcls.s16       q8, q8          @ encoding: [0x60,0x04,0xf4,0xf3]
  29         vcls.s16        q8, q8
  30 @ CHECK: vcls.s32       q8, q8          @ encoding: [0x60,0x04,0xf8,0xf3]
  31         vcls.s32        q8, q8
  32