arch/x86/kernel/cpu/cpufreq/speedstep-ich.c

   1 /*
   2  * (C) 2001  Dave Jones, Arjan van de ven.
   3  * (C) 2002 - 2003  Dominik Brodowski <linux@brodo.de>
   4  *
   5  *  Licensed under the terms of the GNU GPL License version 2.
   6  *  Based upon reverse engineered information, and on Intel documentation
   7  *  for chipsets ICH2-M and ICH3-M.
   8  *
   9  *  Many thanks to Ducrot Bruno for finding and fixing the last
  10  *  "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
  11  *  for extensive testing.
  12  *
  13  *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
  14  */
  15
  16
  17 /*********************************************************************
  18  *                        SPEEDSTEP - DEFINITIONS                    *
  19  *********************************************************************/
  20
  21 #include <linux/kernel.h>
  22 #include <linux/module.h>
  23 #include <linux/init.h>
  24 #include <linux/cpufreq.h>
  25 #include <linux/pci.h>
  26 #include <linux/slab.h>
  27 #include <linux/sched.h>
  28
  29 #include "speedstep-lib.h"
  30
  31
  32 /* speedstep_chipset:
  33  *   It is necessary to know which chipset is used. As accesses to
  34  * this device occur at various places in this module, we need a
  35  * static struct pci_dev * pointing to that device.
  36  */
  37 static struct pci_dev *speedstep_chipset_dev;
  38
  39
  40 /* speedstep_processor
  41  */
  42 static unsigned int speedstep_processor;
  43
  44 static u32 pmbase;
  45
  46 /*
  47  *   There are only two frequency states for each processor. Values
  48  * are in kHz for the time being.
  49  */
  50 static struct cpufreq_frequency_table speedstep_freqs[] = {
  51         {SPEEDSTEP_HIGH,        0},
  52         {SPEEDSTEP_LOW,         0},
  53         {0,                     CPUFREQ_TABLE_END},
  54 };
  55
  56
  57 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
  58                 "speedstep-ich", msg)
  59
  60
  61 /**
  62  * speedstep_find_register - read the PMBASE address
  63  *
  64  * Returns: -ENODEV if no register could be found
  65  */
  66 static int speedstep_find_register(void)
  67 {
  68         if (!speedstep_chipset_dev)
  69                 return -ENODEV;
  70
  71         /* get PMBASE */
  72         pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
  73         if (!(pmbase & 0x01)) {
  74                 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
  75                 return -ENODEV;
  76         }
  77
  78         pmbase &= 0xFFFFFFFE;
  79         if (!pmbase) {
  80                 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
  81                 return -ENODEV;
  82         }
  83
  84         dprintk("pmbase is 0x%x\n", pmbase);
  85         return 0;
  86 }
  87
  88 /**
  89  * speedstep_set_state - set the SpeedStep state
  90  * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
  91  *
  92  *   Tries to change the SpeedStep state.  Can be called from
  93  *   smp_call_function_single.
  94  */
  95 static void speedstep_set_state(unsigned int state)
  96 {
  97         u8 pm2_blk;
  98         u8 value;
  99         unsigned long flags;
 100
 101         if (state > 0x1)
 102                 return;
 103
 104         /* Disable IRQs */
 105         local_irq_save(flags);
 106
 107         /* read state */
 108         value = inb(pmbase + 0x50);
 109
 110         dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
 111
 112         /* write new state */
 113         value &= 0xFE;
 114         value |= state;
 115
 116         dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
 117
 118         /* Disable bus master arbitration */
 119         pm2_blk = inb(pmbase + 0x20);
 120         pm2_blk |= 0x01;
 121         outb(pm2_blk, (pmbase + 0x20));
 122
 123         /* Actual transition */
 124         outb(value, (pmbase + 0x50));
 125
 126         /* Restore bus master arbitration */
 127         pm2_blk &= 0xfe;
 128         outb(pm2_blk, (pmbase + 0x20));
 129
 130         /* check if transition was successful */
 131         value = inb(pmbase + 0x50);
 132
 133         /* Enable IRQs */
 134         local_irq_restore(flags);
 135
 136         dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
 137
 138         if (state == (value & 0x1))
 139                 dprintk("change to %u MHz succeeded\n",
 140                         speedstep_get_frequency(speedstep_processor) / 1000);
 141         else
 142                 printk(KERN_ERR "cpufreq: change failed - I/O error\n");
 143
 144         return;
 145 }
 146
 147 /* Wrapper for smp_call_function_single. */
 148 static void _speedstep_set_state(void *_state)
 149 {
 150         speedstep_set_state(*(unsigned int *)_state);
 151 }
 152
 153 /**
 154  * speedstep_activate - activate SpeedStep control in the chipset
 155  *
 156  *   Tries to activate the SpeedStep status and control registers.
 157  * Returns -EINVAL on an unsupported chipset, and zero on success.
 158  */
 159 static int speedstep_activate(void)
 160 {
 161         u16 value = 0;
 162
 163         if (!speedstep_chipset_dev)
 164                 return -EINVAL;
 165
 166         pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
 167         if (!(value & 0x08)) {
 168                 value |= 0x08;
 169                 dprintk("activating SpeedStep (TM) registers\n");
 170                 pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
 171         }
 172
 173         return 0;
 174 }
 175
 176
 177 /**
 178  * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
 179  *
 180  *   Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
 181  * the LPC bridge / PM module which contains all power-management
 182  * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
 183  * chipset, or zero on failure.
 184  */
 185 static unsigned int speedstep_detect_chipset(void)
 186 {
 187         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 188                               PCI_DEVICE_ID_INTEL_82801DB_12,
 189                               PCI_ANY_ID, PCI_ANY_ID,
 190                               NULL);
 191         if (speedstep_chipset_dev)
 192                 return 4; /* 4-M */
 193
 194         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 195                               PCI_DEVICE_ID_INTEL_82801CA_12,
 196                               PCI_ANY_ID, PCI_ANY_ID,
 197                               NULL);
 198         if (speedstep_chipset_dev)
 199                 return 3; /* 3-M */
 200
 201
 202         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 203                               PCI_DEVICE_ID_INTEL_82801BA_10,
 204                               PCI_ANY_ID, PCI_ANY_ID,
 205                               NULL);
 206         if (speedstep_chipset_dev) {
 207                 /* speedstep.c causes lockups on Dell Inspirons 8000 and
 208                  * 8100 which use a pretty old revision of the 82815
 209                  * host brige. Abort on these systems.
 210                  */
 211                 static struct pci_dev *hostbridge;
 212
 213                 hostbridge  = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 214                               PCI_DEVICE_ID_INTEL_82815_MC,
 215                               PCI_ANY_ID, PCI_ANY_ID,
 216                               NULL);
 217
 218                 if (!hostbridge)
 219                         return 2; /* 2-M */
 220
 221                 if (hostbridge->revision < 5) {
 222                         dprintk("hostbridge does not support speedstep\n");
 223                         speedstep_chipset_dev = NULL;
 224                         pci_dev_put(hostbridge);
 225                         return 0;
 226                 }
 227
 228                 pci_dev_put(hostbridge);
 229                 return 2; /* 2-M */
 230         }
 231
 232         return 0;
 233 }
 234
 235 static void get_freq_data(void *_speed)
 236 {
 237         unsigned int *speed = _speed;
 238
 239         *speed = speedstep_get_frequency(speedstep_processor);
 240 }
 241
 242 static unsigned int speedstep_get(unsigned int cpu)
 243 {
 244         unsigned int speed;
 245
 246         /* You're supposed to ensure CPU is online. */
 247         if (smp_call_function_single(cpu, get_freq_data, &speed, 1) != 0)
 248                 BUG();
 249
 250         dprintk("detected %u kHz as current frequency\n", speed);
 251         return speed;
 252 }
 253
 254 /**
 255  * speedstep_target - set a new CPUFreq policy
 256  * @policy: new policy
 257  * @target_freq: the target frequency
 258  * @relation: how that frequency relates to achieved frequency
 259  *      (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
 260  *
 261  * Sets a new CPUFreq policy.
 262  */
 263 static int speedstep_target(struct cpufreq_policy *policy,
 264                              unsigned int target_freq,
 265                              unsigned int relation)
 266 {
 267         unsigned int newstate = 0, policy_cpu;
 268         struct cpufreq_freqs freqs;
 269         int i;
 270
 271         if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
 272                                 target_freq, relation, &newstate))
 273                 return -EINVAL;
 274
 275         policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
 276         freqs.old = speedstep_get(policy_cpu);
 277         freqs.new = speedstep_freqs[newstate].frequency;
 278         freqs.cpu = policy->cpu;
 279
 280         dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new);
 281
 282         /* no transition necessary */
 283         if (freqs.old == freqs.new)
 284                 return 0;
 285
 286         for_each_cpu(i, policy->cpus) {
 287                 freqs.cpu = i;
 288                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 289         }
 290
 291         smp_call_function_single(policy_cpu, _speedstep_set_state, &newstate,
 292                                  true);
 293
 294         for_each_cpu(i, policy->cpus) {
 295                 freqs.cpu = i;
 296                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 297         }
 298
 299         return 0;
 300 }
 301
 302
 303 /**
 304  * speedstep_verify - verifies a new CPUFreq policy
 305  * @policy: new policy
 306  *
 307  * Limit must be within speedstep_low_freq and speedstep_high_freq, with
 308  * at least one border included.
 309  */
 310 static int speedstep_verify(struct cpufreq_policy *policy)
 311 {
 312         return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
 313 }
 314
 315 struct get_freqs {
 316         struct cpufreq_policy *policy;
 317         int ret;
 318 };
 319
 320 static void get_freqs_on_cpu(void *_get_freqs)
 321 {
 322         struct get_freqs *get_freqs = _get_freqs;
 323
 324         get_freqs->ret =
 325                 speedstep_get_freqs(speedstep_processor,
 326                             &speedstep_freqs[SPEEDSTEP_LOW].frequency,
 327                             &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
 328                             &get_freqs->policy->cpuinfo.transition_latency,
 329                             &speedstep_set_state);
 330 }
 331
 332 static int speedstep_cpu_init(struct cpufreq_policy *policy)
 333 {
 334         int result;
 335         unsigned int policy_cpu, speed;
 336         struct get_freqs gf;
 337
 338         /* only run on CPU to be set, or on its sibling */
 339 #ifdef CONFIG_SMP
 340         cpumask_copy(policy->cpus, cpu_sibling_mask(policy->cpu));
 341 #endif
 342         policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
 343
 344         /* detect low and high frequency and transition latency */
 345         gf.policy = policy;
 346         smp_call_function_single(policy_cpu, get_freqs_on_cpu, &gf, 1);
 347         if (gf.ret)
 348                 return gf.ret;
 349
 350         /* get current speed setting */
 351         speed = speedstep_get(policy_cpu);
 352         if (!speed)
 353                 return -EIO;
 354
 355         dprintk("currently at %s speed setting - %i MHz\n",
 356                 (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
 357                 ? "low" : "high",
 358                 (speed / 1000));
 359
 360         /* cpuinfo and default policy values */
 361         policy->cur = speed;
 362
 363         result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
 364         if (result)
 365                 return result;
 366
 367         cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
 368
 369         return 0;
 370 }
 371
 372
 373 static int speedstep_cpu_exit(struct cpufreq_policy *policy)
 374 {
 375         cpufreq_frequency_table_put_attr(policy->cpu);
 376         return 0;
 377 }
 378
 379 static struct freq_attr *speedstep_attr[] = {
 380         &cpufreq_freq_attr_scaling_available_freqs,
 381         NULL,
 382 };
 383
 384
 385 static struct cpufreq_driver speedstep_driver = {
 386         .name   = "speedstep-ich",
 387         .verify = speedstep_verify,
 388         .target = speedstep_target,
 389         .init   = speedstep_cpu_init,
 390         .exit   = speedstep_cpu_exit,
 391         .get    = speedstep_get,
 392         .owner  = THIS_MODULE,
 393         .attr   = speedstep_attr,
 394 };
 395
 396
 397 /**
 398  * speedstep_init - initializes the SpeedStep CPUFreq driver
 399  *
 400  *   Initializes the SpeedStep support. Returns -ENODEV on unsupported
 401  * devices, -EINVAL on problems during initiatization, and zero on
 402  * success.
 403  */
 404 static int __init speedstep_init(void)
 405 {
 406         /* detect processor */
 407         speedstep_processor = speedstep_detect_processor();
 408         if (!speedstep_processor) {
 409                 dprintk("Intel(R) SpeedStep(TM) capable processor "
 410                                 "not found\n");
 411                 return -ENODEV;
 412         }
 413
 414         /* detect chipset */
 415         if (!speedstep_detect_chipset()) {
 416                 dprintk("Intel(R) SpeedStep(TM) for this chipset not "
 417                                 "(yet) available.\n");
 418                 return -ENODEV;
 419         }
 420
 421         /* activate speedstep support */
 422         if (speedstep_activate()) {
 423                 pci_dev_put(speedstep_chipset_dev);
 424                 return -EINVAL;
 425         }
 426
 427         if (speedstep_find_register())
 428                 return -ENODEV;
 429
 430         return cpufreq_register_driver(&speedstep_driver);
 431 }
 432
 433
 434 /**
 435  * speedstep_exit - unregisters SpeedStep support
 436  *
 437  *   Unregisters SpeedStep support.
 438  */
 439 static void __exit speedstep_exit(void)
 440 {
 441         pci_dev_put(speedstep_chipset_dev);
 442         cpufreq_unregister_driver(&speedstep_driver);
 443 }
 444
 445
 446 MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
 447                 "Dominik Brodowski <linux@brodo.de>");
 448 MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
 449                 "with ICH-M southbridges.");
 450 MODULE_LICENSE("GPL");
 451
 452 module_init(speedstep_init);
 453 module_exit(speedstep_exit);