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init from v2.6.32.60
[mach-moxart.git] / drivers / char / mxser.c
blob4b974068083774d844e78493cf843322238888c5
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
6 *
7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
18 * www.moxa.com.
19 * - Fixed x86_64 cleanness
20 */
21
22 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/smp_lock.h>
27 #include <linux/timer.h>
28 #include <linux/interrupt.h>
29 #include <linux/tty.h>
30 #include <linux/tty_flip.h>
31 #include <linux/serial.h>
32 #include <linux/serial_reg.h>
33 #include <linux/major.h>
34 #include <linux/string.h>
35 #include <linux/fcntl.h>
36 #include <linux/ptrace.h>
37 #include <linux/gfp.h>
38 #include <linux/ioport.h>
39 #include <linux/mm.h>
40 #include <linux/delay.h>
41 #include <linux/pci.h>
42 #include <linux/bitops.h>
43
44 #include <asm/system.h>
45 #include <asm/io.h>
46 #include <asm/irq.h>
47 #include <asm/uaccess.h>
48
49 #include "mxser.h"
50
51 #define MXSER_VERSION "2.0.5" /* 1.14 */
52 #define MXSERMAJOR 174
53
54 #define MXSER_BOARDS 4 /* Max. boards */
55 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
56 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
57 #define MXSER_ISR_PASS_LIMIT 100
58
59 /*CheckIsMoxaMust return value*/
60 #define MOXA_OTHER_UART 0x00
61 #define MOXA_MUST_MU150_HWID 0x01
62 #define MOXA_MUST_MU860_HWID 0x02
63
64 #define WAKEUP_CHARS 256
65
66 #define UART_MCR_AFE 0x20
67 #define UART_LSR_SPECIAL 0x1E
68
69 #define PCI_DEVICE_ID_POS104UL 0x1044
70 #define PCI_DEVICE_ID_CB108 0x1080
71 #define PCI_DEVICE_ID_CP102UF 0x1023
72 #define PCI_DEVICE_ID_CP112UL 0x1120
73 #define PCI_DEVICE_ID_CB114 0x1142
74 #define PCI_DEVICE_ID_CP114UL 0x1143
75 #define PCI_DEVICE_ID_CB134I 0x1341
76 #define PCI_DEVICE_ID_CP138U 0x1380
77
78
79 #define C168_ASIC_ID 1
80 #define C104_ASIC_ID 2
81 #define C102_ASIC_ID 0xB
82 #define CI132_ASIC_ID 4
83 #define CI134_ASIC_ID 3
84 #define CI104J_ASIC_ID 5
85
86 #define MXSER_HIGHBAUD 1
87 #define MXSER_HAS2 2
88
89 /* This is only for PCI */
90 static const struct {
91 int type;
92 int tx_fifo;
93 int rx_fifo;
94 int xmit_fifo_size;
95 int rx_high_water;
96 int rx_trigger;
97 int rx_low_water;
98 long max_baud;
99 } Gpci_uart_info[] = {
100 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
101 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
102 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
103 };
104 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
105
106 struct mxser_cardinfo {
107 char *name;
108 unsigned int nports;
109 unsigned int flags;
110 };
111
112 static const struct mxser_cardinfo mxser_cards[] = {
113 /* 0*/ { "C168 series", 8, },
114 { "C104 series", 4, },
115 { "CI-104J series", 4, },
116 { "C168H/PCI series", 8, },
117 { "C104H/PCI series", 4, },
118 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
119 { "CI-132 series", 4, MXSER_HAS2 },
120 { "CI-134 series", 4, },
121 { "CP-132 series", 2, },
122 { "CP-114 series", 4, },
123 /*10*/ { "CT-114 series", 4, },
124 { "CP-102 series", 2, MXSER_HIGHBAUD },
125 { "CP-104U series", 4, },
126 { "CP-168U series", 8, },
127 { "CP-132U series", 2, },
128 /*15*/ { "CP-134U series", 4, },
129 { "CP-104JU series", 4, },
130 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
131 { "CP-118U series", 8, },
132 { "CP-102UL series", 2, },
133 /*20*/ { "CP-102U series", 2, },
134 { "CP-118EL series", 8, },
135 { "CP-168EL series", 8, },
136 { "CP-104EL series", 4, },
137 { "CB-108 series", 8, },
138 /*25*/ { "CB-114 series", 4, },
139 { "CB-134I series", 4, },
140 { "CP-138U series", 8, },
141 { "POS-104UL series", 4, },
142 { "CP-114UL series", 4, },
143 /*30*/ { "CP-102UF series", 2, },
144 { "CP-112UL series", 2, },
145 };
146
147 /* driver_data correspond to the lines in the structure above
148 see also ISA probe function before you change something */
149 static struct pci_device_id mxser_pcibrds[] = {
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
175 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
176 { }
177 };
178 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
179
180 static unsigned long ioaddr[MXSER_BOARDS];
181 static int ttymajor = MXSERMAJOR;
182
183 /* Variables for insmod */
184
185 MODULE_AUTHOR("Casper Yang");
186 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
187 module_param_array(ioaddr, ulong, NULL, 0);
188 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
189 module_param(ttymajor, int, 0);
190 MODULE_LICENSE("GPL");
191
192 struct mxser_log {
193 int tick;
194 unsigned long rxcnt[MXSER_PORTS];
195 unsigned long txcnt[MXSER_PORTS];
196 };
197
198 struct mxser_mon {
199 unsigned long rxcnt;
200 unsigned long txcnt;
201 unsigned long up_rxcnt;
202 unsigned long up_txcnt;
203 int modem_status;
204 unsigned char hold_reason;
205 };
206
207 struct mxser_mon_ext {
208 unsigned long rx_cnt[32];
209 unsigned long tx_cnt[32];
210 unsigned long up_rxcnt[32];
211 unsigned long up_txcnt[32];
212 int modem_status[32];
213
214 long baudrate[32];
215 int databits[32];
216 int stopbits[32];
217 int parity[32];
218 int flowctrl[32];
219 int fifo[32];
220 int iftype[32];
221 };
222
223 struct mxser_board;
224
225 struct mxser_port {
226 struct tty_port port;
227 struct mxser_board *board;
228
229 unsigned long ioaddr;
230 unsigned long opmode_ioaddr;
231 int max_baud;
232
233 int rx_high_water;
234 int rx_trigger; /* Rx fifo trigger level */
235 int rx_low_water;
236 int baud_base; /* max. speed */
237 int type; /* UART type */
238
239 int x_char; /* xon/xoff character */
240 int IER; /* Interrupt Enable Register */
241 int MCR; /* Modem control register */
242
243 unsigned char stop_rx;
244 unsigned char ldisc_stop_rx;
245
246 int custom_divisor;
247 unsigned char err_shadow;
248
249 struct async_icount icount; /* kernel counters for 4 input interrupts */
250 int timeout;
251
252 int read_status_mask;
253 int ignore_status_mask;
254 int xmit_fifo_size;
255 int xmit_head;
256 int xmit_tail;
257 int xmit_cnt;
258
259 struct ktermios normal_termios;
260
261 struct mxser_mon mon_data;
262
263 spinlock_t slock;
264 };
265
266 struct mxser_board {
267 unsigned int idx;
268 int irq;
269 const struct mxser_cardinfo *info;
270 unsigned long vector;
271 unsigned long vector_mask;
272
273 int chip_flag;
274 int uart_type;
275
276 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
277 };
278
279 struct mxser_mstatus {
280 tcflag_t cflag;
281 int cts;
282 int dsr;
283 int ri;
284 int dcd;
285 };
286
287 static struct mxser_board mxser_boards[MXSER_BOARDS];
288 static struct tty_driver *mxvar_sdriver;
289 static struct mxser_log mxvar_log;
290 static int mxser_set_baud_method[MXSER_PORTS + 1];
291
292 static void mxser_enable_must_enchance_mode(unsigned long baseio)
293 {
294 u8 oldlcr;
295 u8 efr;
296
297 oldlcr = inb(baseio + UART_LCR);
298 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
299
300 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
301 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
302
303 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
304 outb(oldlcr, baseio + UART_LCR);
305 }
306
307 static void mxser_disable_must_enchance_mode(unsigned long baseio)
308 {
309 u8 oldlcr;
310 u8 efr;
311
312 oldlcr = inb(baseio + UART_LCR);
313 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
314
315 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
316 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
317
318 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
319 outb(oldlcr, baseio + UART_LCR);
320 }
321
322 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
323 {
324 u8 oldlcr;
325 u8 efr;
326
327 oldlcr = inb(baseio + UART_LCR);
328 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
329
330 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
331 efr &= ~MOXA_MUST_EFR_BANK_MASK;
332 efr |= MOXA_MUST_EFR_BANK0;
333
334 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
335 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
336 outb(oldlcr, baseio + UART_LCR);
337 }
338
339 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
340 {
341 u8 oldlcr;
342 u8 efr;
343
344 oldlcr = inb(baseio + UART_LCR);
345 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
346
347 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
348 efr &= ~MOXA_MUST_EFR_BANK_MASK;
349 efr |= MOXA_MUST_EFR_BANK0;
350
351 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
352 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
353 outb(oldlcr, baseio + UART_LCR);
354 }
355
356 static void mxser_set_must_fifo_value(struct mxser_port *info)
357 {
358 u8 oldlcr;
359 u8 efr;
360
361 oldlcr = inb(info->ioaddr + UART_LCR);
362 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
363
364 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
365 efr &= ~MOXA_MUST_EFR_BANK_MASK;
366 efr |= MOXA_MUST_EFR_BANK1;
367
368 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
369 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
370 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
371 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
372 outb(oldlcr, info->ioaddr + UART_LCR);
373 }
374
375 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
376 {
377 u8 oldlcr;
378 u8 efr;
379
380 oldlcr = inb(baseio + UART_LCR);
381 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
382
383 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
384 efr &= ~MOXA_MUST_EFR_BANK_MASK;
385 efr |= MOXA_MUST_EFR_BANK2;
386
387 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
388 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
389 outb(oldlcr, baseio + UART_LCR);
390 }
391
392 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
393 {
394 u8 oldlcr;
395 u8 efr;
396
397 oldlcr = inb(baseio + UART_LCR);
398 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
399
400 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
401 efr &= ~MOXA_MUST_EFR_BANK_MASK;
402 efr |= MOXA_MUST_EFR_BANK2;
403
404 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
405 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
406 outb(oldlcr, baseio + UART_LCR);
407 }
408
409 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
410 {
411 u8 oldlcr;
412 u8 efr;
413
414 oldlcr = inb(baseio + UART_LCR);
415 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
416
417 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
418 efr &= ~MOXA_MUST_EFR_SF_MASK;
419
420 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
421 outb(oldlcr, baseio + UART_LCR);
422 }
423
424 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
425 {
426 u8 oldlcr;
427 u8 efr;
428
429 oldlcr = inb(baseio + UART_LCR);
430 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
431
432 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
433 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
434 efr |= MOXA_MUST_EFR_SF_TX1;
435
436 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
437 outb(oldlcr, baseio + UART_LCR);
438 }
439
440 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
441 {
442 u8 oldlcr;
443 u8 efr;
444
445 oldlcr = inb(baseio + UART_LCR);
446 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
447
448 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
449 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
450
451 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
452 outb(oldlcr, baseio + UART_LCR);
453 }
454
455 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
456 {
457 u8 oldlcr;
458 u8 efr;
459
460 oldlcr = inb(baseio + UART_LCR);
461 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
462
463 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
464 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
465 efr |= MOXA_MUST_EFR_SF_RX1;
466
467 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
468 outb(oldlcr, baseio + UART_LCR);
469 }
470
471 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
472 {
473 u8 oldlcr;
474 u8 efr;
475
476 oldlcr = inb(baseio + UART_LCR);
477 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
478
479 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
480 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
481
482 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
483 outb(oldlcr, baseio + UART_LCR);
484 }
485
486 #ifdef CONFIG_PCI
487 static int __devinit CheckIsMoxaMust(unsigned long io)
488 {
489 u8 oldmcr, hwid;
490 int i;
491
492 outb(0, io + UART_LCR);
493 mxser_disable_must_enchance_mode(io);
494 oldmcr = inb(io + UART_MCR);
495 outb(0, io + UART_MCR);
496 mxser_set_must_xon1_value(io, 0x11);
497 if ((hwid = inb(io + UART_MCR)) != 0) {
498 outb(oldmcr, io + UART_MCR);
499 return MOXA_OTHER_UART;
500 }
501
502 mxser_get_must_hardware_id(io, &hwid);
503 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
504 if (hwid == Gpci_uart_info[i].type)
505 return (int)hwid;
506 }
507 return MOXA_OTHER_UART;
508 }
509 #endif
510
511 static void process_txrx_fifo(struct mxser_port *info)
512 {
513 int i;
514
515 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
516 info->rx_trigger = 1;
517 info->rx_high_water = 1;
518 info->rx_low_water = 1;
519 info->xmit_fifo_size = 1;
520 } else
521 for (i = 0; i < UART_INFO_NUM; i++)
522 if (info->board->chip_flag == Gpci_uart_info[i].type) {
523 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
524 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
525 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
526 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
527 break;
528 }
529 }
530
531 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
532 {
533 static unsigned char mxser_msr[MXSER_PORTS + 1];
534 unsigned char status = 0;
535
536 status = inb(baseaddr + UART_MSR);
537
538 mxser_msr[port] &= 0x0F;
539 mxser_msr[port] |= status;
540 status = mxser_msr[port];
541 if (mode)
542 mxser_msr[port] = 0;
543
544 return status;
545 }
546
547 static int mxser_carrier_raised(struct tty_port *port)
548 {
549 struct mxser_port *mp = container_of(port, struct mxser_port, port);
550 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
551 }
552
553 static void mxser_dtr_rts(struct tty_port *port, int on)
554 {
555 struct mxser_port *mp = container_of(port, struct mxser_port, port);
556 unsigned long flags;
557
558 spin_lock_irqsave(&mp->slock, flags);
559 if (on)
560 outb(inb(mp->ioaddr + UART_MCR) |
561 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
562 else
563 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
564 mp->ioaddr + UART_MCR);
565 spin_unlock_irqrestore(&mp->slock, flags);
566 }
567
568 static int mxser_set_baud(struct tty_struct *tty, long newspd)
569 {
570 struct mxser_port *info = tty->driver_data;
571 int quot = 0, baud;
572 unsigned char cval;
573
574 if (!info->ioaddr)
575 return -1;
576
577 if (newspd > info->max_baud)
578 return -1;
579
580 if (newspd == 134) {
581 quot = 2 * info->baud_base / 269;
582 tty_encode_baud_rate(tty, 134, 134);
583 } else if (newspd) {
584 quot = info->baud_base / newspd;
585 if (quot == 0)
586 quot = 1;
587 baud = info->baud_base/quot;
588 tty_encode_baud_rate(tty, baud, baud);
589 } else {
590 quot = 0;
591 }
592
593 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
594 info->timeout += HZ / 50; /* Add .02 seconds of slop */
595
596 if (quot) {
597 info->MCR |= UART_MCR_DTR;
598 outb(info->MCR, info->ioaddr + UART_MCR);
599 } else {
600 info->MCR &= ~UART_MCR_DTR;
601 outb(info->MCR, info->ioaddr + UART_MCR);
602 return 0;
603 }
604
605 cval = inb(info->ioaddr + UART_LCR);
606
607 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
608
609 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
610 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
611 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
612
613 #ifdef BOTHER
614 if (C_BAUD(tty) == BOTHER) {
615 quot = info->baud_base % newspd;
616 quot *= 8;
617 if (quot % newspd > newspd / 2) {
618 quot /= newspd;
619 quot++;
620 } else
621 quot /= newspd;
622
623 mxser_set_must_enum_value(info->ioaddr, quot);
624 } else
625 #endif
626 mxser_set_must_enum_value(info->ioaddr, 0);
627
628 return 0;
629 }
630
631 /*
632 * This routine is called to set the UART divisor registers to match
633 * the specified baud rate for a serial port.
634 */
635 static int mxser_change_speed(struct tty_struct *tty,
636 struct ktermios *old_termios)
637 {
638 struct mxser_port *info = tty->driver_data;
639 unsigned cflag, cval, fcr;
640 int ret = 0;
641 unsigned char status;
642
643 cflag = tty->termios->c_cflag;
644 if (!info->ioaddr)
645 return ret;
646
647 if (mxser_set_baud_method[tty->index] == 0)
648 mxser_set_baud(tty, tty_get_baud_rate(tty));
649
650 /* byte size and parity */
651 switch (cflag & CSIZE) {
652 case CS5:
653 cval = 0x00;
654 break;
655 case CS6:
656 cval = 0x01;
657 break;
658 case CS7:
659 cval = 0x02;
660 break;
661 case CS8:
662 cval = 0x03;
663 break;
664 default:
665 cval = 0x00;
666 break; /* too keep GCC shut... */
667 }
668 if (cflag & CSTOPB)
669 cval |= 0x04;
670 if (cflag & PARENB)
671 cval |= UART_LCR_PARITY;
672 if (!(cflag & PARODD))
673 cval |= UART_LCR_EPAR;
674 if (cflag & CMSPAR)
675 cval |= UART_LCR_SPAR;
676
677 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
678 if (info->board->chip_flag) {
679 fcr = UART_FCR_ENABLE_FIFO;
680 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
681 mxser_set_must_fifo_value(info);
682 } else
683 fcr = 0;
684 } else {
685 fcr = UART_FCR_ENABLE_FIFO;
686 if (info->board->chip_flag) {
687 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
688 mxser_set_must_fifo_value(info);
689 } else {
690 switch (info->rx_trigger) {
691 case 1:
692 fcr |= UART_FCR_TRIGGER_1;
693 break;
694 case 4:
695 fcr |= UART_FCR_TRIGGER_4;
696 break;
697 case 8:
698 fcr |= UART_FCR_TRIGGER_8;
699 break;
700 default:
701 fcr |= UART_FCR_TRIGGER_14;
702 break;
703 }
704 }
705 }
706
707 /* CTS flow control flag and modem status interrupts */
708 info->IER &= ~UART_IER_MSI;
709 info->MCR &= ~UART_MCR_AFE;
710 if (cflag & CRTSCTS) {
711 info->port.flags |= ASYNC_CTS_FLOW;
712 info->IER |= UART_IER_MSI;
713 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
714 info->MCR |= UART_MCR_AFE;
715 } else {
716 status = inb(info->ioaddr + UART_MSR);
717 if (tty->hw_stopped) {
718 if (status & UART_MSR_CTS) {
719 tty->hw_stopped = 0;
720 if (info->type != PORT_16550A &&
721 !info->board->chip_flag) {
722 outb(info->IER & ~UART_IER_THRI,
723 info->ioaddr +
724 UART_IER);
725 info->IER |= UART_IER_THRI;
726 outb(info->IER, info->ioaddr +
727 UART_IER);
728 }
729 tty_wakeup(tty);
730 }
731 } else {
732 if (!(status & UART_MSR_CTS)) {
733 tty->hw_stopped = 1;
734 if ((info->type != PORT_16550A) &&
735 (!info->board->chip_flag)) {
736 info->IER &= ~UART_IER_THRI;
737 outb(info->IER, info->ioaddr +
738 UART_IER);
739 }
740 }
741 }
742 }
743 } else {
744 info->port.flags &= ~ASYNC_CTS_FLOW;
745 }
746 outb(info->MCR, info->ioaddr + UART_MCR);
747 if (cflag & CLOCAL) {
748 info->port.flags &= ~ASYNC_CHECK_CD;
749 } else {
750 info->port.flags |= ASYNC_CHECK_CD;
751 info->IER |= UART_IER_MSI;
752 }
753 outb(info->IER, info->ioaddr + UART_IER);
754
755 /*
756 * Set up parity check flag
757 */
758 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
759 if (I_INPCK(tty))
760 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
761 if (I_BRKINT(tty) || I_PARMRK(tty))
762 info->read_status_mask |= UART_LSR_BI;
763
764 info->ignore_status_mask = 0;
765
766 if (I_IGNBRK(tty)) {
767 info->ignore_status_mask |= UART_LSR_BI;
768 info->read_status_mask |= UART_LSR_BI;
769 /*
770 * If we're ignore parity and break indicators, ignore
771 * overruns too. (For real raw support).
772 */
773 if (I_IGNPAR(tty)) {
774 info->ignore_status_mask |=
775 UART_LSR_OE |
776 UART_LSR_PE |
777 UART_LSR_FE;
778 info->read_status_mask |=
779 UART_LSR_OE |
780 UART_LSR_PE |
781 UART_LSR_FE;
782 }
783 }
784 if (info->board->chip_flag) {
785 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
786 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
787 if (I_IXON(tty)) {
788 mxser_enable_must_rx_software_flow_control(
789 info->ioaddr);
790 } else {
791 mxser_disable_must_rx_software_flow_control(
792 info->ioaddr);
793 }
794 if (I_IXOFF(tty)) {
795 mxser_enable_must_tx_software_flow_control(
796 info->ioaddr);
797 } else {
798 mxser_disable_must_tx_software_flow_control(
799 info->ioaddr);
800 }
801 }
802
803
804 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
805 outb(cval, info->ioaddr + UART_LCR);
806
807 return ret;
808 }
809
810 static void mxser_check_modem_status(struct tty_struct *tty,
811 struct mxser_port *port, int status)
812 {
813 /* update input line counters */
814 if (status & UART_MSR_TERI)
815 port->icount.rng++;
816 if (status & UART_MSR_DDSR)
817 port->icount.dsr++;
818 if (status & UART_MSR_DDCD)
819 port->icount.dcd++;
820 if (status & UART_MSR_DCTS)
821 port->icount.cts++;
822 port->mon_data.modem_status = status;
823 wake_up_interruptible(&port->port.delta_msr_wait);
824
825 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
826 if (status & UART_MSR_DCD)
827 wake_up_interruptible(&port->port.open_wait);
828 }
829
830 if (port->port.flags & ASYNC_CTS_FLOW) {
831 if (tty->hw_stopped) {
832 if (status & UART_MSR_CTS) {
833 tty->hw_stopped = 0;
834
835 if ((port->type != PORT_16550A) &&
836 (!port->board->chip_flag)) {
837 outb(port->IER & ~UART_IER_THRI,
838 port->ioaddr + UART_IER);
839 port->IER |= UART_IER_THRI;
840 outb(port->IER, port->ioaddr +
841 UART_IER);
842 }
843 tty_wakeup(tty);
844 }
845 } else {
846 if (!(status & UART_MSR_CTS)) {
847 tty->hw_stopped = 1;
848 if (port->type != PORT_16550A &&
849 !port->board->chip_flag) {
850 port->IER &= ~UART_IER_THRI;
851 outb(port->IER, port->ioaddr +
852 UART_IER);
853 }
854 }
855 }
856 }
857 }
858
859 static int mxser_startup(struct tty_struct *tty)
860 {
861 struct mxser_port *info = tty->driver_data;
862 unsigned long page;
863 unsigned long flags;
864
865 page = __get_free_page(GFP_KERNEL);
866 if (!page)
867 return -ENOMEM;
868
869 spin_lock_irqsave(&info->slock, flags);
870
871 if (info->port.flags & ASYNC_INITIALIZED) {
872 free_page(page);
873 spin_unlock_irqrestore(&info->slock, flags);
874 return 0;
875 }
876
877 if (!info->ioaddr || !info->type) {
878 set_bit(TTY_IO_ERROR, &tty->flags);
879 free_page(page);
880 spin_unlock_irqrestore(&info->slock, flags);
881 return 0;
882 }
883 if (info->port.xmit_buf)
884 free_page(page);
885 else
886 info->port.xmit_buf = (unsigned char *) page;
887
888 /*
889 * Clear the FIFO buffers and disable them
890 * (they will be reenabled in mxser_change_speed())
891 */
892 if (info->board->chip_flag)
893 outb((UART_FCR_CLEAR_RCVR |
894 UART_FCR_CLEAR_XMIT |
895 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
896 else
897 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
898 info->ioaddr + UART_FCR);
899
900 /*
901 * At this point there's no way the LSR could still be 0xFF;
902 * if it is, then bail out, because there's likely no UART
903 * here.
904 */
905 if (inb(info->ioaddr + UART_LSR) == 0xff) {
906 spin_unlock_irqrestore(&info->slock, flags);
907 if (capable(CAP_SYS_ADMIN)) {
908 if (tty)
909 set_bit(TTY_IO_ERROR, &tty->flags);
910 return 0;
911 } else
912 return -ENODEV;
913 }
914
915 /*
916 * Clear the interrupt registers.
917 */
918 (void) inb(info->ioaddr + UART_LSR);
919 (void) inb(info->ioaddr + UART_RX);
920 (void) inb(info->ioaddr + UART_IIR);
921 (void) inb(info->ioaddr + UART_MSR);
922
923 /*
924 * Now, initialize the UART
925 */
926 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
927 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
928 outb(info->MCR, info->ioaddr + UART_MCR);
929
930 /*
931 * Finally, enable interrupts
932 */
933 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
934
935 if (info->board->chip_flag)
936 info->IER |= MOXA_MUST_IER_EGDAI;
937 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
938
939 /*
940 * And clear the interrupt registers again for luck.
941 */
942 (void) inb(info->ioaddr + UART_LSR);
943 (void) inb(info->ioaddr + UART_RX);
944 (void) inb(info->ioaddr + UART_IIR);
945 (void) inb(info->ioaddr + UART_MSR);
946
947 clear_bit(TTY_IO_ERROR, &tty->flags);
948 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
949
950 /*
951 * and set the speed of the serial port
952 */
953 mxser_change_speed(tty, NULL);
954 info->port.flags |= ASYNC_INITIALIZED;
955 spin_unlock_irqrestore(&info->slock, flags);
956
957 return 0;
958 }
959
960 /*
961 * This routine will shutdown a serial port; interrupts maybe disabled, and
962 * DTR is dropped if the hangup on close termio flag is on.
963 */
964 static void mxser_shutdown(struct tty_struct *tty)
965 {
966 struct mxser_port *info = tty->driver_data;
967 unsigned long flags;
968
969 if (!(info->port.flags & ASYNC_INITIALIZED))
970 return;
971
972 spin_lock_irqsave(&info->slock, flags);
973
974 /*
975 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
976 * here so the queue might never be waken up
977 */
978 wake_up_interruptible(&info->port.delta_msr_wait);
979
980 /*
981 * Free the IRQ, if necessary
982 */
983 if (info->port.xmit_buf) {
984 free_page((unsigned long) info->port.xmit_buf);
985 info->port.xmit_buf = NULL;
986 }
987
988 info->IER = 0;
989 outb(0x00, info->ioaddr + UART_IER);
990
991 if (tty->termios->c_cflag & HUPCL)
992 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
993 outb(info->MCR, info->ioaddr + UART_MCR);
994
995 /* clear Rx/Tx FIFO's */
996 if (info->board->chip_flag)
997 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
998 MOXA_MUST_FCR_GDA_MODE_ENABLE,
999 info->ioaddr + UART_FCR);
1000 else
1001 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
1002 info->ioaddr + UART_FCR);
1003
1004 /* read data port to reset things */
1005 (void) inb(info->ioaddr + UART_RX);
1006
1007 set_bit(TTY_IO_ERROR, &tty->flags);
1008
1009 info->port.flags &= ~ASYNC_INITIALIZED;
1010
1011 if (info->board->chip_flag)
1012 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1013
1014 spin_unlock_irqrestore(&info->slock, flags);
1015 }
1016
1017 /*
1018 * This routine is called whenever a serial port is opened. It
1019 * enables interrupts for a serial port, linking in its async structure into
1020 * the IRQ chain. It also performs the serial-specific
1021 * initialization for the tty structure.
1022 */
1023 static int mxser_open(struct tty_struct *tty, struct file *filp)
1024 {
1025 struct mxser_port *info;
1026 unsigned long flags;
1027 int retval, line;
1028
1029 line = tty->index;
1030 if (line == MXSER_PORTS)
1031 return 0;
1032 if (line < 0 || line > MXSER_PORTS)
1033 return -ENODEV;
1034 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1035 if (!info->ioaddr)
1036 return -ENODEV;
1037
1038 tty->driver_data = info;
1039 tty_port_tty_set(&info->port, tty);
1040 /*
1041 * Start up serial port
1042 */
1043 spin_lock_irqsave(&info->port.lock, flags);
1044 info->port.count++;
1045 spin_unlock_irqrestore(&info->port.lock, flags);
1046 retval = mxser_startup(tty);
1047 if (retval)
1048 return retval;
1049
1050 retval = tty_port_block_til_ready(&info->port, tty, filp);
1051 if (retval)
1052 return retval;
1053
1054 return 0;
1055 }
1056
1057 static void mxser_flush_buffer(struct tty_struct *tty)
1058 {
1059 struct mxser_port *info = tty->driver_data;
1060 char fcr;
1061 unsigned long flags;
1062
1063
1064 spin_lock_irqsave(&info->slock, flags);
1065 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1066
1067 fcr = inb(info->ioaddr + UART_FCR);
1068 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1069 info->ioaddr + UART_FCR);
1070 outb(fcr, info->ioaddr + UART_FCR);
1071
1072 spin_unlock_irqrestore(&info->slock, flags);
1073
1074 tty_wakeup(tty);
1075 }
1076
1077
1078 static void mxser_close_port(struct tty_struct *tty, struct tty_port *port)
1079 {
1080 struct mxser_port *info = container_of(port, struct mxser_port, port);
1081 unsigned long timeout;
1082 /*
1083 * Save the termios structure, since this port may have
1084 * separate termios for callout and dialin.
1085 *
1086 * FIXME: Can this go ?
1087 */
1088 if (port->flags & ASYNC_NORMAL_ACTIVE)
1089 info->normal_termios = *tty->termios;
1090 /*
1091 * At this point we stop accepting input. To do this, we
1092 * disable the receive line status interrupts, and tell the
1093 * interrupt driver to stop checking the data ready bit in the
1094 * line status register.
1095 */
1096 info->IER &= ~UART_IER_RLSI;
1097 if (info->board->chip_flag)
1098 info->IER &= ~MOXA_MUST_RECV_ISR;
1099
1100 if (port->flags & ASYNC_INITIALIZED) {
1101 outb(info->IER, info->ioaddr + UART_IER);
1102 /*
1103 * Before we drop DTR, make sure the UART transmitter
1104 * has completely drained; this is especially
1105 * important if there is a transmit FIFO!
1106 */
1107 timeout = jiffies + HZ;
1108 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1109 schedule_timeout_interruptible(5);
1110 if (time_after(jiffies, timeout))
1111 break;
1112 }
1113 }
1114 mxser_shutdown(tty);
1115
1116 }
1117
1118 /*
1119 * This routine is called when the serial port gets closed. First, we
1120 * wait for the last remaining data to be sent. Then, we unlink its
1121 * async structure from the interrupt chain if necessary, and we free
1122 * that IRQ if nothing is left in the chain.
1123 */
1124 static void mxser_close(struct tty_struct *tty, struct file *filp)
1125 {
1126 struct mxser_port *info = tty->driver_data;
1127 struct tty_port *port = &info->port;
1128
1129 if (tty->index == MXSER_PORTS)
1130 return;
1131 if (tty_port_close_start(port, tty, filp) == 0)
1132 return;
1133 mxser_close_port(tty, port);
1134 mxser_flush_buffer(tty);
1135 /* Right now the tty_port set is done outside of the close_end helper
1136 as we don't yet have everyone using refcounts */
1137 tty_port_close_end(port, tty);
1138 tty_port_tty_set(port, NULL);
1139 }
1140
1141 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1142 {
1143 int c, total = 0;
1144 struct mxser_port *info = tty->driver_data;
1145 unsigned long flags;
1146
1147 if (!info->port.xmit_buf)
1148 return 0;
1149
1150 while (1) {
1151 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1152 SERIAL_XMIT_SIZE - info->xmit_head));
1153 if (c <= 0)
1154 break;
1155
1156 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1157 spin_lock_irqsave(&info->slock, flags);
1158 info->xmit_head = (info->xmit_head + c) &
1159 (SERIAL_XMIT_SIZE - 1);
1160 info->xmit_cnt += c;
1161 spin_unlock_irqrestore(&info->slock, flags);
1162
1163 buf += c;
1164 count -= c;
1165 total += c;
1166 }
1167
1168 if (info->xmit_cnt && !tty->stopped) {
1169 if (!tty->hw_stopped ||
1170 (info->type == PORT_16550A) ||
1171 (info->board->chip_flag)) {
1172 spin_lock_irqsave(&info->slock, flags);
1173 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1174 UART_IER);
1175 info->IER |= UART_IER_THRI;
1176 outb(info->IER, info->ioaddr + UART_IER);
1177 spin_unlock_irqrestore(&info->slock, flags);
1178 }
1179 }
1180 return total;
1181 }
1182
1183 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1184 {
1185 struct mxser_port *info = tty->driver_data;
1186 unsigned long flags;
1187
1188 if (!info->port.xmit_buf)
1189 return 0;
1190
1191 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1192 return 0;
1193
1194 spin_lock_irqsave(&info->slock, flags);
1195 info->port.xmit_buf[info->xmit_head++] = ch;
1196 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1197 info->xmit_cnt++;
1198 spin_unlock_irqrestore(&info->slock, flags);
1199 if (!tty->stopped) {
1200 if (!tty->hw_stopped ||
1201 (info->type == PORT_16550A) ||
1202 info->board->chip_flag) {
1203 spin_lock_irqsave(&info->slock, flags);
1204 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1205 info->IER |= UART_IER_THRI;
1206 outb(info->IER, info->ioaddr + UART_IER);
1207 spin_unlock_irqrestore(&info->slock, flags);
1208 }
1209 }
1210 return 1;
1211 }
1212
1213
1214 static void mxser_flush_chars(struct tty_struct *tty)
1215 {
1216 struct mxser_port *info = tty->driver_data;
1217 unsigned long flags;
1218
1219 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1220 (tty->hw_stopped && info->type != PORT_16550A &&
1221 !info->board->chip_flag))
1222 return;
1223
1224 spin_lock_irqsave(&info->slock, flags);
1225
1226 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1227 info->IER |= UART_IER_THRI;
1228 outb(info->IER, info->ioaddr + UART_IER);
1229
1230 spin_unlock_irqrestore(&info->slock, flags);
1231 }
1232
1233 static int mxser_write_room(struct tty_struct *tty)
1234 {
1235 struct mxser_port *info = tty->driver_data;
1236 int ret;
1237
1238 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1239 return ret < 0 ? 0 : ret;
1240 }
1241
1242 static int mxser_chars_in_buffer(struct tty_struct *tty)
1243 {
1244 struct mxser_port *info = tty->driver_data;
1245 return info->xmit_cnt;
1246 }
1247
1248 /*
1249 * ------------------------------------------------------------
1250 * friends of mxser_ioctl()
1251 * ------------------------------------------------------------
1252 */
1253 static int mxser_get_serial_info(struct tty_struct *tty,
1254 struct serial_struct __user *retinfo)
1255 {
1256 struct mxser_port *info = tty->driver_data;
1257 struct serial_struct tmp = {
1258 .type = info->type,
1259 .line = tty->index,
1260 .port = info->ioaddr,
1261 .irq = info->board->irq,
1262 .flags = info->port.flags,
1263 .baud_base = info->baud_base,
1264 .close_delay = info->port.close_delay,
1265 .closing_wait = info->port.closing_wait,
1266 .custom_divisor = info->custom_divisor,
1267 .hub6 = 0
1268 };
1269 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1270 return -EFAULT;
1271 return 0;
1272 }
1273
1274 static int mxser_set_serial_info(struct tty_struct *tty,
1275 struct serial_struct __user *new_info)
1276 {
1277 struct mxser_port *info = tty->driver_data;
1278 struct serial_struct new_serial;
1279 speed_t baud;
1280 unsigned long sl_flags;
1281 unsigned int flags;
1282 int retval = 0;
1283
1284 if (!new_info || !info->ioaddr)
1285 return -ENODEV;
1286 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1287 return -EFAULT;
1288
1289 if (new_serial.irq != info->board->irq ||
1290 new_serial.port != info->ioaddr)
1291 return -EINVAL;
1292
1293 flags = info->port.flags & ASYNC_SPD_MASK;
1294
1295 if (!capable(CAP_SYS_ADMIN)) {
1296 if ((new_serial.baud_base != info->baud_base) ||
1297 (new_serial.close_delay != info->port.close_delay) ||
1298 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1299 return -EPERM;
1300 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1301 (new_serial.flags & ASYNC_USR_MASK));
1302 } else {
1303 /*
1304 * OK, past this point, all the error checking has been done.
1305 * At this point, we start making changes.....
1306 */
1307 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1308 (new_serial.flags & ASYNC_FLAGS));
1309 info->port.close_delay = new_serial.close_delay * HZ / 100;
1310 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
1311 tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
1312 ? 1 : 0;
1313 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1314 (new_serial.baud_base != info->baud_base ||
1315 new_serial.custom_divisor !=
1316 info->custom_divisor)) {
1317 baud = new_serial.baud_base / new_serial.custom_divisor;
1318 tty_encode_baud_rate(tty, baud, baud);
1319 }
1320 }
1321
1322 info->type = new_serial.type;
1323
1324 process_txrx_fifo(info);
1325
1326 if (info->port.flags & ASYNC_INITIALIZED) {
1327 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1328 spin_lock_irqsave(&info->slock, sl_flags);
1329 mxser_change_speed(tty, NULL);
1330 spin_unlock_irqrestore(&info->slock, sl_flags);
1331 }
1332 } else
1333 retval = mxser_startup(tty);
1334
1335 return retval;
1336 }
1337
1338 /*
1339 * mxser_get_lsr_info - get line status register info
1340 *
1341 * Purpose: Let user call ioctl() to get info when the UART physically
1342 * is emptied. On bus types like RS485, the transmitter must
1343 * release the bus after transmitting. This must be done when
1344 * the transmit shift register is empty, not be done when the
1345 * transmit holding register is empty. This functionality
1346 * allows an RS485 driver to be written in user space.
1347 */
1348 static int mxser_get_lsr_info(struct mxser_port *info,
1349 unsigned int __user *value)
1350 {
1351 unsigned char status;
1352 unsigned int result;
1353 unsigned long flags;
1354
1355 spin_lock_irqsave(&info->slock, flags);
1356 status = inb(info->ioaddr + UART_LSR);
1357 spin_unlock_irqrestore(&info->slock, flags);
1358 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1359 return put_user(result, value);
1360 }
1361
1362 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1363 {
1364 struct mxser_port *info = tty->driver_data;
1365 unsigned char control, status;
1366 unsigned long flags;
1367
1368
1369 if (tty->index == MXSER_PORTS)
1370 return -ENOIOCTLCMD;
1371 if (test_bit(TTY_IO_ERROR, &tty->flags))
1372 return -EIO;
1373
1374 control = info->MCR;
1375
1376 spin_lock_irqsave(&info->slock, flags);
1377 status = inb(info->ioaddr + UART_MSR);
1378 if (status & UART_MSR_ANY_DELTA)
1379 mxser_check_modem_status(tty, info, status);
1380 spin_unlock_irqrestore(&info->slock, flags);
1381 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1382 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1383 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1384 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1385 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1386 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1387 }
1388
1389 static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1390 unsigned int set, unsigned int clear)
1391 {
1392 struct mxser_port *info = tty->driver_data;
1393 unsigned long flags;
1394
1395
1396 if (tty->index == MXSER_PORTS)
1397 return -ENOIOCTLCMD;
1398 if (test_bit(TTY_IO_ERROR, &tty->flags))
1399 return -EIO;
1400
1401 spin_lock_irqsave(&info->slock, flags);
1402
1403 if (set & TIOCM_RTS)
1404 info->MCR |= UART_MCR_RTS;
1405 if (set & TIOCM_DTR)
1406 info->MCR |= UART_MCR_DTR;
1407
1408 if (clear & TIOCM_RTS)
1409 info->MCR &= ~UART_MCR_RTS;
1410 if (clear & TIOCM_DTR)
1411 info->MCR &= ~UART_MCR_DTR;
1412
1413 outb(info->MCR, info->ioaddr + UART_MCR);
1414 spin_unlock_irqrestore(&info->slock, flags);
1415 return 0;
1416 }
1417
1418 static int __init mxser_program_mode(int port)
1419 {
1420 int id, i, j, n;
1421
1422 outb(0, port);
1423 outb(0, port);
1424 outb(0, port);
1425 (void)inb(port);
1426 (void)inb(port);
1427 outb(0, port);
1428 (void)inb(port);
1429
1430 id = inb(port + 1) & 0x1F;
1431 if ((id != C168_ASIC_ID) &&
1432 (id != C104_ASIC_ID) &&
1433 (id != C102_ASIC_ID) &&
1434 (id != CI132_ASIC_ID) &&
1435 (id != CI134_ASIC_ID) &&
1436 (id != CI104J_ASIC_ID))
1437 return -1;
1438 for (i = 0, j = 0; i < 4; i++) {
1439 n = inb(port + 2);
1440 if (n == 'M') {
1441 j = 1;
1442 } else if ((j == 1) && (n == 1)) {
1443 j = 2;
1444 break;
1445 } else
1446 j = 0;
1447 }
1448 if (j != 2)
1449 id = -2;
1450 return id;
1451 }
1452
1453 static void __init mxser_normal_mode(int port)
1454 {
1455 int i, n;
1456
1457 outb(0xA5, port + 1);
1458 outb(0x80, port + 3);
1459 outb(12, port + 0); /* 9600 bps */
1460 outb(0, port + 1);
1461 outb(0x03, port + 3); /* 8 data bits */
1462 outb(0x13, port + 4); /* loop back mode */
1463 for (i = 0; i < 16; i++) {
1464 n = inb(port + 5);
1465 if ((n & 0x61) == 0x60)
1466 break;
1467 if ((n & 1) == 1)
1468 (void)inb(port);
1469 }
1470 outb(0x00, port + 4);
1471 }
1472
1473 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1474 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1475 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1476 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1477 #define EN_CCMD 0x000 /* Chip's command register */
1478 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1479 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1480 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1481 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1482 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1483 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1484 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1485 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1486 static int __init mxser_read_register(int port, unsigned short *regs)
1487 {
1488 int i, k, value, id;
1489 unsigned int j;
1490
1491 id = mxser_program_mode(port);
1492 if (id < 0)
1493 return id;
1494 for (i = 0; i < 14; i++) {
1495 k = (i & 0x3F) | 0x180;
1496 for (j = 0x100; j > 0; j >>= 1) {
1497 outb(CHIP_CS, port);
1498 if (k & j) {
1499 outb(CHIP_CS | CHIP_DO, port);
1500 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1501 } else {
1502 outb(CHIP_CS, port);
1503 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1504 }
1505 }
1506 (void)inb(port);
1507 value = 0;
1508 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1509 outb(CHIP_CS, port);
1510 outb(CHIP_CS | CHIP_SK, port);
1511 if (inb(port) & CHIP_DI)
1512 value |= j;
1513 }
1514 regs[i] = value;
1515 outb(0, port);
1516 }
1517 mxser_normal_mode(port);
1518 return id;
1519 }
1520
1521 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1522 {
1523 struct mxser_port *port;
1524 struct tty_struct *tty;
1525 int result, status;
1526 unsigned int i, j;
1527 int ret = 0;
1528
1529 switch (cmd) {
1530 case MOXA_GET_MAJOR:
1531 if (printk_ratelimit())
1532 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1533 "%x (GET_MAJOR), fix your userspace\n",
1534 current->comm, cmd);
1535 return put_user(ttymajor, (int __user *)argp);
1536
1537 case MOXA_CHKPORTENABLE:
1538 result = 0;
1539 lock_kernel();
1540 for (i = 0; i < MXSER_BOARDS; i++)
1541 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1542 if (mxser_boards[i].ports[j].ioaddr)
1543 result |= (1 << i);
1544 unlock_kernel();
1545 return put_user(result, (unsigned long __user *)argp);
1546 case MOXA_GETDATACOUNT:
1547 lock_kernel();
1548 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1549 ret = -EFAULT;
1550 unlock_kernel();
1551 return ret;
1552 case MOXA_GETMSTATUS: {
1553 struct mxser_mstatus ms, __user *msu = argp;
1554 lock_kernel();
1555 for (i = 0; i < MXSER_BOARDS; i++)
1556 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1557 port = &mxser_boards[i].ports[j];
1558 memset(&ms, 0, sizeof(ms));
1559
1560 if (!port->ioaddr)
1561 goto copy;
1562
1563 tty = tty_port_tty_get(&port->port);
1564
1565 if (!tty || !tty->termios)
1566 ms.cflag = port->normal_termios.c_cflag;
1567 else
1568 ms.cflag = tty->termios->c_cflag;
1569 tty_kref_put(tty);
1570 status = inb(port->ioaddr + UART_MSR);
1571 if (status & UART_MSR_DCD)
1572 ms.dcd = 1;
1573 if (status & UART_MSR_DSR)
1574 ms.dsr = 1;
1575 if (status & UART_MSR_CTS)
1576 ms.cts = 1;
1577 copy:
1578 if (copy_to_user(msu, &ms, sizeof(ms))) {
1579 unlock_kernel();
1580 return -EFAULT;
1581 }
1582 msu++;
1583 }
1584 unlock_kernel();
1585 return 0;
1586 }
1587 case MOXA_ASPP_MON_EXT: {
1588 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1589 unsigned int cflag, iflag, p;
1590 u8 opmode;
1591
1592 me = kzalloc(sizeof(*me), GFP_KERNEL);
1593 if (!me)
1594 return -ENOMEM;
1595
1596 lock_kernel();
1597 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1598 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1599 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1600 i = MXSER_BOARDS;
1601 break;
1602 }
1603 port = &mxser_boards[i].ports[j];
1604 if (!port->ioaddr)
1605 continue;
1606
1607 status = mxser_get_msr(port->ioaddr, 0, p);
1608
1609 if (status & UART_MSR_TERI)
1610 port->icount.rng++;
1611 if (status & UART_MSR_DDSR)
1612 port->icount.dsr++;
1613 if (status & UART_MSR_DDCD)
1614 port->icount.dcd++;
1615 if (status & UART_MSR_DCTS)
1616 port->icount.cts++;
1617
1618 port->mon_data.modem_status = status;
1619 me->rx_cnt[p] = port->mon_data.rxcnt;
1620 me->tx_cnt[p] = port->mon_data.txcnt;
1621 me->up_rxcnt[p] = port->mon_data.up_rxcnt;
1622 me->up_txcnt[p] = port->mon_data.up_txcnt;
1623 me->modem_status[p] =
1624 port->mon_data.modem_status;
1625 tty = tty_port_tty_get(&port->port);
1626
1627 if (!tty || !tty->termios) {
1628 cflag = port->normal_termios.c_cflag;
1629 iflag = port->normal_termios.c_iflag;
1630 me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
1631 } else {
1632 cflag = tty->termios->c_cflag;
1633 iflag = tty->termios->c_iflag;
1634 me->baudrate[p] = tty_get_baud_rate(tty);
1635 }
1636 tty_kref_put(tty);
1637
1638 me->databits[p] = cflag & CSIZE;
1639 me->stopbits[p] = cflag & CSTOPB;
1640 me->parity[p] = cflag & (PARENB | PARODD |
1641 CMSPAR);
1642
1643 if (cflag & CRTSCTS)
1644 me->flowctrl[p] |= 0x03;
1645
1646 if (iflag & (IXON | IXOFF))
1647 me->flowctrl[p] |= 0x0C;
1648
1649 if (port->type == PORT_16550A)
1650 me->fifo[p] = 1;
1651
1652 opmode = inb(port->opmode_ioaddr) >>
1653 ((p % 4) * 2);
1654 opmode &= OP_MODE_MASK;
1655 me->iftype[p] = opmode;
1656 }
1657 }
1658 unlock_kernel();
1659 if (copy_to_user(argp, me, sizeof(*me)))
1660 ret = -EFAULT;
1661 kfree(me);
1662 return ret;
1663 }
1664 default:
1665 return -ENOIOCTLCMD;
1666 }
1667 return 0;
1668 }
1669
1670 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1671 struct async_icount *cprev)
1672 {
1673 struct async_icount cnow;
1674 unsigned long flags;
1675 int ret;
1676
1677 spin_lock_irqsave(&info->slock, flags);
1678 cnow = info->icount; /* atomic copy */
1679 spin_unlock_irqrestore(&info->slock, flags);
1680
1681 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1682 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1683 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1684 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1685
1686 *cprev = cnow;
1687
1688 return ret;
1689 }
1690
1691 static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1692 unsigned int cmd, unsigned long arg)
1693 {
1694 struct mxser_port *info = tty->driver_data;
1695 struct async_icount cnow;
1696 unsigned long flags;
1697 void __user *argp = (void __user *)arg;
1698 int retval;
1699
1700 if (tty->index == MXSER_PORTS)
1701 return mxser_ioctl_special(cmd, argp);
1702
1703 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1704 int p;
1705 unsigned long opmode;
1706 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1707 int shiftbit;
1708 unsigned char val, mask;
1709
1710 p = tty->index % 4;
1711 if (cmd == MOXA_SET_OP_MODE) {
1712 if (get_user(opmode, (int __user *) argp))
1713 return -EFAULT;
1714 if (opmode != RS232_MODE &&
1715 opmode != RS485_2WIRE_MODE &&
1716 opmode != RS422_MODE &&
1717 opmode != RS485_4WIRE_MODE)
1718 return -EFAULT;
1719 lock_kernel();
1720 mask = ModeMask[p];
1721 shiftbit = p * 2;
1722 val = inb(info->opmode_ioaddr);
1723 val &= mask;
1724 val |= (opmode << shiftbit);
1725 outb(val, info->opmode_ioaddr);
1726 unlock_kernel();
1727 } else {
1728 lock_kernel();
1729 shiftbit = p * 2;
1730 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1731 opmode &= OP_MODE_MASK;
1732 unlock_kernel();
1733 if (put_user(opmode, (int __user *)argp))
1734 return -EFAULT;
1735 }
1736 return 0;
1737 }
1738
1739 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT &&
1740 test_bit(TTY_IO_ERROR, &tty->flags))
1741 return -EIO;
1742
1743 switch (cmd) {
1744 case TIOCGSERIAL:
1745 lock_kernel();
1746 retval = mxser_get_serial_info(tty, argp);
1747 unlock_kernel();
1748 return retval;
1749 case TIOCSSERIAL:
1750 lock_kernel();
1751 retval = mxser_set_serial_info(tty, argp);
1752 unlock_kernel();
1753 return retval;
1754 case TIOCSERGETLSR: /* Get line status register */
1755 return mxser_get_lsr_info(info, argp);
1756 /*
1757 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1758 * - mask passed in arg for lines of interest
1759 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1760 * Caller should use TIOCGICOUNT to see which one it was
1761 */
1762 case TIOCMIWAIT:
1763 spin_lock_irqsave(&info->slock, flags);
1764 cnow = info->icount; /* note the counters on entry */
1765 spin_unlock_irqrestore(&info->slock, flags);
1766
1767 return wait_event_interruptible(info->port.delta_msr_wait,
1768 mxser_cflags_changed(info, arg, &cnow));
1769 case MOXA_HighSpeedOn:
1770 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1771 case MOXA_SDS_RSTICOUNTER:
1772 lock_kernel();
1773 info->mon_data.rxcnt = 0;
1774 info->mon_data.txcnt = 0;
1775 unlock_kernel();
1776 return 0;
1777
1778 case MOXA_ASPP_OQUEUE:{
1779 int len, lsr;
1780
1781 lock_kernel();
1782 len = mxser_chars_in_buffer(tty);
1783 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
1784 len += (lsr ? 0 : 1);
1785 unlock_kernel();
1786
1787 return put_user(len, (int __user *)argp);
1788 }
1789 case MOXA_ASPP_MON: {
1790 int mcr, status;
1791
1792 lock_kernel();
1793 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1794 mxser_check_modem_status(tty, info, status);
1795
1796 mcr = inb(info->ioaddr + UART_MCR);
1797 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1798 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1799 else
1800 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1801
1802 if (mcr & MOXA_MUST_MCR_TX_XON)
1803 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1804 else
1805 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1806
1807 if (tty->hw_stopped)
1808 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1809 else
1810 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1811 unlock_kernel();
1812 if (copy_to_user(argp, &info->mon_data,
1813 sizeof(struct mxser_mon)))
1814 return -EFAULT;
1815
1816 return 0;
1817 }
1818 case MOXA_ASPP_LSTATUS: {
1819 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1820 return -EFAULT;
1821
1822 info->err_shadow = 0;
1823 return 0;
1824 }
1825 case MOXA_SET_BAUD_METHOD: {
1826 int method;
1827
1828 if (get_user(method, (int __user *)argp))
1829 return -EFAULT;
1830 mxser_set_baud_method[tty->index] = method;
1831 return put_user(method, (int __user *)argp);
1832 }
1833 default:
1834 return -ENOIOCTLCMD;
1835 }
1836 return 0;
1837 }
1838
1839 /*
1840 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1841 * Return: write counters to the user passed counter struct
1842 * NB: both 1->0 and 0->1 transitions are counted except for
1843 * RI where only 0->1 is counted.
1844 */
1845
1846 static int mxser_get_icount(struct tty_struct *tty,
1847 struct serial_icounter_struct *icount)
1848
1849 {
1850 struct mxser_port *info = tty->driver_data;
1851 struct async_icount cnow;
1852 unsigned long flags;
1853
1854 spin_lock_irqsave(&info->slock, flags);
1855 cnow = info->icount;
1856 spin_unlock_irqrestore(&info->slock, flags);
1857
1858 icount->frame = cnow.frame;
1859 icount->brk = cnow.brk;
1860 icount->overrun = cnow.overrun;
1861 icount->buf_overrun = cnow.buf_overrun;
1862 icount->parity = cnow.parity;
1863 icount->rx = cnow.rx;
1864 icount->tx = cnow.tx;
1865 icount->cts = cnow.cts;
1866 icount->dsr = cnow.dsr;
1867 icount->rng = cnow.rng;
1868 icount->dcd = cnow.dcd;
1869 return 0;
1870 }
1871
1872 static void mxser_stoprx(struct tty_struct *tty)
1873 {
1874 struct mxser_port *info = tty->driver_data;
1875
1876 info->ldisc_stop_rx = 1;
1877 if (I_IXOFF(tty)) {
1878 if (info->board->chip_flag) {
1879 info->IER &= ~MOXA_MUST_RECV_ISR;
1880 outb(info->IER, info->ioaddr + UART_IER);
1881 } else {
1882 info->x_char = STOP_CHAR(tty);
1883 outb(0, info->ioaddr + UART_IER);
1884 info->IER |= UART_IER_THRI;
1885 outb(info->IER, info->ioaddr + UART_IER);
1886 }
1887 }
1888
1889 if (tty->termios->c_cflag & CRTSCTS) {
1890 info->MCR &= ~UART_MCR_RTS;
1891 outb(info->MCR, info->ioaddr + UART_MCR);
1892 }
1893 }
1894
1895 /*
1896 * This routine is called by the upper-layer tty layer to signal that
1897 * incoming characters should be throttled.
1898 */
1899 static void mxser_throttle(struct tty_struct *tty)
1900 {
1901 mxser_stoprx(tty);
1902 }
1903
1904 static void mxser_unthrottle(struct tty_struct *tty)
1905 {
1906 struct mxser_port *info = tty->driver_data;
1907
1908 /* startrx */
1909 info->ldisc_stop_rx = 0;
1910 if (I_IXOFF(tty)) {
1911 if (info->x_char)
1912 info->x_char = 0;
1913 else {
1914 if (info->board->chip_flag) {
1915 info->IER |= MOXA_MUST_RECV_ISR;
1916 outb(info->IER, info->ioaddr + UART_IER);
1917 } else {
1918 info->x_char = START_CHAR(tty);
1919 outb(0, info->ioaddr + UART_IER);
1920 info->IER |= UART_IER_THRI;
1921 outb(info->IER, info->ioaddr + UART_IER);
1922 }
1923 }
1924 }
1925
1926 if (tty->termios->c_cflag & CRTSCTS) {
1927 info->MCR |= UART_MCR_RTS;
1928 outb(info->MCR, info->ioaddr + UART_MCR);
1929 }
1930 }
1931
1932 /*
1933 * mxser_stop() and mxser_start()
1934 *
1935 * This routines are called before setting or resetting tty->stopped.
1936 * They enable or disable transmitter interrupts, as necessary.
1937 */
1938 static void mxser_stop(struct tty_struct *tty)
1939 {
1940 struct mxser_port *info = tty->driver_data;
1941 unsigned long flags;
1942
1943 spin_lock_irqsave(&info->slock, flags);
1944 if (info->IER & UART_IER_THRI) {
1945 info->IER &= ~UART_IER_THRI;
1946 outb(info->IER, info->ioaddr + UART_IER);
1947 }
1948 spin_unlock_irqrestore(&info->slock, flags);
1949 }
1950
1951 static void mxser_start(struct tty_struct *tty)
1952 {
1953 struct mxser_port *info = tty->driver_data;
1954 unsigned long flags;
1955
1956 spin_lock_irqsave(&info->slock, flags);
1957 if (info->xmit_cnt && info->port.xmit_buf) {
1958 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1959 info->IER |= UART_IER_THRI;
1960 outb(info->IER, info->ioaddr + UART_IER);
1961 }
1962 spin_unlock_irqrestore(&info->slock, flags);
1963 }
1964
1965 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1966 {
1967 struct mxser_port *info = tty->driver_data;
1968 unsigned long flags;
1969
1970 spin_lock_irqsave(&info->slock, flags);
1971 mxser_change_speed(tty, old_termios);
1972 spin_unlock_irqrestore(&info->slock, flags);
1973
1974 if ((old_termios->c_cflag & CRTSCTS) &&
1975 !(tty->termios->c_cflag & CRTSCTS)) {
1976 tty->hw_stopped = 0;
1977 mxser_start(tty);
1978 }
1979
1980 /* Handle sw stopped */
1981 if ((old_termios->c_iflag & IXON) &&
1982 !(tty->termios->c_iflag & IXON)) {
1983 tty->stopped = 0;
1984
1985 if (info->board->chip_flag) {
1986 spin_lock_irqsave(&info->slock, flags);
1987 mxser_disable_must_rx_software_flow_control(
1988 info->ioaddr);
1989 spin_unlock_irqrestore(&info->slock, flags);
1990 }
1991
1992 mxser_start(tty);
1993 }
1994 }
1995
1996 /*
1997 * mxser_wait_until_sent() --- wait until the transmitter is empty
1998 */
1999 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
2000 {
2001 struct mxser_port *info = tty->driver_data;
2002 unsigned long orig_jiffies, char_time;
2003 int lsr;
2004
2005 if (info->type == PORT_UNKNOWN)
2006 return;
2007
2008 if (info->xmit_fifo_size == 0)
2009 return; /* Just in case.... */
2010
2011 orig_jiffies = jiffies;
2012 /*
2013 * Set the check interval to be 1/5 of the estimated time to
2014 * send a single character, and make it at least 1. The check
2015 * interval should also be less than the timeout.
2016 *
2017 * Note: we have to use pretty tight timings here to satisfy
2018 * the NIST-PCTS.
2019 */
2020 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2021 char_time = char_time / 5;
2022 if (char_time == 0)
2023 char_time = 1;
2024 if (timeout && timeout < char_time)
2025 char_time = timeout;
2026 /*
2027 * If the transmitter hasn't cleared in twice the approximate
2028 * amount of time to send the entire FIFO, it probably won't
2029 * ever clear. This assumes the UART isn't doing flow
2030 * control, which is currently the case. Hence, if it ever
2031 * takes longer than info->timeout, this is probably due to a
2032 * UART bug of some kind. So, we clamp the timeout parameter at
2033 * 2*info->timeout.
2034 */
2035 if (!timeout || timeout > 2 * info->timeout)
2036 timeout = 2 * info->timeout;
2037 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2038 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2039 timeout, char_time);
2040 printk("jiff=%lu...", jiffies);
2041 #endif
2042 lock_kernel();
2043 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2044 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2045 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2046 #endif
2047 schedule_timeout_interruptible(char_time);
2048 if (signal_pending(current))
2049 break;
2050 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2051 break;
2052 }
2053 set_current_state(TASK_RUNNING);
2054 unlock_kernel();
2055
2056 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2057 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2058 #endif
2059 }
2060
2061 /*
2062 * This routine is called by tty_hangup() when a hangup is signaled.
2063 */
2064 static void mxser_hangup(struct tty_struct *tty)
2065 {
2066 struct mxser_port *info = tty->driver_data;
2067
2068 mxser_flush_buffer(tty);
2069 mxser_shutdown(tty);
2070 tty_port_hangup(&info->port);
2071 }
2072
2073 /*
2074 * mxser_rs_break() --- routine which turns the break handling on or off
2075 */
2076 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2077 {
2078 struct mxser_port *info = tty->driver_data;
2079 unsigned long flags;
2080
2081 spin_lock_irqsave(&info->slock, flags);
2082 if (break_state == -1)
2083 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2084 info->ioaddr + UART_LCR);
2085 else
2086 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2087 info->ioaddr + UART_LCR);
2088 spin_unlock_irqrestore(&info->slock, flags);
2089 return 0;
2090 }
2091
2092 static void mxser_receive_chars(struct tty_struct *tty,
2093 struct mxser_port *port, int *status)
2094 {
2095 unsigned char ch, gdl;
2096 int ignored = 0;
2097 int cnt = 0;
2098 int recv_room;
2099 int max = 256;
2100
2101 recv_room = tty->receive_room;
2102 if (recv_room == 0 && !port->ldisc_stop_rx)
2103 mxser_stoprx(tty);
2104 if (port->board->chip_flag != MOXA_OTHER_UART) {
2105
2106 if (*status & UART_LSR_SPECIAL)
2107 goto intr_old;
2108 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2109 (*status & MOXA_MUST_LSR_RERR))
2110 goto intr_old;
2111 if (*status & MOXA_MUST_LSR_RERR)
2112 goto intr_old;
2113
2114 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2115
2116 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2117 gdl &= MOXA_MUST_GDL_MASK;
2118 if (gdl >= recv_room) {
2119 if (!port->ldisc_stop_rx)
2120 mxser_stoprx(tty);
2121 }
2122 while (gdl--) {
2123 ch = inb(port->ioaddr + UART_RX);
2124 tty_insert_flip_char(tty, ch, 0);
2125 cnt++;
2126 }
2127 goto end_intr;
2128 }
2129 intr_old:
2130
2131 do {
2132 if (max-- < 0)
2133 break;
2134
2135 ch = inb(port->ioaddr + UART_RX);
2136 if (port->board->chip_flag && (*status & UART_LSR_OE))
2137 outb(0x23, port->ioaddr + UART_FCR);
2138 *status &= port->read_status_mask;
2139 if (*status & port->ignore_status_mask) {
2140 if (++ignored > 100)
2141 break;
2142 } else {
2143 char flag = 0;
2144 if (*status & UART_LSR_SPECIAL) {
2145 if (*status & UART_LSR_BI) {
2146 flag = TTY_BREAK;
2147 port->icount.brk++;
2148
2149 if (port->port.flags & ASYNC_SAK)
2150 do_SAK(tty);
2151 } else if (*status & UART_LSR_PE) {
2152 flag = TTY_PARITY;
2153 port->icount.parity++;
2154 } else if (*status & UART_LSR_FE) {
2155 flag = TTY_FRAME;
2156 port->icount.frame++;
2157 } else if (*status & UART_LSR_OE) {
2158 flag = TTY_OVERRUN;
2159 port->icount.overrun++;
2160 } else
2161 flag = TTY_BREAK;
2162 }
2163 tty_insert_flip_char(tty, ch, flag);
2164 cnt++;
2165 if (cnt >= recv_room) {
2166 if (!port->ldisc_stop_rx)
2167 mxser_stoprx(tty);
2168 break;
2169 }
2170
2171 }
2172
2173 if (port->board->chip_flag)
2174 break;
2175
2176 *status = inb(port->ioaddr + UART_LSR);
2177 } while (*status & UART_LSR_DR);
2178
2179 end_intr:
2180 mxvar_log.rxcnt[tty->index] += cnt;
2181 port->mon_data.rxcnt += cnt;
2182 port->mon_data.up_rxcnt += cnt;
2183
2184 /*
2185 * We are called from an interrupt context with &port->slock
2186 * being held. Drop it temporarily in order to prevent
2187 * recursive locking.
2188 */
2189 spin_unlock(&port->slock);
2190 tty_flip_buffer_push(tty);
2191 spin_lock(&port->slock);
2192 }
2193
2194 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
2195 {
2196 int count, cnt;
2197
2198 if (port->x_char) {
2199 outb(port->x_char, port->ioaddr + UART_TX);
2200 port->x_char = 0;
2201 mxvar_log.txcnt[tty->index]++;
2202 port->mon_data.txcnt++;
2203 port->mon_data.up_txcnt++;
2204 port->icount.tx++;
2205 return;
2206 }
2207
2208 if (port->port.xmit_buf == NULL)
2209 return;
2210
2211 if (port->xmit_cnt <= 0 || tty->stopped ||
2212 (tty->hw_stopped &&
2213 (port->type != PORT_16550A) &&
2214 (!port->board->chip_flag))) {
2215 port->IER &= ~UART_IER_THRI;
2216 outb(port->IER, port->ioaddr + UART_IER);
2217 return;
2218 }
2219
2220 cnt = port->xmit_cnt;
2221 count = port->xmit_fifo_size;
2222 do {
2223 outb(port->port.xmit_buf[port->xmit_tail++],
2224 port->ioaddr + UART_TX);
2225 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2226 if (--port->xmit_cnt <= 0)
2227 break;
2228 } while (--count > 0);
2229 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
2230
2231 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2232 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2233 port->icount.tx += (cnt - port->xmit_cnt);
2234
2235 if (port->xmit_cnt < WAKEUP_CHARS && tty)
2236 tty_wakeup(tty);
2237
2238 if (port->xmit_cnt <= 0) {
2239 port->IER &= ~UART_IER_THRI;
2240 outb(port->IER, port->ioaddr + UART_IER);
2241 }
2242 }
2243
2244 /*
2245 * This is the serial driver's generic interrupt routine
2246 */
2247 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2248 {
2249 int status, iir, i;
2250 struct mxser_board *brd = NULL;
2251 struct mxser_port *port;
2252 int max, irqbits, bits, msr;
2253 unsigned int int_cnt, pass_counter = 0;
2254 int handled = IRQ_NONE;
2255 struct tty_struct *tty;
2256
2257 for (i = 0; i < MXSER_BOARDS; i++)
2258 if (dev_id == &mxser_boards[i]) {
2259 brd = dev_id;
2260 break;
2261 }
2262
2263 if (i == MXSER_BOARDS)
2264 goto irq_stop;
2265 if (brd == NULL)
2266 goto irq_stop;
2267 max = brd->info->nports;
2268 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2269 irqbits = inb(brd->vector) & brd->vector_mask;
2270 if (irqbits == brd->vector_mask)
2271 break;
2272
2273 handled = IRQ_HANDLED;
2274 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2275 if (irqbits == brd->vector_mask)
2276 break;
2277 if (bits & irqbits)
2278 continue;
2279 port = &brd->ports[i];
2280
2281 int_cnt = 0;
2282 spin_lock(&port->slock);
2283 do {
2284 iir = inb(port->ioaddr + UART_IIR);
2285 if (iir & UART_IIR_NO_INT)
2286 break;
2287 iir &= MOXA_MUST_IIR_MASK;
2288 tty = tty_port_tty_get(&port->port);
2289 if (!tty ||
2290 (port->port.flags & ASYNC_CLOSING) ||
2291 !(port->port.flags &
2292 ASYNC_INITIALIZED)) {
2293 status = inb(port->ioaddr + UART_LSR);
2294 outb(0x27, port->ioaddr + UART_FCR);
2295 inb(port->ioaddr + UART_MSR);
2296 tty_kref_put(tty);
2297 break;
2298 }
2299
2300 status = inb(port->ioaddr + UART_LSR);
2301
2302 if (status & UART_LSR_PE)
2303 port->err_shadow |= NPPI_NOTIFY_PARITY;
2304 if (status & UART_LSR_FE)
2305 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2306 if (status & UART_LSR_OE)
2307 port->err_shadow |=
2308 NPPI_NOTIFY_HW_OVERRUN;
2309 if (status & UART_LSR_BI)
2310 port->err_shadow |= NPPI_NOTIFY_BREAK;
2311
2312 if (port->board->chip_flag) {
2313 if (iir == MOXA_MUST_IIR_GDA ||
2314 iir == MOXA_MUST_IIR_RDA ||
2315 iir == MOXA_MUST_IIR_RTO ||
2316 iir == MOXA_MUST_IIR_LSR)
2317 mxser_receive_chars(tty, port,
2318 &status);
2319
2320 } else {
2321 status &= port->read_status_mask;
2322 if (status & UART_LSR_DR)
2323 mxser_receive_chars(tty, port,
2324 &status);
2325 }
2326 msr = inb(port->ioaddr + UART_MSR);
2327 if (msr & UART_MSR_ANY_DELTA)
2328 mxser_check_modem_status(tty, port, msr);
2329
2330 if (port->board->chip_flag) {
2331 if (iir == 0x02 && (status &
2332 UART_LSR_THRE))
2333 mxser_transmit_chars(tty, port);
2334 } else {
2335 if (status & UART_LSR_THRE)
2336 mxser_transmit_chars(tty, port);
2337 }
2338 tty_kref_put(tty);
2339 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2340 spin_unlock(&port->slock);
2341 }
2342 }
2343
2344 irq_stop:
2345 return handled;
2346 }
2347
2348 static const struct tty_operations mxser_ops = {
2349 .open = mxser_open,
2350 .close = mxser_close,
2351 .write = mxser_write,
2352 .put_char = mxser_put_char,
2353 .flush_chars = mxser_flush_chars,
2354 .write_room = mxser_write_room,
2355 .chars_in_buffer = mxser_chars_in_buffer,
2356 .flush_buffer = mxser_flush_buffer,
2357 .ioctl = mxser_ioctl,
2358 .throttle = mxser_throttle,
2359 .unthrottle = mxser_unthrottle,
2360 .set_termios = mxser_set_termios,
2361 .stop = mxser_stop,
2362 .start = mxser_start,
2363 .hangup = mxser_hangup,
2364 .break_ctl = mxser_rs_break,
2365 .wait_until_sent = mxser_wait_until_sent,
2366 .tiocmget = mxser_tiocmget,
2367 .tiocmset = mxser_tiocmset,
2368 .get_icount = mxser_get_icount,
2369 };
2370
2371 struct tty_port_operations mxser_port_ops = {
2372 .carrier_raised = mxser_carrier_raised,
2373 .dtr_rts = mxser_dtr_rts,
2374 };
2375
2376 /*
2377 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2378 */
2379
2380 static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2381 unsigned int irq)
2382 {
2383 if (irq)
2384 free_irq(brd->irq, brd);
2385 if (pdev != NULL) { /* PCI */
2386 #ifdef CONFIG_PCI
2387 pci_release_region(pdev, 2);
2388 pci_release_region(pdev, 3);
2389 #endif
2390 } else {
2391 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2392 release_region(brd->vector, 1);
2393 }
2394 }
2395
2396 static int __devinit mxser_initbrd(struct mxser_board *brd,
2397 struct pci_dev *pdev)
2398 {
2399 struct mxser_port *info;
2400 unsigned int i;
2401 int retval;
2402
2403 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2404 brd->ports[0].max_baud);
2405
2406 for (i = 0; i < brd->info->nports; i++) {
2407 info = &brd->ports[i];
2408 tty_port_init(&info->port);
2409 info->port.ops = &mxser_port_ops;
2410 info->board = brd;
2411 info->stop_rx = 0;
2412 info->ldisc_stop_rx = 0;
2413
2414 /* Enhance mode enabled here */
2415 if (brd->chip_flag != MOXA_OTHER_UART)
2416 mxser_enable_must_enchance_mode(info->ioaddr);
2417
2418 info->port.flags = ASYNC_SHARE_IRQ;
2419 info->type = brd->uart_type;
2420
2421 process_txrx_fifo(info);
2422
2423 info->custom_divisor = info->baud_base * 16;
2424 info->port.close_delay = 5 * HZ / 10;
2425 info->port.closing_wait = 30 * HZ;
2426 info->normal_termios = mxvar_sdriver->init_termios;
2427 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2428 info->err_shadow = 0;
2429 spin_lock_init(&info->slock);
2430
2431 /* before set INT ISR, disable all int */
2432 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2433 info->ioaddr + UART_IER);
2434 }
2435
2436 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2437 brd);
2438 if (retval) {
2439 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2440 "conflict with another device.\n",
2441 brd->info->name, brd->irq);
2442 /* We hold resources, we need to release them. */
2443 mxser_release_res(brd, pdev, 0);
2444 }
2445 return retval;
2446 }
2447
2448 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2449 {
2450 int id, i, bits;
2451 unsigned short regs[16], irq;
2452 unsigned char scratch, scratch2;
2453
2454 brd->chip_flag = MOXA_OTHER_UART;
2455
2456 id = mxser_read_register(cap, regs);
2457 switch (id) {
2458 case C168_ASIC_ID:
2459 brd->info = &mxser_cards[0];
2460 break;
2461 case C104_ASIC_ID:
2462 brd->info = &mxser_cards[1];
2463 break;
2464 case CI104J_ASIC_ID:
2465 brd->info = &mxser_cards[2];
2466 break;
2467 case C102_ASIC_ID:
2468 brd->info = &mxser_cards[5];
2469 break;
2470 case CI132_ASIC_ID:
2471 brd->info = &mxser_cards[6];
2472 break;
2473 case CI134_ASIC_ID:
2474 brd->info = &mxser_cards[7];
2475 break;
2476 default:
2477 return 0;
2478 }
2479
2480 irq = 0;
2481 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2482 Flag-hack checks if configuration should be read as 2-port here. */
2483 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2484 irq = regs[9] & 0xF000;
2485 irq = irq | (irq >> 4);
2486 if (irq != (regs[9] & 0xFF00))
2487 goto err_irqconflict;
2488 } else if (brd->info->nports == 4) {
2489 irq = regs[9] & 0xF000;
2490 irq = irq | (irq >> 4);
2491 irq = irq | (irq >> 8);
2492 if (irq != regs[9])
2493 goto err_irqconflict;
2494 } else if (brd->info->nports == 8) {
2495 irq = regs[9] & 0xF000;
2496 irq = irq | (irq >> 4);
2497 irq = irq | (irq >> 8);
2498 if ((irq != regs[9]) || (irq != regs[10]))
2499 goto err_irqconflict;
2500 }
2501
2502 if (!irq) {
2503 printk(KERN_ERR "mxser: interrupt number unset\n");
2504 return -EIO;
2505 }
2506 brd->irq = ((int)(irq & 0xF000) >> 12);
2507 for (i = 0; i < 8; i++)
2508 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2509 if ((regs[12] & 0x80) == 0) {
2510 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2511 return -EIO;
2512 }
2513 brd->vector = (int)regs[11]; /* interrupt vector */
2514 if (id == 1)
2515 brd->vector_mask = 0x00FF;
2516 else
2517 brd->vector_mask = 0x000F;
2518 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2519 if (regs[12] & bits) {
2520 brd->ports[i].baud_base = 921600;
2521 brd->ports[i].max_baud = 921600;
2522 } else {
2523 brd->ports[i].baud_base = 115200;
2524 brd->ports[i].max_baud = 115200;
2525 }
2526 }
2527 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2528 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2529 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2530 outb(scratch2, cap + UART_LCR);
2531 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2532 scratch = inb(cap + UART_IIR);
2533
2534 if (scratch & 0xC0)
2535 brd->uart_type = PORT_16550A;
2536 else
2537 brd->uart_type = PORT_16450;
2538 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2539 "mxser(IO)")) {
2540 printk(KERN_ERR "mxser: can't request ports I/O region: "
2541 "0x%.8lx-0x%.8lx\n",
2542 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2543 8 * brd->info->nports - 1);
2544 return -EIO;
2545 }
2546 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2547 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2548 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2549 "0x%.8lx-0x%.8lx\n",
2550 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2551 8 * brd->info->nports - 1);
2552 return -EIO;
2553 }
2554 return brd->info->nports;
2555
2556 err_irqconflict:
2557 printk(KERN_ERR "mxser: invalid interrupt number\n");
2558 return -EIO;
2559 }
2560
2561 static int __devinit mxser_probe(struct pci_dev *pdev,
2562 const struct pci_device_id *ent)
2563 {
2564 #ifdef CONFIG_PCI
2565 struct mxser_board *brd;
2566 unsigned int i, j;
2567 unsigned long ioaddress;
2568 int retval = -EINVAL;
2569
2570 for (i = 0; i < MXSER_BOARDS; i++)
2571 if (mxser_boards[i].info == NULL)
2572 break;
2573
2574 if (i >= MXSER_BOARDS) {
2575 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2576 "not configured\n", MXSER_BOARDS);
2577 goto err;
2578 }
2579
2580 brd = &mxser_boards[i];
2581 brd->idx = i * MXSER_PORTS_PER_BOARD;
2582 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2583 mxser_cards[ent->driver_data].name,
2584 pdev->bus->number, PCI_SLOT(pdev->devfn));
2585
2586 retval = pci_enable_device(pdev);
2587 if (retval) {
2588 dev_err(&pdev->dev, "PCI enable failed\n");
2589 goto err;
2590 }
2591
2592 /* io address */
2593 ioaddress = pci_resource_start(pdev, 2);
2594 retval = pci_request_region(pdev, 2, "mxser(IO)");
2595 if (retval)
2596 goto err;
2597
2598 brd->info = &mxser_cards[ent->driver_data];
2599 for (i = 0; i < brd->info->nports; i++)
2600 brd->ports[i].ioaddr = ioaddress + 8 * i;
2601
2602 /* vector */
2603 ioaddress = pci_resource_start(pdev, 3);
2604 retval = pci_request_region(pdev, 3, "mxser(vector)");
2605 if (retval)
2606 goto err_relio;
2607 brd->vector = ioaddress;
2608
2609 /* irq */
2610 brd->irq = pdev->irq;
2611
2612 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2613 brd->uart_type = PORT_16550A;
2614 brd->vector_mask = 0;
2615
2616 for (i = 0; i < brd->info->nports; i++) {
2617 for (j = 0; j < UART_INFO_NUM; j++) {
2618 if (Gpci_uart_info[j].type == brd->chip_flag) {
2619 brd->ports[i].max_baud =
2620 Gpci_uart_info[j].max_baud;
2621
2622 /* exception....CP-102 */
2623 if (brd->info->flags & MXSER_HIGHBAUD)
2624 brd->ports[i].max_baud = 921600;
2625 break;
2626 }
2627 }
2628 }
2629
2630 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2631 for (i = 0; i < brd->info->nports; i++) {
2632 if (i < 4)
2633 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2634 else
2635 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2636 }
2637 outb(0, ioaddress + 4); /* default set to RS232 mode */
2638 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2639 }
2640
2641 for (i = 0; i < brd->info->nports; i++) {
2642 brd->vector_mask |= (1 << i);
2643 brd->ports[i].baud_base = 921600;
2644 }
2645
2646 /* mxser_initbrd will hook ISR. */
2647 retval = mxser_initbrd(brd, pdev);
2648 if (retval)
2649 goto err_null;
2650
2651 for (i = 0; i < brd->info->nports; i++)
2652 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2653
2654 pci_set_drvdata(pdev, brd);
2655
2656 return 0;
2657 err_relio:
2658 pci_release_region(pdev, 2);
2659 err_null:
2660 brd->info = NULL;
2661 err:
2662 return retval;
2663 #else
2664 return -ENODEV;
2665 #endif
2666 }
2667
2668 static void __devexit mxser_remove(struct pci_dev *pdev)
2669 {
2670 struct mxser_board *brd = pci_get_drvdata(pdev);
2671 unsigned int i;
2672
2673 for (i = 0; i < brd->info->nports; i++)
2674 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2675
2676 mxser_release_res(brd, pdev, 1);
2677 brd->info = NULL;
2678 }
2679
2680 static struct pci_driver mxser_driver = {
2681 .name = "mxser",
2682 .id_table = mxser_pcibrds,
2683 .probe = mxser_probe,
2684 .remove = __devexit_p(mxser_remove)
2685 };
2686
2687 static int __init mxser_module_init(void)
2688 {
2689 struct mxser_board *brd;
2690 unsigned int b, i, m;
2691 int retval;
2692
2693 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2694 if (!mxvar_sdriver)
2695 return -ENOMEM;
2696
2697 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2698 MXSER_VERSION);
2699
2700 /* Initialize the tty_driver structure */
2701 mxvar_sdriver->owner = THIS_MODULE;
2702 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2703 mxvar_sdriver->name = "ttyMI";
2704 mxvar_sdriver->major = ttymajor;
2705 mxvar_sdriver->minor_start = 0;
2706 mxvar_sdriver->num = MXSER_PORTS + 1;
2707 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2708 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2709 mxvar_sdriver->init_termios = tty_std_termios;
2710 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2711 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2712 tty_set_operations(mxvar_sdriver, &mxser_ops);
2713
2714 retval = tty_register_driver(mxvar_sdriver);
2715 if (retval) {
2716 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2717 "tty driver !\n");
2718 goto err_put;
2719 }
2720
2721 /* Start finding ISA boards here */
2722 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2723 if (!ioaddr[b])
2724 continue;
2725
2726 brd = &mxser_boards[m];
2727 retval = mxser_get_ISA_conf(ioaddr[b], brd);
2728 if (retval <= 0) {
2729 brd->info = NULL;
2730 continue;
2731 }
2732
2733 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2734 brd->info->name, ioaddr[b]);
2735
2736 /* mxser_initbrd will hook ISR. */
2737 if (mxser_initbrd(brd, NULL) < 0) {
2738 brd->info = NULL;
2739 continue;
2740 }
2741
2742 brd->idx = m * MXSER_PORTS_PER_BOARD;
2743 for (i = 0; i < brd->info->nports; i++)
2744 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
2745
2746 m++;
2747 }
2748
2749 retval = pci_register_driver(&mxser_driver);
2750 if (retval) {
2751 printk(KERN_ERR "mxser: can't register pci driver\n");
2752 if (!m) {
2753 retval = -ENODEV;
2754 goto err_unr;
2755 } /* else: we have some ISA cards under control */
2756 }
2757
2758 return 0;
2759 err_unr:
2760 tty_unregister_driver(mxvar_sdriver);
2761 err_put:
2762 put_tty_driver(mxvar_sdriver);
2763 return retval;
2764 }
2765
2766 static void __exit mxser_module_exit(void)
2767 {
2768 unsigned int i, j;
2769
2770 pci_unregister_driver(&mxser_driver);
2771
2772 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2773 if (mxser_boards[i].info != NULL)
2774 for (j = 0; j < mxser_boards[i].info->nports; j++)
2775 tty_unregister_device(mxvar_sdriver,
2776 mxser_boards[i].idx + j);
2777 tty_unregister_driver(mxvar_sdriver);
2778 put_tty_driver(mxvar_sdriver);
2779
2780 for (i = 0; i < MXSER_BOARDS; i++)
2781 if (mxser_boards[i].info != NULL)
2782 mxser_release_res(&mxser_boards[i], NULL, 1);
2783 }
2784
2785 module_init(mxser_module_init);
2786 module_exit(mxser_module_exit);
Linux MOXA ART SoC ARM port