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4 <TITLE>80386 Programmer's Reference Manual -- Opcode BSR</TITLE>
5 </HEAD>
6 <BODY>
7 <B>up:</B> <A HREF="c17.htm">
8 Chapter 17 -- 80386 Instruction Set</A><BR>
9 <B>prev:</B><A HREF="BSF.htm"> BSF Bit Scan Forward</A><BR>
10 <B>next:</B><A HREF="BT.htm"> BT Bit Test</A>
11 <P>
12 <HR>
13 <P>
14 <H1>BSR -- Bit Scan Reverse</H1>
16 <PRE>
17 Opcode Instruction Clocks Description
19 0F BD BSR r16,r/m16 10+3n Bit scan reverse on r/m word
20 0F BD BSR r32,r/m32 10+3n Bit scan reverse on r/m dword
21 </PRE>
23 <H2>Operation</H2>
25 <PRE>
26 IF r/m = 0
27 THEN
28 ZF := 1;
29 register := UNDEFINED;
30 ELSE
31 temp := OperandSize - 1;
32 ZF := 0;
33 WHILE BIT[r/m, temp] = 0
35 temp := temp - 1;
36 register := temp;
37 OD;
38 FI;
39 </PRE>
41 <H2>Description</H2>
43 BSR scans the bits in the second word or doubleword operand from the most
44 significant bit to the least significant bit. The ZF flag is cleared if the
45 bits are all 0; otherwise, ZF is set and the destination register is loaded
46 with the bit index of the first set bit found when scanning in the reverse
47 direction.
49 <H2>Flags Affected</H2>
51 ZF as described above
53 <H2>Protected Mode Exceptions</H2>
55 #GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal
56 memory operand effective address in the CS, DS, ES, FS, or GS segments;
57 #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page
58 fault
60 <H2>Real Address Mode Exceptions</H2>
62 Interrupt 13 if any part of the operand would lie outside of the effective
63 address space from 0 to 0FFFFH
65 <H2>Virtual 8086 Mode Exceptions</H2>
67 Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
70 <P>
71 <HR>
72 <P>
73 <B>up:</B> <A HREF="c17.htm">
74 Chapter 17 -- 80386 Instruction Set</A><BR>
75 <B>prev:</B><A HREF="BSF.htm"> BSF Bit Scan Forward</A><BR>
76 <B>next:</B><A HREF="BT.htm"> BT Bit Test</A>
77 </BODY>