hw/i386.reference/MOV.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Opcode MOV</TITLE>
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   7 <B>up:</B> <A HREF="c17.htm">
   8 Chapter 17 -- 80386 Instruction Set</A><BR>
   9 <B>prev:</B><A HREF="LTR.htm"> LTR Load Task Register</A><BR>
  10 <B>next:</B><A HREF="MOVRS.htm"> MOV Move to/from Special Registers</A>
  11 <P>
  12 <HR>
  13 <P>
  14 <H1>MOV -- Move Data</H1>
  15
  16
  17 <PRE>
  18 Opcode   Instruction       Clocks        Description
  19
  20 88  /r   MOV r/m8,r8       2/2           Move byte register to r/m byte
  21 89  /r   MOV r/m16,r16     2/2           Move word register to r/m word
  22 89  /r   MOV r/m32,r32     2/2           Move dword register to r/m dword
  23 8A  /r   MOV r8,r/m8       2/4           Move r/m byte to byte register
  24 8B  /r   MOV r16,r/m16     2/4           Move r/m word to word register
  25 8B  /r   MOV r32,r/m32     2/4           Move r/m dword to dword register
  26 8C  /r   MOV r/m16,Sreg    2/2           Move segment register to r/m word
  27 8D  /r   MOV Sreg,r/m16    2/5,pm=18/19  Move r/m word to segment register
  28 A0       MOV AL,moffs8     4             Move byte at (seg:offset) to AL
  29 A1       MOV AX,moffs16    4             Move word at (seg:offset) to AX
  30 A1       MOV EAX,moffs32   4             Move dword at (seg:offset) to EAX
  31 A2       MOV moffs8,AL     2             Move AL to (seg:offset)
  32 A3       MOV moffs16,AX    2             Move AX to (seg:offset)
  33 A3       MOV moffs32,EAX   2             Move EAX to (seg:offset)
  34 B0 + rb  MOV reg8,imm8     2             Move immediate byte to register
  35 B8 + rw  MOV reg16,imm16   2             Move immediate word to register
  36 B8 + rd  MOV reg32,imm32   2             Move immediate dword to register
  37 C6       MOV r/m8,imm8     2/2           Move immediate byte to r/m byte
  38 C7       MOV r/m16,imm16   2/2           Move immediate word to r/m word
  39 C7       MOV r/m32,imm32   2/2           Move immediate dword to r/m dword
  40 </PRE>
  41
  42 <EM>
  43 <H3>Notes</H3>
  44   moffs8, moffs16, and moffs32 all consist of a simple offset relative
  45   to the segment base. The 8, 16, and 32 refer to the size of the data. The
  46   address-size attribute of the instruction determines the size of the
  47   offset, either 16 or 32 bits.
  48 </EM>
  49
  50
  51 <H2>Operation</H2>
  52
  53 <PRE>
  54 DEST := SRC;
  55 </PRE>
  56
  57 <H2>Description</H2>
  58
  59 MOV copies the second operand to the first operand.
  60 <P>
  61 If the destination operand is a segment register (DS, ES, SS, etc.), then
  62 data from a descriptor is also loaded into the register. The data for the
  63 register is obtained from the descriptor table entry for the selector
  64 given. A null selector (values 0000-0003) can be loaded into DS and ES
  65 registers without causing an exception; however, use of DS or ES causes a
  66 #GP(0), and no memory reference occurs.
  67 <P>
  68 A MOV into SS inhibits all interrupts until after the execution of the
  69 next instruction (which is presumably a MOV into eSP).
  70 <P>
  71 Loading a segment register under 80386 Protected Mode results in special
  72 checks and actions, as described in the following listing:
  73
  74 <PRE>
  75 IF SS is loaded;
  76 THEN
  77    IF selector is null THEN #GP(0);
  78 FI;
  79    Selector index must be within its descriptor table limits else
  80       #GP(selector);
  81    Selector's RPL must equal CPL else #GP(selector);
  82 AR byte must indicate a writable data segment else #GP(selector);
  83    DPL in the AR byte must equal CPL else #GP(selector);
  84    Segment must be marked present else #SS(selector);
  85    Load SS with selector;
  86    Load SS with descriptor.
  87 FI;
  88 IF DS, ES, FS or GS is loaded with non-null selector;
  89 THEN
  90    Selector index must be within its descriptor table limits
  91       else #GP(selector);
  92    AR byte must indicate data or readable code segment else
  93       #GP(selector);
  94    IF data or nonconforming code segment
  95    THEN both the RPL and the CPL must be less than or equal to DPL in
  96       AR byte;
  97    ELSE #GP(selector);
  98    FI;
  99    Segment must be marked present else #NP(selector);
 100    Load segment register with selector;
 101    Load segment register with descriptor;
 102 FI;
 103 IF DS, ES, FS or GS is loaded with a null selector;
 104 THEN
 105    Load segment register with selector;
 106    Clear descriptor valid bit;
 107 FI;
 108 </PRE>
 109
 110 <H2>Flags Affected</H2>
 111
 112 None
 113
 114 <H2>Protected Mode Exceptions</H2>
 115
 116 #GP, #SS, and #NP if a segment register is being loaded; otherwise,
 117 #GP(0) if the destination is in a nonwritable segment; #GP(0) for an
 118 illegal memory operand effective address in the CS, DS, ES, FS, or GS
 119 segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code)
 120 for a page fault
 121
 122 <H2>Real Address Mode Exceptions</H2>
 123
 124 Interrupt 13 if any part of the operand would lie outside of the effective
 125 address space from 0 to 0FFFFH
 126
 127 <H2>Virtual 8086 Mode Exceptions</H2>
 128
 129 Same exceptions as in Real Address Mode; #PF(fault-code) for a page
 130 fault
 131
 132
 133 <P>
 134 <HR>
 135 <P>
 136 <B>up:</B> <A HREF="c17.htm">
 137 Chapter 17 -- 80386 Instruction Set</A><BR>
 138 <B>prev:</B><A HREF="LTR.htm"> LTR Load Task Register</A><BR>
 139 <B>next:</B><A HREF="MOVRS.htm"> MOV Move to/from Special Registers</A>
 140 </BODY>