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4 <TITLE>80386 Programmer's Reference Manual -- Opcode RCL
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8 Chapter
17 --
80386 Instruction Set
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14 <H1>RCL/RCR/ROL/ROR -- Rotate
</H1>
18 Opcode Instruction Clocks Description
20 D0 /
2 RCL r/m8,
1 9/
10 Rotate
9 bits (CF,r/m byte) left
22 D2 /
2 RCL r/m8,CL
9/
10 Rotate
9 bits (CF,r/m byte) left CL
24 C0 /
2 ib RCL r/m8,imm8
9/
10 Rotate
9 bits (CF,r/m byte) left
26 D1 /
2 RCL r/m16,
1 9/
10 Rotate
17 bits (CF,r/m word) left
28 D3 /
2 RCL r/m16,CL
9/
10 Rotate
17 bits (CF,r/m word) left
30 C1 /
2 ib RCL r/m16,imm8
9/
10 Rotate
17 bits (CF,r/m word) left
32 D1 /
2 RCL r/m32,
1 9/
10 Rotate
33 bits (CF,r/m dword) left
34 D3 /
2 RCL r/m32,CL
9/
10 Rotate
33 bits (CF,r/m dword) left
36 C1 /
2 ib RCL r/m32,imm8
9/
10 Rotate
33 bits (CF,r/m dword) left
38 D0 /
3 RCR r/m8,
1 9/
10 Rotate
9 bits (CF,r/m byte) right
40 D2 /
3 RCR r/m8,CL
9/
10 Rotate
9 bits (CF,r/m byte) right
42 C0 /
3 ib RCR r/m8,imm8
9/
10 Rotate
9 bits (CF,r/m byte) right
44 D1 /
3 RCR r/m16,
1 9/
10 Rotate
17 bits (CF,r/m word) right
46 D3 /
3 RCR r/m16,CL
9/
10 Rotate
17 bits (CF,r/m word) right
48 C1 /
3 ib RCR r/m16,imm8
9/
10 Rotate
17 bits (CF,r/m word) right
50 D1 /
3 RCR r/m32,
1 9/
10 Rotate
33 bits (CF,r/m dword) right
52 D3 /
3 RCR r/m32,CL
9/
10 Rotate
33 bits (CF,r/m dword) right
54 C1 /
3 ib RCR r/m32,imm8
9/
10 Rotate
33 bits (CF,r/m dword) right
56 D0 /
0 ROL r/m8,
1 3/
7 Rotate
8 bits r/m byte left once
57 D2 /
0 ROL r/m8,CL
3/
7 Rotate
8 bits r/m byte left CL
59 C0 /
0 ib ROL r/m8,imm8
3/
7 Rotate
8 bits r/m byte left imm8
61 D1 /
0 ROL r/m16,
1 3/
7 Rotate
16 bits r/m word left once
62 D3 /
0 ROL r/m16,CL
3/
7 Rotate
16 bits r/m word left CL
64 C1 /
0 ib ROL r/m16,imm8
3/
7 Rotate
16 bits r/m word left imm8
66 D1 /
0 ROL r/m32,
1 3/
7 Rotate
32 bits r/m dword left once
67 D3 /
0 ROL r/m32,CL
3/
7 Rotate
32 bits r/m dword left CL
69 C1 /
0 ib ROL r/m32,imm8
3/
7 Rotate
32 bits r/m dword left imm8
71 D0 /
1 ROR r/m8,
1 3/
7 Rotate
8 bits r/m byte right once
72 D2 /
1 ROR r/m8,CL
3/
7 Rotate
8 bits r/m byte right CL
74 C0 /
1 ib ROR r/m8,imm8
3/
7 Rotate
8 bits r/m word right imm8
76 D1 /
1 ROR r/m16,
1 3/
7 Rotate
16 bits r/m word right once
77 D3 /
1 ROR r/m16,CL
3/
7 Rotate
16 bits r/m word right CL
79 C1 /
1 ib ROR r/m16,imm8
3/
7 Rotate
16 bits r/m word right imm8
81 D1 /
1 ROR r/m32,
1 3/
7 Rotate
32 bits r/m dword right once
82 D3 /
1 ROR r/m32,CL
3/
7 Rotate
32 bits r/m dword right CL
84 C1 /
1 ib ROR r/m32,imm8
3/
7 Rotate
32 bits r/m dword right imm8
92 (* ROL - Rotate Left *)
96 tmpcf := high-order bit of (r/m);
97 r/m := r/m *
2 + (tmpcf);
102 IF high-order bit of r/m <
> CF
106 ELSE OF := undefined;
108 (* ROR - Rotate Right *)
112 tmpcf := low-order bit of (r/m);
113 r/m := r/m /
2 + (tmpcf *
2^(width(r/m)));
118 IF (high-order bit of r/m) <
> (bit next to high-order bit of r/m)
122 ELSE OF := undefined;
128 Each rotate instruction shifts the bits of the register or memory operand
129 given. The left rotate instructions shift all the bits upward, except for
130 the top bit, which is returned to the bottom. The right rotate instructions
131 do the reverse: the bits shift downward until the bottom bit arrives at
134 For the RCL and RCR instructions, the carry flag is part of the rotated
135 quantity. RCL shifts the carry flag into the bottom bit and shifts the top
136 bit into the carry flag; RCR shifts the carry flag into the top bit and
137 shifts the bottom bit into the carry flag. For the ROL and ROR
138 instructions, the original value of the carry flag is not a part of the
139 result, but the carry flag receives a copy of the bit that was shifted from
140 one end to the other.
142 The rotate is repeated the number of times indicated by the second
143 operand, which is either an immediate number or the contents of the CL
144 register. To reduce the maximum instruction execution time, the
80386
145 does not allow rotation counts greater than
31. If a rotation count greater
146 than
31 is attempted, only the bottom five bits of the rotation are used.
147 The
8086 does not mask rotation counts. The
80386 in Virtual
8086 Mode does
148 mask rotation counts.
150 The overflow flag is defined only for the single-rotate forms of the
151 instructions (second operand :=
1). It is undefined in all other cases. For
152 left shifts/rotates, the CF bit after the shift is XORed with the
153 high-order result bit. For right shifts/rotates, the high-order two bits of
154 the result are XORed to get OF.
156 <H2>Flags Affected
</H2>
158 OF only for single rotates; OF is undefined for multi-bit rotates; CF as
161 <H2>Protected Mode Exceptions
</H2>
163 #GP(
0) if the result is in a nonwritable segment; #GP(
0) for an illegal
164 memory operand effective address in the CS, DS, ES, FS, or GS
165 segments; #SS(
0) for an illegal address in the SS segment; #PF(fault-code)
168 <H2>Real Address Mode Exceptions
</H2>
170 Interrupt
13 if any part of the operand would lie outside of the effective
171 address space from
0 to
0FFFFH
173 <H2>Virtual
8086 Mode Exceptions
</H2>
175 Same exceptions as in Real Address Mode; #PF(fault-code) for a page
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