hw/i386.reference/c05.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Chapter 05</TITLE>
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  13 <P>
  14 <H1>Chapter 5  Memory Management</H1>
  15 <P>
  16 The 80386 transforms logical addresses (i.e., addresses as viewed by
  17 programmers) into physical address (i.e., actual addresses in physical
  18 memory) in two steps:
  19 <UL>
  20 <LI>Segment translation, in which a logical address (consisting of a
  21      segment selector and segment offset) are converted to a linear address.
  22
  23 <LI>Page translation, in which a linear address is converted to a physical
  24      address. This step is optional, at the discretion of systems-software
  25      designers.
  26 </UL>
  27 These translations are performed in a way that is not visible to
  28 applications programmers.
  29 <A HREF="#fig5-1">Figure 5-1</A>
  30   illustrates the two translations at a
  31 high level of abstraction.
  32 <P>
  33
  34 <A HREF="#fig5-1">Figure 5-1</A>
  35   and the remainder of this chapter present a simplified view of
  36 the 80386 addressing mechanism. In reality, the addressing mechanism also
  37 includes memory protection features. For the sake of simplicity, however,
  38 the subject of protection is taken up in another chapter,
  39 <A HREF="c06.htm">Chapter 6</A>.
  40 <P>
  41 <A NAME="fig5-1">
  42 <IMG align=center SRC="fig5-1.gif" border=0>
  43 <P>
  44 <A HREF="s05_01.htm">5.1  Segment Translation</A><BR>
  45 <A HREF="s05_02.htm">5.2  Page Translation</A><BR>
  46 <A HREF="s05_03.htm">5.3  Combining Segment and Page Translation</A>
  47 <P>
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