hw/i386.reference/s02_01.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Section 2.1</TITLE>
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  13 <P>
  14 <H1>2.1  Memory Organization and Segmentation</H1>
  15 The physical memory of an 80386 system is organized as a sequence of 8-bit
  16 bytes. Each byte is assigned a unique address that ranges from zero to a
  17 maximum of 2^(32) -1 (4 gigabytes).
  18 <P>
  19 80386 programs, however, are independent of the physical address space.
  20 This means that programs can be written without knowledge of how much
  21 physical memory is available and without knowledge of exactly where in
  22 physical memory the instructions and data are located.
  23 <P>
  24 The model of memory organization seen by applications programmers is
  25 determined by systems-software designers. The architecture of the 80386
  26 gives designers the freedom to choose a model for each task. The model of
  27 memory organization can range between the following extremes:
  28 <UL>
  29 <LI> A "flat" address space consisting of a single array of up to 4
  30 gigabytes.
  31 <LI> A segmented address space consisting of a collection of up to 16,383
  32 linear address spaces of up to 4 gigabytes each.
  33 </UL>
  34 <P>
  35 Both models can provide memory protection. Different tasks may employ
  36 different models of memory organization. The criteria that designers use to
  37 determine a memory organization model and the means that systems programmers
  38 use to implement that model are covered in Part -- Programming.
  39
  40 <H2>2.1.1  The "Flat" Model</H2>
  41 In a "flat" model of memory organization, the applications programmer sees
  42 a single array of up to 2^(32) bytes (4 gigabytes). While the physical
  43 memory can contain up to 4 gigabytes, it is usually much smaller; the
  44 processor maps the 4 gigabyte flat space onto the physical address space by
  45 the address translation mechanisms described in
  46 <A HREF="c05.htm">Chapter 5</A>
  47    . Applications
  48 programmers do not need to know the details of the mapping.
  49 <P>
  50 A pointer into this flat address space is a 32-bit ordinal number that may
  51 range from 0 to 2^(32) -1. Relocation of separately-compiled modules in this
  52 space must be performed by systems software (e.g., linkers, locators,
  53 binders, loaders).
  54
  55 <H2>2.1.2  The Segmented Model</H2>
  56 In a segmented model of memory organization, the address space as viewed by
  57 an applications program (called the logical address space) is a much larger
  58 space of up to 2^(46) bytes (64 terabytes). The processor maps the 64
  59 terabyte logical address space onto the physical address space (up to 4
  60 gigabytes ) by the address translation mechanisms described in
  61 <A HREF="c05.htm">Chapter 5</A>
  62    .
  63 Applications programmers do not need to know the details of this mapping.
  64 <P>
  65 Applications programmers view the logical address space of the 80386 as a
  66 collection of up to 16,383 one-dimensional subspaces, each with a specified
  67 length. Each of these linear subspaces is called a segment. A segment is a
  68 unit of contiguous address space. Segment sizes may range from one byte up
  69 to a maximum of 2^(32) bytes (4 gigabytes).
  70 <P>
  71 A complete pointer in this address space consists of two parts (see
  72 <A HREF="s02_02.htm#fig2-1">Figure 2-1</A>
  73   ):
  74 <OL>
  75 <LI>A segment selector, which is a 16-bit field that identifies a
  76 segment.
  77 <LI>An offset, which is a 32-bit ordinal that addresses to the byte level
  78 within a segment.
  79 </OL>
  80 During execution of a program, the processor associates with a segment
  81 selector the physical address of the beginning of the segment. Separately
  82 compiled modules can be relocated at run time by changing the base address
  83 of their segments. The size of a segment is variable; therefore, a segment
  84 can be exactly the size of the module it contains.
  85 <P>
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