hw/i386.reference/s08_01.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Section 8.1</TITLE>
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   8 Chapter 8 -- Input/Output</A><BR>
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  13 <P>
  14 <H1>8.1  I/O Addressing</H1>
  15 The 80386 allows input/output to be performed in either of two ways:
  16 <UL>
  17 <LI> By means of a separate I/O address space (using specific I/O
  18 instructions)
  19 <LI> By means of memory-mapped I/O (using general-purpose operand
  20 manipulation instructions).
  21 </UL>
  22
  23 <H2>8.1.1  I/O Address Space</H2>
  24 The 80386 provides a separate I/O address space, distinct from physical
  25 memory, that can be used to address the input/output ports that are used for
  26 external 16 devices. The I/O address space consists of 2^(16) (64K)
  27 individually addressable 8-bit ports; any two consecutive 8-bit ports can be
  28 treated as a 16-bit port; and four consecutive 8-bit ports can be treated
  29 as a 32-bit port. Thus, the I/O address space can accommodate up to 64K
  30 8-bit ports, up to 32K 16-bit ports, or up to 16K 32-bit ports.
  31 <P>
  32 The program can specify the address of the port in two ways. Using an
  33 immediate byte constant, the program can specify:
  34 <UL>
  35 <LI> 256 8-bit ports numbered 0 through 255.
  36 <LI> 128 16-bit ports numbered 0, 2, 4, . . . , 252, 254.
  37 <LI> 64 32-bit ports numbered 0, 4, 8, . . . , 248, 252.
  38 </UL>
  39 Using a value in DX, the program can specify:
  40 <UL>
  41 <LI> 8-bit ports numbered 0 through 65535
  42 <LI> 16-bit ports numbered 0, 2, 4, . . . , 65532, 65534
  43 <LI> 32-bit ports numbered 0, 4, 8, . . . , 65528, 65532
  44 </UL>
  45 The 80386 can transfer 32, 16, or 8 bits at a time to a device located in
  46 the I/O space. Like doublewords in memory, 32-bit ports should be aligned at
  47 addresses evenly divisible by four so that the 32 bits can be transferred in
  48 a single bus access. Like words in memory, 16-bit ports should be aligned at
  49 even-numbered addresses so that the 16 bits can be transferred in a single
  50 bus access. An 8-bit port may be located at either an even or odd address.
  51 <P>
  52 The instructions <A HREF="IN.htm">IN</A> and
  53 <A HREF="OUT.htm">OUT</A> move data between a register and a port in the
  54 I/O address space. The instructions <A HREF="INS.htm">INS</A> and
  55 <A HREF="OUTS.htm">OUTS</A> move strings of data
  56 between the memory address space and ports in the I/O address space.
  57
  58 <H2>8.1.2  Memory-Mapped I/O</H2>
  59 I/O devices also may be placed in the 80386 memory address space. As long
  60 as the devices respond like memory components, they are indistinguishable to
  61 the processor.
  62 <P>
  63 Memory-mapped I/O provides additional programming flexibility. Any
  64 instruction that references memory may be used to access an I/O port located
  65 in the memory space. For example, the <A HREF="MOV.htm">MOV</A> instruction can transfer data
  66 between any register and a port; and the <A HREF="AND.htm">AND</A>, <A HREF="OR.htm">OR</A>, and <A HREF="TEST.htm">TEST</A> instructions may
  67 be used to manipulate bits in the internal registers of a device (see
  68 <A HREF="s08_02.htm#fig8-1">Figure 8-1</A>
  69   ). Memory-mapped I/O performed via the full instruction set maintains
  70 the full complement of addressing modes for selecting the desired I/O
  71 device (e.g., direct address, indirect address, base register, index
  72 register, scaling).
  73 <P>
  74 Memory-mapped I/O, like any other memory reference, is subject to access
  75 protection and control when executing in protected mode. Refer to
  76 <A HREF="c06.htm">Chapter 6</A>
  77
  78 for a discussion of memory protection.
  79 <P>
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