hw/i386.reference/s15_01.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Section 15.1</TITLE>
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   8 Chapter 15 -- Virtual 8086 Mode</A><BR>
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  10 <A HREF="c15.htm">Chapter 15 -- Virtual 8086 Mode</A><BR>
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  12 <P>
  13 <HR>
  14 <P>
  15 <H1>15.1  Executing 8086 Code</H1>
  16 The processor executes in V86 mode when the VM (virtual machine) bit in the
  17 EFLAGS register is set. The processor tests this flag under two general
  18 conditions:
  19 <OL>
  20 <LI> When loading segment registers to know whether to use 8086-style
  21 address formation.
  22 <LI> When decoding instructions to determine which instructions are
  23 sensitive to IOPL.
  24 </OL>
  25 Except for these two modifications to its normal operations, the 80386 in
  26 V86 mode operated much as in protected mode.
  27
  28 <H2>15.1.1  Registers and Instructions</H2>
  29 The register set available in V86 mode includes all the registers defined
  30 for the 8086 plus the new registers introduced by the 80386: FS, GS, debug
  31 registers, control registers, and test registers. New instructions that
  32 explicitly operate on the segment registers FS and GS are available, and the
  33 new segment-override prefixes can be used to cause instructions to utilize
  34 FS and GS for address calculations. Instructions can utilize 32-bit
  35 operands through the use of the operand size prefix.
  36 <P>
  37 8086 programs running as V86 tasks are able to take advantage of the new
  38 applications-oriented instructions added to the architecture by the
  39 introduction of the 80186/80188, 80286 and 80386:
  40 <UL>
  41 <LI> New instructions introduced by 80186/80188 and 80286.
  42 <UL>
  43 <LI> <A HREF="PUSH.htm">PUSH</A> immediate data
  44 <LI> Push all and pop all (<A HREF="PUSHA.htm">PUSHA</A> and
  45 <A HREF="POPA.htm">POPA</A>)
  46 <LI> Multiply immediate data
  47 <LI> Shift and rotate by immediate count
  48 <LI> String I/O
  49 <LI> <A HREF="ENTER.htm">ENTER</A> and
  50 <A HREF="LEAVE.htm">LEAVE</A>
  51 <LI> <A HREF="BOUND.htm">BOUND</A>
  52 </UL>
  53 <LI> New instructions introduced by 80386.
  54 <UL>
  55 <LI> <A HREF="LGS.htm">LSS</A>,
  56 <A HREF="LGS.htm">LFS</A>,
  57 <A HREF="LGS.htm">LGS</A> instructions
  58 <LI> Long-displacement conditional jumps
  59 <LI> Single-bit instructions
  60 <LI> Bit scan
  61 <LI> Double-shift instructions
  62 <LI> Byte set on condition
  63 <LI> Move with sign/zero extension
  64 <LI> Generalized multiply
  65 </UL>
  66 </UL>
  67
  68 <H2>15.1.2  Linear Address Formation</H2>
  69 In V86 mode, the 80386 processor does not interpret 8086 selectors by
  70 referring to descriptors; instead, it forms linear addresses as an 8086
  71 would. It shifts the selector left by four bits to form a 20-bit base
  72 address. The effective address is extended with four high-order zeros and
  73 added to the base address to create a linear address as
  74 <A HREF="#fig15-1">Figure 15-1</A>
  75 illustrates.
  76 <P>
  77 Because of the possibility of a carry, the resulting linear address may
  78 contain up to 21 significant bits. An 8086 program may generate linear
  79 addresses anywhere in the range 0 to 10FFEFH (one megabyte plus
  80 approximately 64 Kbytes) of the task's linear address space.
  81 <P>
  82 V86 tasks generate 32-bit linear addresses. While an 8086 program can only
  83 utilize the low-order 21 bits of a linear address, the linear address can be
  84 mapped via page tables to any 32-bit physical address.
  85 <P>
  86 Unlike the 8086 and 80286, 32-bit effective addresses can be generated (via
  87 the address-size prefix); however, the value of a 32-bit address may not
  88 exceed 65,535 without causing an exception. For full compatibility with
  89 80286 real-address mode, pseudo-protection faults (interrupt 12 or 13 with
  90 no error code) occur if an address is generated outside the range 0 through
  91 65,535.
  92 <P>
  93 <A NAME="fig15-1">
  94 <IMG align=center SRC="fig15-1.gif" border=0>
  95 <P>
  96 <HR>
  97 <P>
  98 <B>up:</B> <A HREF="c15.htm">
  99 Chapter 15 -- Virtual 8086 Mode</A><BR>
 100 <B>prev:</B>
 101 <A HREF="c15.htm">Chapter 15 -- Virtual 8086 Mode</A><BR>
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