hw/i386.reference/s15_05.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Section 15.5</TITLE>
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   8 Chapter 15 -- Virtual 8086 Mode</A><BR>
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  14 <H1>15.5  Virtual I/O</H1>
  15 Many 8086 programs that were designed to execute on single-task systems use
  16 I/O devices directly. However, when these same programs are executed in a
  17 multitasking environment, such use of devices can be disruptive. The 80386
  18 provides sufficient flexibility to control I/O in a manner that both suits
  19 the needs of the new environment and is transparent to the 8086 program.
  20 Designers may take any of several possible approaches to controlling I/O:
  21 <UL>
  22 <LI> Implement or emulate the 8086 operating system as an 80386 program and
  23 require the 8086 application to do I/O via software interrupts to the
  24 operating system, trapping all attempts to do I/O directly.
  25 <LI> Let the 8086 program take complete control of all I/O.
  26 <LI> Selectively trap and emulate references that a task makes to specific
  27 I/O ports.
  28 <LI> Trap or redirect references to memory-mapped I/O addresses.
  29 </UL>
  30 The method of controlling I/O depends upon whether I/O ports are I/O mapped
  31 or memory mapped.
  32
  33 <H2>15.5.1  I/O-Mapped I/O</H2>
  34 I/O-mapped I/O in V86 mode differs from protected mode only in that the
  35 protection mechanism does not consult IOPL when executing the I/O
  36 instructions
  37 <A HREF="IN.htm">IN</A>,
  38 <A HREF="INS.htm">INS</A>,
  39 <A HREF="OUT.htm">OUT</A>,
  40 <A HREF="OUTS.htm">OUTS</A>. Only the I/O permission bit map controls
  41 the right for V86 tasks to execute these I/O instructions.
  42 <P>
  43 The I/O permission map traps I/O instructions selectively depending on the
  44 I/O addresses to which they refer. The I/O permission bit map of each V86
  45 task determines which I/O addresses are trapped for that task. Because each
  46 task may have a different I/O permission bit map, the addresses trapped for
  47 one task may be different from those trapped for others . Refer to
  48 <A HREF="c08.htm">Chapter 8</A>
  49
  50 for more information about the I/O permission map.
  51
  52 <H2>15.5.2  Memory-Mapped I/O</H2>
  53 In hardware designs that utilize memory-mapped I/O, the paging facilities
  54 of the 80386 can be used to trap or redirect I/O operations. Each task that
  55 executes memory-mapped I/O must have a page (or pages) for the memory-mapped
  56 address space. The V86 monitor may control memory-mapped I/O by any of
  57 these means:
  58 <UL>
  59 <LI> Assign the memory-mapped page to appropriate physical addresses.
  60 Different tasks may have different physical addresses, thereby
  61 preventing the tasks from interfering with each other.
  62 <LI> Cause a trap to the monitor by forcing a page fault on the
  63 memory-mapped page. Read-only pages trap writes. Not-present pages trap
  64 both reads and writes.
  65 </UL>
  66 Intervention for every I/O might be excessive for some kinds of I/O
  67 devices. A page fault can still be used in this case to cause intervention
  68 on the first I/O operation. The monitor can then at least make sure that the
  69 task has exclusive access to the device. Then the monitor can change the
  70 page status to present and read/write, allowing subsequent I/O to proceed at
  71 full speed.
  72
  73 <H2>15.5.3  Special I/O Buffers</H2>
  74 Buffers of intelligent controllers (for example, a bit-mapped graphics
  75 buffer) can also be virtualized via page mapping. The linear space for the
  76 buffer can be mapped to a different physical space for each virtual 8086
  77 task. The V86 monitor can then assume responsibility for spooling the data
  78 or assigning the virtual buffer to the real buffer at appropriate times.
  79 <P>
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  81 <P>
  82 <B>up:</B> <A HREF="c15.htm">
  83 Chapter 15 -- Virtual 8086 Mode</A><BR>
  84 <B>prev:</B> <A HREF="s15_04.htm">15.4  Additional Sensitive Instructions</A><BR>
  85 <B>next:</B> <A HREF="s15_06.htm">15.6  Differences From 8086</A>
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