i386/linux-2.3.21/arch/ppc/kernel/pmac_pci.c

   1 /*
   2  * Support for PCI bridges found on Power Macintoshes.
   3  * At present the "bandit" and "chaos" bridges are supported.
   4  * Fortunately you access configuration space in the same
   5  * way with either bridge.
   6  *
   7  * Copyright (C) 1997 Paul Mackerras (paulus@cs.anu.edu.au)
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/pci.h>
  17 #include <linux/delay.h>
  18 #include <linux/string.h>
  19 #include <linux/init.h>
  20
  21 #include <asm/init.h>
  22 #include <asm/io.h>
  23 #include <asm/pgtable.h>
  24 #include <asm/prom.h>
  25 #include <asm/pci-bridge.h>
  26 #include <asm/machdep.h>
  27
  28 #include "pci.h"
  29
  30 struct bridge_data **bridges, *bridge_list;
  31 static int max_bus;
  32
  33 static void add_bridges(struct device_node *dev, unsigned long *mem_ptr);
  34
  35 /*
  36  * Magic constants for enabling cache coherency in the bandit/PSX bridge.
  37  */
  38 #define APPLE_VENDID    0x106b
  39 #define BANDIT_DEVID    1
  40 #define BANDIT_DEVID_2  8
  41 #define BANDIT_REVID    3
  42
  43 #define BANDIT_DEVNUM   11
  44 #define BANDIT_MAGIC    0x50
  45 #define BANDIT_COHERENT 0x40
  46
  47 __pmac
  48 void *pci_io_base(unsigned int bus)
  49 {
  50         struct bridge_data *bp;
  51
  52         if (bus > max_bus || (bp = bridges[bus]) == 0)
  53                 return 0;
  54         return bp->io_base;
  55 }
  56
  57 __pmac
  58 int pci_device_loc(struct device_node *dev, unsigned char *bus_ptr,
  59                    unsigned char *devfn_ptr)
  60 {
  61         unsigned int *reg;
  62         int len;
  63
  64         reg = (unsigned int *) get_property(dev, "reg", &len);
  65         if (reg == 0 || len < 5 * sizeof(unsigned int)) {
  66                 /* doesn't look like a PCI device */
  67                 *bus_ptr = 0xff;
  68                 *devfn_ptr = 0xff;
  69                 return -1;
  70         }
  71         *bus_ptr = reg[0] >> 16;
  72         *devfn_ptr = reg[0] >> 8;
  73         return 0;
  74 }
  75
  76 __pmac
  77 int pmac_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn,
  78                                   unsigned char offset, unsigned char *val)
  79 {
  80         struct bridge_data *bp;
  81
  82         *val = 0xff;
  83         if (bus > max_bus || (bp = bridges[bus]) == 0)
  84                 return PCIBIOS_DEVICE_NOT_FOUND;
  85         if (bus == bp->bus_number) {
  86                 if (dev_fn < (11 << 3))
  87                         return PCIBIOS_DEVICE_NOT_FOUND;
  88                 out_le32(bp->cfg_addr,
  89                          (1UL << (dev_fn >> 3)) + ((dev_fn & 7) << 8)
  90                          + (offset & ~3));
  91         } else {
  92                 /* Bus number once again taken into consideration.
  93                  * Change applied from 2.1.24. This makes devices located
  94                  * behind PCI-PCI bridges visible.
  95                  * -Ranjit Deshpande, 01/20/99
  96                  */
  97                 out_le32(bp->cfg_addr, (bus << 16) + (dev_fn << 8) + (offset & ~3) + 1);
  98         }
  99         udelay(2);
 100         *val = in_8(bp->cfg_data + (offset & 3));
 101         return PCIBIOS_SUCCESSFUL;
 102 }
 103
 104 __pmac
 105 int pmac_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn,
 106                                   unsigned char offset, unsigned short *val)
 107 {
 108         struct bridge_data *bp;
 109
 110         *val = 0xffff;
 111         if (bus > max_bus || (bp = bridges[bus]) == 0)
 112                 return PCIBIOS_DEVICE_NOT_FOUND;
 113         if ((offset & 1) != 0)
 114                 return PCIBIOS_BAD_REGISTER_NUMBER;
 115         if (bus == bp->bus_number) {
 116                 if (dev_fn < (11 << 3))
 117                         return PCIBIOS_DEVICE_NOT_FOUND;
 118                 out_le32(bp->cfg_addr,
 119                          (1UL << (dev_fn >> 3)) + ((dev_fn & 7) << 8)
 120                          + (offset & ~3));
 121         } else {
 122                 /* See pci_read_config_byte */
 123                 out_le32(bp->cfg_addr, (bus << 16) + (dev_fn << 8) + (offset & ~3) + 1);
 124         }
 125         udelay(2);
 126         *val = in_le16((volatile unsigned short *)(bp->cfg_data + (offset & 3)));
 127         return PCIBIOS_SUCCESSFUL;
 128 }
 129
 130 __pmac
 131 int pmac_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn,
 132                                    unsigned char offset, unsigned int *val)
 133 {
 134         struct bridge_data *bp;
 135
 136         *val = 0xffffffff;
 137         if (bus > max_bus || (bp = bridges[bus]) == 0)
 138                 return PCIBIOS_DEVICE_NOT_FOUND;
 139         if ((offset & 3) != 0)
 140                 return PCIBIOS_BAD_REGISTER_NUMBER;
 141         if (bus == bp->bus_number) {
 142                 if (dev_fn < (11 << 3))
 143                         return PCIBIOS_DEVICE_NOT_FOUND;
 144                 out_le32(bp->cfg_addr,
 145                          (1UL << (dev_fn >> 3)) + ((dev_fn & 7) << 8)
 146                          + offset);
 147         } else {
 148                 /* See pci_read_config_byte */
 149                 out_le32(bp->cfg_addr, (bus << 16) + (dev_fn << 8) + offset + 1);
 150         }
 151         udelay(2);
 152         *val = in_le32((volatile unsigned int *)bp->cfg_data);
 153         return PCIBIOS_SUCCESSFUL;
 154 }
 155
 156 __pmac
 157 int pmac_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn,
 158                                    unsigned char offset, unsigned char val)
 159 {
 160         struct bridge_data *bp;
 161
 162         if (bus > max_bus || (bp = bridges[bus]) == 0)
 163                 return PCIBIOS_DEVICE_NOT_FOUND;
 164         if (bus == bp->bus_number) {
 165                 if (dev_fn < (11 << 3))
 166                         return PCIBIOS_DEVICE_NOT_FOUND;
 167                 out_le32(bp->cfg_addr,
 168                          (1UL << (dev_fn >> 3)) + ((dev_fn & 7) << 8)
 169                          + (offset & ~3));
 170         } else {
 171                 /* See pci_read_config_byte */
 172                 out_le32(bp->cfg_addr, (bus << 16) + (dev_fn << 8) + (offset & ~3) + 1);
 173         }
 174         udelay(2);
 175         out_8(bp->cfg_data + (offset & 3), val);
 176         return PCIBIOS_SUCCESSFUL;
 177 }
 178
 179 __pmac
 180 int pmac_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn,
 181                                    unsigned char offset, unsigned short val)
 182 {
 183         struct bridge_data *bp;
 184
 185         if (bus > max_bus || (bp = bridges[bus]) == 0)
 186                 return PCIBIOS_DEVICE_NOT_FOUND;
 187         if ((offset & 1) != 0)
 188                 return PCIBIOS_BAD_REGISTER_NUMBER;
 189         if (bus == bp->bus_number) {
 190                 if (dev_fn < (11 << 3))
 191                         return PCIBIOS_DEVICE_NOT_FOUND;
 192                 out_le32(bp->cfg_addr,
 193                          (1UL << (dev_fn >> 3)) + ((dev_fn & 7) << 8)
 194                          + (offset & ~3));
 195         } else {
 196                 /* See pci_read_config_byte */
 197                 out_le32(bp->cfg_addr, (bus << 16) + (dev_fn << 8) + (offset & ~3) + 1);
 198         }
 199         udelay(2);
 200         out_le16((volatile unsigned short *)(bp->cfg_data + (offset & 3)), val);
 201         return PCIBIOS_SUCCESSFUL;
 202 }
 203
 204 __pmac
 205 int pmac_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn,
 206                                     unsigned char offset, unsigned int val)
 207 {
 208         struct bridge_data *bp;
 209
 210         if (bus > max_bus || (bp = bridges[bus]) == 0)
 211                 return PCIBIOS_DEVICE_NOT_FOUND;
 212         if ((offset & 3) != 0)
 213                 return PCIBIOS_BAD_REGISTER_NUMBER;
 214         if (bus == bp->bus_number) {
 215                 if (dev_fn < (11 << 3))
 216                         return PCIBIOS_DEVICE_NOT_FOUND;
 217                 out_le32(bp->cfg_addr,
 218                          (1UL << (dev_fn >> 3)) + ((dev_fn & 7) << 8)
 219                          + offset);
 220         } else {
 221                 /* See pci_read_config_byte */
 222                 out_le32(bp->cfg_addr, (bus << 16) + (dev_fn << 8) + (offset & ~3) + 1);
 223         }
 224         udelay(2);
 225         out_le32((volatile unsigned int *)bp->cfg_data, val);
 226         return PCIBIOS_SUCCESSFUL;
 227 }
 228
 229 #define GRACKLE_CFA(b, d, o)    (0x80 | ((b) << 8) | ((d) << 16) \
 230                                  | (((o) & ~3) << 24))
 231
 232 int grackle_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn,
 233                                      unsigned char offset, unsigned char *val)
 234 {
 235         struct bridge_data *bp;
 236
 237         *val = 0xff;
 238         if (bus > max_bus || (bp = bridges[bus]) == 0)
 239                 return PCIBIOS_DEVICE_NOT_FOUND;
 240         out_be32(bp->cfg_addr, GRACKLE_CFA(bus, dev_fn, offset));
 241         *val = in_8(bp->cfg_data + (offset & 3));
 242         return PCIBIOS_SUCCESSFUL;
 243 }
 244
 245 int grackle_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn,
 246                                      unsigned char offset, unsigned short *val)
 247 {
 248         struct bridge_data *bp;
 249
 250         *val = 0xffff;
 251         if (bus > max_bus || (bp = bridges[bus]) == 0)
 252                 return PCIBIOS_DEVICE_NOT_FOUND;
 253         if ((offset & 1) != 0)
 254                 return PCIBIOS_BAD_REGISTER_NUMBER;
 255         out_be32(bp->cfg_addr, GRACKLE_CFA(bus, dev_fn, offset));
 256         *val = in_le16((volatile unsigned short *)(bp->cfg_data + (offset&3)));
 257         return PCIBIOS_SUCCESSFUL;
 258 }
 259
 260 int grackle_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn,
 261                                       unsigned char offset, unsigned int *val)
 262 {
 263         struct bridge_data *bp;
 264
 265         *val = 0xffffffff;
 266         if (bus > max_bus || (bp = bridges[bus]) == 0)
 267                 return PCIBIOS_DEVICE_NOT_FOUND;
 268         if ((offset & 3) != 0)
 269                 return PCIBIOS_BAD_REGISTER_NUMBER;
 270         out_be32(bp->cfg_addr, GRACKLE_CFA(bus, dev_fn, offset));
 271         *val = in_le32((volatile unsigned int *)bp->cfg_data);
 272         return PCIBIOS_SUCCESSFUL;
 273 }
 274
 275 int grackle_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn,
 276                                       unsigned char offset, unsigned char val)
 277 {
 278         struct bridge_data *bp;
 279
 280         if (bus > max_bus || (bp = bridges[bus]) == 0)
 281                 return PCIBIOS_DEVICE_NOT_FOUND;
 282         out_be32(bp->cfg_addr, GRACKLE_CFA(bus, dev_fn, offset));
 283         out_8(bp->cfg_data + (offset & 3), val);
 284         return PCIBIOS_SUCCESSFUL;
 285 }
 286
 287 int grackle_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn,
 288                                       unsigned char offset, unsigned short val)
 289 {
 290         struct bridge_data *bp;
 291
 292         if (bus > max_bus || (bp = bridges[bus]) == 0)
 293                 return PCIBIOS_DEVICE_NOT_FOUND;
 294         if ((offset & 1) != 0)
 295                 return PCIBIOS_BAD_REGISTER_NUMBER;
 296         out_be32(bp->cfg_addr, GRACKLE_CFA(bus, dev_fn, offset));
 297         out_le16((volatile unsigned short *)(bp->cfg_data + (offset&3)), val);
 298         return PCIBIOS_SUCCESSFUL;
 299 }
 300
 301 int grackle_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn,
 302                                     unsigned char offset, unsigned int val)
 303 {
 304         struct bridge_data *bp;
 305
 306         if (bus > max_bus || (bp = bridges[bus]) == 0)
 307                 return PCIBIOS_DEVICE_NOT_FOUND;
 308         if ((offset & 1) != 0)
 309                 return PCIBIOS_BAD_REGISTER_NUMBER;
 310         out_be32(bp->cfg_addr, GRACKLE_CFA(bus, dev_fn, offset));
 311         out_le32((volatile unsigned int *)bp->cfg_data, val);
 312         return PCIBIOS_SUCCESSFUL;
 313 }
 314
 315 /*
 316  * For a bandit bridge, turn on cache coherency if necessary.
 317  * N.B. we can't use pcibios_*_config_* here because bridges[]
 318  * is not initialized yet.
 319  */
 320 static void __init init_bandit(struct bridge_data *bp)
 321 {
 322         unsigned int vendev, magic;
 323         int rev;
 324
 325         /* read the word at offset 0 in config space for device 11 */
 326         out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + PCI_VENDOR_ID);
 327         udelay(2);
 328         vendev = in_le32((volatile unsigned int *)bp->cfg_data);
 329         if (vendev == (BANDIT_DEVID << 16) + APPLE_VENDID) {
 330                 /* read the revision id */
 331                 out_le32(bp->cfg_addr,
 332                          (1UL << BANDIT_DEVNUM) + PCI_REVISION_ID);
 333                 udelay(2);
 334                 rev = in_8(bp->cfg_data);
 335                 if (rev != BANDIT_REVID)
 336                         printk(KERN_WARNING
 337                                "Unknown revision %d for bandit at %p\n",
 338                                rev, bp->io_base);
 339         } else if (vendev != (BANDIT_DEVID_2 << 16) + APPLE_VENDID) {
 340                 printk(KERN_WARNING "bandit isn't? (%x)\n", vendev);
 341                 return;
 342         }
 343
 344         /* read the revision id */
 345         out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + PCI_REVISION_ID);
 346         udelay(2);
 347         rev = in_8(bp->cfg_data);
 348         if (rev != BANDIT_REVID)
 349                 printk(KERN_WARNING "Unknown revision %d for bandit at %p\n",
 350                        rev, bp->io_base);
 351
 352         /* read the word at offset 0x50 */
 353         out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + BANDIT_MAGIC);
 354         udelay(2);
 355         magic = in_le32((volatile unsigned int *)bp->cfg_data);
 356         if ((magic & BANDIT_COHERENT) != 0)
 357                 return;
 358         magic |= BANDIT_COHERENT;
 359         udelay(2);
 360         out_le32((volatile unsigned int *)bp->cfg_data, magic);
 361         printk(KERN_INFO "Cache coherency enabled for bandit/PSX at %p\n",
 362                bp->io_base);
 363 }
 364
 365 unsigned long __init pmac_find_bridges(unsigned long mem_start, unsigned long mem_end)
 366 {
 367         int bus;
 368         struct bridge_data *bridge;
 369
 370         bridge_list = 0;
 371         max_bus = 0;
 372         add_bridges(find_devices("bandit"), &mem_start);
 373         add_bridges(find_devices("chaos"), &mem_start);
 374         add_bridges(find_devices("pci"), &mem_start);
 375         bridges = (struct bridge_data **) mem_start;
 376         mem_start += (max_bus + 1) * sizeof(struct bridge_data *);
 377         memset(bridges, 0, (max_bus + 1) * sizeof(struct bridge_data *));
 378         for (bridge = bridge_list; bridge != NULL; bridge = bridge->next)
 379                 for (bus = bridge->bus_number; bus <= bridge->max_bus; ++bus)
 380                         bridges[bus] = bridge;
 381
 382         return mem_start;
 383 }
 384
 385 /*
 386  * We assume that if we have a G3 powermac, we have one bridge called
 387  * "pci" (a MPC106) and no bandit or chaos bridges, and contrariwise,
 388  * if we have one or more bandit or chaos bridges, we don't have a MPC106.
 389  */
 390 static void __init add_bridges(struct device_node *dev, unsigned long *mem_ptr)
 391 {
 392         int *bus_range;
 393         int len;
 394         struct bridge_data *bp;
 395         struct reg_property *addr;
 396
 397         for (; dev != NULL; dev = dev->next) {
 398                 addr = (struct reg_property *) get_property(dev, "reg", &len);
 399                 if (addr == NULL || len < sizeof(*addr)) {
 400                         printk(KERN_WARNING "Can't use %s: no address\n",
 401                                dev->full_name);
 402                         continue;
 403                 }
 404                 bus_range = (int *) get_property(dev, "bus-range", &len);
 405                 if (bus_range == NULL || len < 2 * sizeof(int)) {
 406                         printk(KERN_WARNING "Can't get bus-range for %s\n",
 407                                dev->full_name);
 408                         continue;
 409                 }
 410                 if (bus_range[1] == bus_range[0])
 411                         printk(KERN_INFO "PCI bus %d", bus_range[0]);
 412                 else
 413                         printk(KERN_INFO "PCI buses %d..%d", bus_range[0],
 414                                bus_range[1]);
 415                 printk(" controlled by %s at %x\n", dev->name, addr->address);
 416                 bp = (struct bridge_data *) *mem_ptr;
 417                 *mem_ptr += sizeof(struct bridge_data);
 418                 if (strcmp(dev->name, "pci") != 0) {
 419                         bp->cfg_addr = (volatile unsigned int *)
 420                                 ioremap(addr->address + 0x800000, 0x1000);
 421                         bp->cfg_data = (volatile unsigned char *)
 422                                 ioremap(addr->address + 0xc00000, 0x1000);
 423                         bp->io_base = (void *) ioremap(addr->address, 0x10000);
 424                 } else {
 425                         /* XXX */
 426                         bp->cfg_addr = (volatile unsigned int *)
 427                                 ioremap(0xfec00000, 0x1000);
 428                         bp->cfg_data = (volatile unsigned char *)
 429                                 ioremap(0xfee00000, 0x1000);
 430                         bp->io_base = (void *) ioremap(0xfe000000, 0x20000);
 431                 }
 432                 if (isa_io_base == 0)
 433                         isa_io_base = (unsigned long) bp->io_base;
 434                 bp->bus_number = bus_range[0];
 435                 bp->max_bus = bus_range[1];
 436                 bp->next = bridge_list;
 437                 bp->node = dev;
 438                 bridge_list = bp;
 439                 if (bp->max_bus > max_bus)
 440                         max_bus = bp->max_bus;
 441
 442                 if (strcmp(dev->name, "bandit") == 0)
 443                         init_bandit(bp);
 444         }
 445 }
 446
 447 void __init
 448 pmac_pcibios_fixup(void)
 449 {
 450         struct pci_dev *dev;
 451
 452         /*
 453          * FIXME: This is broken: We should not assign IRQ's to IRQless
 454          *        devices (look at PCI_INTERRUPT_PIN) and we also should
 455          *        honor the existence of multi-function devices where
 456          *        different functions have different interrupt pins. [mj]
 457          */
 458         for(dev=pci_devices; dev; dev=dev->next)
 459         {
 460                 /*
 461                  * Open Firmware often doesn't initialize the,
 462                  * PCI_INTERRUPT_LINE config register properly, so we
 463                  * should find the device node and se if it has an
 464                  * AAPL,interrupts property.
 465                  */
 466                 struct bridge_data *bp = bridges[dev->bus->number];
 467                 unsigned char pin;
 468
 469                 if (pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin) ||
 470                     !pin)
 471                         continue; /* No interrupt generated -> no fixup */
 472                 fix_intr(bp->node->child, dev);
 473         }
 474 }
 475
 476 void __init
 477 pmac_setup_pci_ptrs(void)
 478 {
 479         if (find_devices("pci") != 0) {
 480                 /* looks like a G3 powermac */
 481                 set_config_access_method(grackle);
 482         } else {
 483                 set_config_access_method(pmac);
 484         }
 485
 486         ppc_md.pcibios_fixup = pmac_pcibios_fixup;
 487 }
 488