* better
[mascara-docs.git] / i386 / linux-2.3.21 / arch / ppc / kernel / prep_setup.c
blob53c859a162a523adcd7f4db6379788885d052663
1 /*
2 * linux/arch/ppc/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 */
9 /*
10 * bootup setup stuff..
13 #include <linux/config.h>
14 #include <linux/module.h>
15 #include <linux/errno.h>
16 #include <linux/sched.h>
17 #include <linux/kernel.h>
18 #include <linux/mm.h>
19 #include <linux/stddef.h>
20 #include <linux/unistd.h>
21 #include <linux/ptrace.h>
22 #include <linux/malloc.h>
23 #include <linux/user.h>
24 #include <linux/a.out.h>
25 #include <linux/tty.h>
26 #include <linux/major.h>
27 #include <linux/interrupt.h>
28 #include <linux/reboot.h>
29 #include <linux/init.h>
30 #include <linux/blk.h>
31 #include <linux/ioport.h>
32 #include <linux/console.h>
33 #include <linux/timex.h>
34 #include <linux/pci.h>
35 #include <linux/openpic.h>
36 #include <linux/ide.h>
38 #include <asm/init.h>
39 #include <asm/mmu.h>
40 #include <asm/processor.h>
41 #include <asm/residual.h>
42 #include <asm/io.h>
43 #include <asm/pgtable.h>
44 #include <asm/ide.h>
45 #include <asm/cache.h>
46 #include <asm/dma.h>
47 #include <asm/machdep.h>
48 #include <asm/mk48t59.h>
49 #include <asm/prep_nvram.h>
50 #include <asm/raven.h>
51 #include <asm/keyboard.h>
53 #include "time.h"
54 #include "local_irq.h"
55 #include "i8259.h"
56 #include "open_pic.h"
58 #if defined(CONFIG_SOUND) || defined(CONFIG_SOUND_MODULE)
59 #include <../drivers/sound/sound_config.h>
60 #include <../drivers/sound/dev_table.h>
61 #endif
63 unsigned char ucSystemType;
64 unsigned char ucBoardRev;
65 unsigned char ucBoardRevMaj, ucBoardRevMin;
67 extern unsigned long mc146818_get_rtc_time(void);
68 extern int mc146818_set_rtc_time(unsigned long nowtime);
69 extern unsigned long mk48t59_get_rtc_time(void);
70 extern int mk48t59_set_rtc_time(unsigned long nowtime);
72 extern unsigned char prep_nvram_read_val(int addr);
73 extern void prep_nvram_write_val(int addr,
74 unsigned char val);
75 extern unsigned char rs_nvram_read_val(int addr);
76 extern void rs_nvram_write_val(int addr,
77 unsigned char val);
79 extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode);
80 extern int pckbd_getkeycode(unsigned int scancode);
81 extern int pckbd_translate(unsigned char scancode, unsigned char *keycode,
82 char raw_mode);
83 extern char pckbd_unexpected_up(unsigned char keycode);
84 extern void pckbd_leds(unsigned char leds);
85 extern void pckbd_init_hw(void);
86 extern unsigned char pckbd_sysrq_xlate[128];
88 extern void prep_setup_pci_ptrs(void);
89 extern char saved_command_line[256];
91 int _prep_type;
93 #define cached_21 (((char *)(ppc_cached_irq_mask))[3])
94 #define cached_A1 (((char *)(ppc_cached_irq_mask))[2])
96 /* for the mac fs */
97 kdev_t boot_dev;
98 /* used in nasty hack for sound - see prep_setup_arch() -- Cort */
99 long ppc_cs4232_dma, ppc_cs4232_dma2;
100 unsigned long empty_zero_page[1024];
102 extern PTE *Hash, *Hash_end;
103 extern unsigned long Hash_size, Hash_mask;
104 extern int probingmem;
105 extern unsigned long loops_per_sec;
107 #ifdef CONFIG_BLK_DEV_RAM
108 extern int rd_doload; /* 1 = load ramdisk, 0 = don't load */
109 extern int rd_prompt; /* 1 = prompt for ramdisk, 0 = don't prompt */
110 extern int rd_image_start; /* starting block # of image */
111 #endif
112 #ifdef CONFIG_VGA_CONSOLE
113 unsigned long vgacon_remap_base;
114 #endif
116 int __prep
117 prep_get_cpuinfo(char *buffer)
119 extern char *Motherboard_map_name;
120 int len, i;
122 #ifdef __SMP__
123 #define CD(X) (cpu_data[n].X)
124 #else
125 #define CD(X) (X)
126 #endif
128 len = sprintf(buffer,"machine\t\t: PReP %s\n",Motherboard_map_name);
131 switch ( _prep_type )
133 case _PREP_IBM:
134 if ((*(unsigned char *)0x8000080c) & (1<<6))
135 len += sprintf(buffer+len,"Upgrade CPU\n");
136 len += sprintf(buffer+len,"L2\t\t: ");
137 if ((*(unsigned char *)0x8000080c) & (1<<7))
139 len += sprintf(buffer+len,"not present\n");
140 goto no_l2;
142 len += sprintf(buffer+len,"%sKb,",
143 (((*(unsigned char *)0x8000080d)>>2)&1)?"512":"256");
144 len += sprintf(buffer+len,"%sync\n",
145 ((*(unsigned char *)0x8000080d)>>7) ? "":"a");
146 break;
147 case _PREP_Motorola:
148 len += sprintf(buffer+len,"L2\t\t: ");
149 switch(*((unsigned char *)CACHECRBA) & L2CACHE_MASK)
151 case L2CACHE_512KB:
152 len += sprintf(buffer+len,"512Kb");
153 break;
154 case L2CACHE_256KB:
155 len += sprintf(buffer+len,"256Kb");
156 break;
157 case L2CACHE_1MB:
158 len += sprintf(buffer+len,"1MB");
159 break;
160 case L2CACHE_NONE:
161 len += sprintf(buffer+len,"none\n");
162 goto no_l2;
163 break;
164 default:
165 len += sprintf(buffer+len, "%x\n",
166 *((unsigned char *)CACHECRBA));
169 len += sprintf(buffer+len,",parity %s",
170 (*((unsigned char *)CACHECRBA) & L2CACHE_PARITY) ?
171 "enabled" : "disabled");
173 len += sprintf(buffer+len, " SRAM:");
175 switch ( ((*((unsigned char *)CACHECRBA) & 0xf0) >> 4) & ~(0x3) )
177 case 1: len += sprintf(buffer+len,
178 "synchronous,parity,flow-through\n");
179 break;
180 case 2: len += sprintf(buffer+len,"asynchronous,no parity\n");
181 break;
182 case 3: len += sprintf(buffer+len,"asynchronous,parity\n");
183 break;
184 default:len += sprintf(buffer+len,
185 "synchronous,pipelined,no parity\n");
186 break;
188 break;
189 default:
190 break;
194 no_l2:
195 if ( res->ResidualLength == 0 )
196 return len;
198 /* print info about SIMMs */
199 len += sprintf(buffer+len,"simms\t\t: ");
200 for ( i = 0 ; (res->ActualNumMemories) && (i < MAX_MEMS) ; i++ )
202 if ( res->Memories[i].SIMMSize != 0 )
203 len += sprintf(buffer+len,"%d:%ldM ",i,
204 (res->Memories[i].SIMMSize > 1024) ?
205 res->Memories[i].SIMMSize>>20 :
206 res->Memories[i].SIMMSize);
208 len += sprintf(buffer+len,"\n");
210 return len;
213 void __init
214 prep_setup_arch(unsigned long * memory_start_p, unsigned long * memory_end_p)
216 extern char cmd_line[];
217 unsigned char reg;
218 unsigned char ucMothMemType;
219 unsigned char ucEquipPres1;
221 /* init to some ~sane value until calibrate_delay() runs */
222 loops_per_sec = 50000000;
224 /* Set up floppy in PS/2 mode */
225 outb(0x09, SIO_CONFIG_RA);
226 reg = inb(SIO_CONFIG_RD);
227 reg = (reg & 0x3F) | 0x40;
228 outb(reg, SIO_CONFIG_RD);
229 outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */
232 * We need to set up the NvRAM access routines early as prep_init
233 * has yet to be called
235 ppc_md.nvram_read_val = prep_nvram_read_val;
236 ppc_md.nvram_write_val = prep_nvram_write_val;
238 /* we should determine this according to what we find! -- Cort */
239 switch ( _prep_type )
241 case _PREP_IBM:
242 /* Enable L2. Assume we don't need to flush -- Cort*/
243 *(unsigned char *)(0x8000081c) |= 3;
244 ROOT_DEV = to_kdev_t(0x0301); /* hda1 */
245 break;
246 case _PREP_Motorola:
247 /* Enable L2. Assume we don't need to flush -- Cort*/
248 *(unsigned char *)(0x8000081c) |= 3;
249 ROOT_DEV = to_kdev_t(0x0802); /* sda2 */
250 break;
251 case _PREP_Radstone:
252 ROOT_DEV = to_kdev_t(0x0801); /* sda1 */
255 * Determine system type
257 ucMothMemType=inb(0x866);
258 ucEquipPres1=inb(0x80c);
260 ucSystemType=((ucMothMemType&0x03)<<1) |
261 ((ucEquipPres1&0x80)>>7);
262 ucSystemType^=7;
265 * Determine board revision for use by
266 * rev. specific code
268 ucBoardRev=inb(0x854);
269 ucBoardRevMaj=ucBoardRev>>5;
270 ucBoardRevMin=ucBoardRev&0x1f;
273 * Most Radstone boards have memory mapped NvRAM
275 if((ucSystemType==RS_SYS_TYPE_PPC1) && (ucBoardRevMaj<5))
277 ppc_md.nvram_read_val = prep_nvram_read_val;
278 ppc_md.nvram_write_val = prep_nvram_write_val;
280 else
282 ppc_md.nvram_read_val = rs_nvram_read_val;
283 ppc_md.nvram_write_val = rs_nvram_write_val;
285 break;
288 /* Read in NVRAM data */
289 init_prep_nvram();
291 /* if no bootargs, look in NVRAM */
292 if ( cmd_line[0] == '\0' ) {
293 char *bootargs;
294 bootargs = prep_nvram_get_var("bootargs");
295 if (bootargs != NULL) {
296 strcpy(cmd_line, bootargs);
298 /* again.. */
299 strcpy(saved_command_line, cmd_line);
303 printk("Boot arguments: %s\n", cmd_line);
305 #ifdef CONFIG_SOUND_CS4232
307 * setup proper values for the cs4232 driver so we don't have
308 * to recompile for the motorola or ibm workstations sound systems.
309 * This is a really nasty hack, but unless we change the driver
310 * it's the only way to support both addrs from one binary.
311 * -- Cort
313 if ( _machine == _MACH_prep )
315 extern struct card_info snd_installed_cards[];
316 struct card_info *snd_ptr;
318 for ( snd_ptr = snd_installed_cards;
319 snd_ptr < &snd_installed_cards[num_sound_cards];
320 snd_ptr++ )
322 if ( snd_ptr->card_type == SNDCARD_CS4232 )
324 if ( _prep_type == _PREP_Motorola )
326 snd_ptr->config.io_base = 0x830;
327 snd_ptr->config.irq = 10;
328 snd_ptr->config.dma = ppc_cs4232_dma = 6;
329 snd_ptr->config.dma2 = ppc_cs4232_dma2 = 7;
331 if ( _prep_type == _PREP_IBM )
333 snd_ptr->config.io_base = 0x530;
334 snd_ptr->config.irq = 5;
335 snd_ptr->config.dma = ppc_cs4232_dma = 1;
336 /* this is wrong - but leave it for now */
337 snd_ptr->config.dma2 = ppc_cs4232_dma2 = 7;
342 #endif /* CONFIG_SOUND_CS4232 */
344 /*print_residual_device_info();*/
345 request_region(0x20,0x20,"pic1");
346 request_region(0xa0,0x20,"pic2");
347 request_region(0x00,0x20,"dma1");
348 request_region(0x40,0x20,"timer");
349 request_region(0x80,0x10,"dma page reg");
350 request_region(0xc0,0x20,"dma2");
352 raven_init();
354 #ifdef CONFIG_VGA_CONSOLE
355 /* remap the VGA memory */
356 vgacon_remap_base = 0xf0000000;
357 /*vgacon_remap_base = ioremap(0xc0000000, 0xba000);*/
358 conswitchp = &vga_con;
359 #endif
363 * Determine the decrementer frequency from the residual data
364 * This allows for a faster boot as we do not need to calibrate the
365 * decrementer against another clock. This is important for embedded systems.
367 void __init prep_res_calibrate_decr(void)
369 int freq, divisor;
371 freq = res->VitalProductData.ProcessorBusHz;
372 divisor = 4;
373 printk("time_init: decrementer frequency = %d/%d\n", freq, divisor);
374 decrementer_count = freq / HZ / divisor;
375 count_period_num = divisor;
376 count_period_den = freq / 1000000;
380 * Uses the on-board timer to calibrate the on-chip decrementer register
381 * for prep systems. On the pmac the OF tells us what the frequency is
382 * but on prep we have to figure it out.
383 * -- Cort
385 int calibrate_done = 0;
386 volatile int *done_ptr = &calibrate_done;
388 void __init
389 prep_calibrate_decr_handler(int irq,
390 void *dev,
391 struct pt_regs *regs)
393 unsigned long freq, divisor;
394 static unsigned long t1 = 0, t2 = 0;
396 if ( !t1 )
397 t1 = get_dec();
398 else if (!t2)
400 t2 = get_dec();
401 t2 = t1-t2; /* decr's in 1/HZ */
402 t2 = t2*HZ; /* # decrs in 1s - thus in Hz */
403 freq = t2 * 60; /* try to make freq/1e6 an integer */
404 divisor = 60;
405 printk("time_init: decrementer frequency = %lu/%lu (%luMHz)\n",
406 freq, divisor,t2>>20);
407 decrementer_count = freq / HZ / divisor;
408 count_period_num = divisor;
409 count_period_den = freq / 1000000;
410 *done_ptr = 1;
414 void __init prep_calibrate_decr(void)
416 unsigned long flags;
419 save_flags(flags);
421 #define TIMER0_COUNT 0x40
422 #define TIMER_CONTROL 0x43
423 /* set timer to periodic mode */
424 outb_p(0x34,TIMER_CONTROL);/* binary, mode 2, LSB/MSB, ch 0 */
425 /* set the clock to ~100 Hz */
426 outb_p(LATCH & 0xff , TIMER0_COUNT); /* LSB */
427 outb(LATCH >> 8 , TIMER0_COUNT); /* MSB */
429 if (request_irq(0, prep_calibrate_decr_handler, 0, "timer", NULL) != 0)
430 panic("Could not allocate timer IRQ!");
431 __sti();
432 while ( ! *done_ptr ) /* nothing */; /* wait for calibrate */
433 restore_flags(flags);
434 free_irq( 0, NULL);
438 /* We use the NVRAM RTC to time a second to calibrate the decrementer. */
439 void __init mk48t59_calibrate_decr(void)
441 unsigned long freq, divisor;
442 unsigned long t1, t2;
443 unsigned char save_control;
444 long i;
445 unsigned char sec;
448 /* Make sure the time is not stopped. */
449 save_control = ppc_md.nvram_read_val(MK48T59_RTC_CONTROLB);
451 ppc_md.nvram_write_val(MK48T59_RTC_CONTROLA,
452 (save_control & (~MK48T59_RTC_CB_STOP)));
454 /* Now make sure the read bit is off so the value will change. */
455 save_control = ppc_md.nvram_read_val(MK48T59_RTC_CONTROLA);
456 save_control &= ~MK48T59_RTC_CA_READ;
457 ppc_md.nvram_write_val(MK48T59_RTC_CONTROLA, save_control);
460 /* Read the seconds value to see when it changes. */
461 sec = ppc_md.nvram_read_val(MK48T59_RTC_SECONDS);
462 for (i = 0 ; i < 1000000 ; i++) { /* may take up to 1 second... */
463 if (ppc_md.nvram_read_val(MK48T59_RTC_SECONDS) != sec) {
464 break;
467 t1 = get_dec();
469 sec = ppc_md.nvram_read_val(MK48T59_RTC_SECONDS);
470 for (i = 0 ; i < 1000000 ; i++) { /* Should take up 1 second... */
471 if (ppc_md.nvram_read_val(MK48T59_RTC_SECONDS) != sec) {
472 break;
476 t2 = t1 - get_dec();
478 freq = t2 * 60; /* try to make freq/1e6 an integer */
479 divisor = 60;
480 printk("time_init: decrementer frequency = %lu/%lu (%luMHz)\n",
481 freq, divisor,t2>>20);
482 decrementer_count = freq / HZ / divisor;
483 count_period_num = divisor;
484 count_period_den = freq / 1000000;
487 void __prep
488 prep_restart(char *cmd)
490 unsigned long i = 10000;
493 __cli();
495 /* set exception prefix high - to the prom */
496 _nmask_and_or_msr(0, MSR_IP);
498 /* make sure bit 0 (reset) is a 0 */
499 outb( inb(0x92) & ~1L , 0x92 );
500 /* signal a reset to system control port A - soft reset */
501 outb( inb(0x92) | 1 , 0x92 );
503 while ( i != 0 ) i++;
504 panic("restart failed\n");
508 * This function will restart a board regardless of port 92 functionality
510 void __prep
511 prep_direct_restart(char *cmd)
513 u32 jumpaddr=0xfff00100;
514 u32 defaultmsr=MSR_IP;
517 * This will ALWAYS work regardless of port 92
518 * functionality
520 __cli();
522 __asm__ __volatile__("\n\
523 mtspr 26, %1 /* SRR0 */
524 mtspr 27, %0 /* SRR1 */
525 rfi"
527 : "r" (defaultmsr), "r" (jumpaddr));
529 * Not reached
533 void __prep
534 prep_halt(void)
536 unsigned long flags;
537 __cli();
538 /* set exception prefix high - to the prom */
539 save_flags( flags );
540 restore_flags( flags|MSR_IP );
542 /* make sure bit 0 (reset) is a 0 */
543 outb( inb(0x92) & ~1L , 0x92 );
544 /* signal a reset to system control port A - soft reset */
545 outb( inb(0x92) | 1 , 0x92 );
547 while ( 1 ) ;
549 * Not reached
553 void __prep
554 prep_power_off(void)
556 prep_halt();
559 int __prep
560 prep_setup_residual(char *buffer)
562 int len = 0;
565 /* PREP's without residual data will give incorrect values here */
566 len += sprintf(len+buffer, "clock\t\t: ");
567 if ( res->ResidualLength )
568 len += sprintf(len+buffer, "%ldMHz\n",
569 (res->VitalProductData.ProcessorHz > 1024) ?
570 res->VitalProductData.ProcessorHz>>20 :
571 res->VitalProductData.ProcessorHz);
572 else
573 len += sprintf(len+buffer, "???\n");
575 return len;
578 u_int __prep
579 prep_irq_cannonicalize(u_int irq)
581 if (irq == 2)
583 return 9;
585 else
587 return irq;
591 #if 0
592 void __prep
593 prep_do_IRQ(struct pt_regs *regs, int cpu, int isfake)
595 int irq;
597 if ( (irq = i8259_irq(0)) < 0 )
599 printk(KERN_DEBUG "Bogus interrupt from PC = %lx\n",
600 regs->nip);
601 ppc_spurious_interrupts++;
602 return;
604 ppc_irq_dispatch_handler( regs, irq );
606 #endif
608 int __prep
609 prep_get_irq(struct pt_regs *regs)
611 return i8259_irq(smp_processor_id());
614 void __init
615 prep_init_IRQ(void)
617 int i;
619 if (OpenPIC != NULL) {
620 for ( i = 16 ; i < 36 ; i++ )
621 irq_desc[i].ctl = &open_pic;
622 openpic_init(1);
625 for ( i = 0 ; i < 16 ; i++ )
626 irq_desc[i].ctl = &i8259_pic;
627 i8259_init();
628 #ifdef __SMP__
629 request_irq(openpic_to_irq(OPENPIC_VEC_SPURIOUS), openpic_ipi_action,
630 0, "IPI0", 0);
631 #endif /* __SMP__ */
634 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
636 * IDE stuff.
638 void __prep
639 prep_ide_insw(ide_ioreg_t port, void *buf, int ns)
641 _insw((unsigned short *)((port)+_IO_BASE), buf, ns);
644 void __prep
645 prep_ide_outsw(ide_ioreg_t port, void *buf, int ns)
647 _outsw((unsigned short *)((port)+_IO_BASE), buf, ns);
650 int __prep
651 prep_ide_default_irq(ide_ioreg_t base)
653 switch (base) {
654 case 0x1f0: return 13;
655 case 0x170: return 13;
656 case 0x1e8: return 11;
657 case 0x168: return 10;
658 default:
659 return 0;
663 ide_ioreg_t __prep
664 prep_ide_default_io_base(int index)
666 switch (index) {
667 case 0: return 0x1f0;
668 case 1: return 0x170;
669 case 2: return 0x1e8;
670 case 3: return 0x168;
671 default:
672 return 0;
676 int __prep
677 prep_ide_check_region(ide_ioreg_t from, unsigned int extent)
679 return check_region(from, extent);
682 void __prep
683 prep_ide_request_region(ide_ioreg_t from,
684 unsigned int extent,
685 const char *name)
687 request_region(from, extent, name);
690 void __prep
691 prep_ide_release_region(ide_ioreg_t from,
692 unsigned int extent)
694 release_region(from, extent);
697 void __prep
698 prep_ide_fix_driveid(struct hd_driveid *id)
702 void __init
703 prep_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
705 ide_ioreg_t reg = data_port;
706 int i;
708 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
709 hw->io_ports[i] = reg;
710 reg += 1;
712 if (ctrl_port) {
713 hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
714 } else {
715 hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
717 if (irq != NULL)
718 *irq = 0;
720 #endif
722 void __init
723 prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
724 unsigned long r6, unsigned long r7)
726 /* make a copy of residual data */
727 if ( r3 )
729 memcpy((void *)res,(void *)(r3+KERNELBASE),
730 sizeof(RESIDUAL));
733 isa_io_base = PREP_ISA_IO_BASE;
734 isa_mem_base = PREP_ISA_MEM_BASE;
735 pci_dram_offset = PREP_PCI_DRAM_OFFSET;
736 ISA_DMA_THRESHOLD = 0x00ffffff;
737 DMA_MODE_READ = 0x44;
738 DMA_MODE_WRITE = 0x48;
740 /* figure out what kind of prep workstation we are */
741 if ( res->ResidualLength != 0 )
743 if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) )
744 _prep_type = _PREP_IBM;
745 else if (!strncmp(res->VitalProductData.PrintableModel,
746 "Radstone",8))
748 extern char *Motherboard_map_name;
750 _prep_type = _PREP_Radstone;
751 Motherboard_map_name=
752 res->VitalProductData.PrintableModel;
754 else
755 _prep_type = _PREP_Motorola;
757 else /* assume motorola if no residual (netboot?) */
759 _prep_type = _PREP_Motorola;
762 prep_setup_pci_ptrs();
764 #ifdef CONFIG_BLK_DEV_INITRD
765 /* take care of initrd if we have one */
766 if ( r4 )
768 initrd_start = r4 + KERNELBASE;
769 initrd_end = r5 + KERNELBASE;
771 #endif /* CONFIG_BLK_DEV_INITRD */
773 /* take care of cmd line */
774 if ( r6 && (((char *) r6) != '\0'))
776 *(char *)(r7+KERNELBASE) = 0;
777 strcpy(cmd_line, (char *)(r6+KERNELBASE));
780 ppc_md.setup_arch = prep_setup_arch;
781 ppc_md.setup_residual = prep_setup_residual;
782 ppc_md.get_cpuinfo = prep_get_cpuinfo;
783 ppc_md.irq_cannonicalize = prep_irq_cannonicalize;
784 ppc_md.init_IRQ = prep_init_IRQ;
785 /* this gets changed later on if we have an OpenPIC -- Cort */
786 ppc_md.get_irq = prep_get_irq;
787 ppc_md.init = NULL;
789 ppc_md.restart = prep_restart;
790 ppc_md.power_off = prep_power_off;
791 ppc_md.halt = prep_halt;
793 ppc_md.time_init = NULL;
794 if (_prep_type == _PREP_Radstone) {
796 * We require a direct restart as port 92 does not work on
797 * all Radstone boards
799 ppc_md.restart = prep_direct_restart;
801 * The RTC device used varies according to board type
803 if(((ucSystemType==RS_SYS_TYPE_PPC1) && (ucBoardRevMaj>=5)) ||
804 (ucSystemType==RS_SYS_TYPE_PPC1a))
806 ppc_md.set_rtc_time = mk48t59_set_rtc_time;
807 ppc_md.get_rtc_time = mk48t59_get_rtc_time;
809 else
811 ppc_md.set_rtc_time = mc146818_set_rtc_time;
812 ppc_md.get_rtc_time = mc146818_get_rtc_time;
815 * Determine the decrementer rate from the residual data
817 ppc_md.calibrate_decr = prep_res_calibrate_decr;
819 else if (_prep_type == _PREP_IBM) {
820 ppc_md.set_rtc_time = mc146818_set_rtc_time;
821 ppc_md.get_rtc_time = mc146818_get_rtc_time;
822 ppc_md.calibrate_decr = prep_calibrate_decr;
824 else {
825 ppc_md.set_rtc_time = mk48t59_set_rtc_time;
826 ppc_md.get_rtc_time = mk48t59_get_rtc_time;
827 ppc_md.calibrate_decr = mk48t59_calibrate_decr;
830 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
831 ppc_ide_md.insw = prep_ide_insw;
832 ppc_ide_md.outsw = prep_ide_outsw;
833 ppc_ide_md.default_irq = prep_ide_default_irq;
834 ppc_ide_md.default_io_base = prep_ide_default_io_base;
835 ppc_ide_md.ide_check_region = prep_ide_check_region;
836 ppc_ide_md.ide_request_region = prep_ide_request_region;
837 ppc_ide_md.ide_release_region = prep_ide_release_region;
838 ppc_ide_md.fix_driveid = prep_ide_fix_driveid;
839 ppc_ide_md.ide_init_hwif = prep_ide_init_hwif_ports;
840 #endif
841 ppc_ide_md.io_base = _IO_BASE;
843 #ifdef CONFIG_VT
844 ppc_md.kbd_setkeycode = pckbd_setkeycode;
845 ppc_md.kbd_getkeycode = pckbd_getkeycode;
846 ppc_md.kbd_translate = pckbd_translate;
847 ppc_md.kbd_unexpected_up = pckbd_unexpected_up;
848 ppc_md.kbd_leds = pckbd_leds;
849 ppc_md.kbd_init_hw = pckbd_init_hw;
850 #ifdef CONFIG_MAGIC_SYSRQ
851 ppc_md.ppc_kbd_sysrq_xlate = pckbd_sysrq_xlate;
852 SYSRQ_KEY = 0x54;
853 #endif
854 #endif
857 #ifdef CONFIG_SOUND_MODULE
858 EXPORT_SYMBOL(ppc_cs4232_dma);
859 EXPORT_SYMBOL(ppc_cs4232_dma2);
860 #endif