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[mascara-docs.git] / i386 / linux-2.3.21 / drivers / block / sis5513.c
blob08bbb1c9168ffc454ea41cd01a9d9590d5c3ff15
1 /*
2 * linux/drivers/block/sis5513.c Version 0.06 July 11, 1999
3 *
4 * Copyright (C) 1999 Andre Hedrick
5 *
6 * drive_number
7 * = ((HWIF(drive)->channel ? 2 : 0) + (drive->select.b.unit & 0x01));
8 * = ((hwif->channel ? 2 : 0) + (drive->select.b.unit & 0x01));
9 */
10
11 #include <linux/types.h>
12 #include <linux/kernel.h>
13 #include <linux/delay.h>
14 #include <linux/timer.h>
15 #include <linux/mm.h>
16 #include <linux/ioport.h>
17 #include <linux/blkdev.h>
18 #include <linux/hdreg.h>
19
20 #include <linux/interrupt.h>
21 #include <linux/pci.h>
22 #include <linux/init.h>
23 #include <linux/ide.h>
24
25 #include <asm/io.h>
26 #include <asm/irq.h>
27
28 #include "ide_modes.h"
29
30 static struct pci_dev *host_dev;
31
32 #define SIS5513_DEBUG_DRIVE_INFO 0
33
34 extern char *ide_xfer_verbose (byte xfer_rate);
35
36 /*
37 * ((id->word93 & 0x2000) && (HWIF(drive)->udma_four))
38 */
39 static int config_chipset_for_dma (ide_drive_t *drive, byte ultra)
40 {
41 struct hd_driveid *id = drive->id;
42 ide_hwif_t *hwif = HWIF(drive);
43 struct pci_dev *dev = hwif->pci_dev;
44
45 byte drive_pci, test1, test2, mask;
46 int err;
47
48 byte speed = 0x00;
49 byte unmask = 0xE0;
50 byte four_two = 0x00;
51 int drive_number = ((hwif->channel ? 2 : 0) + (drive->select.b.unit & 0x01));
52 byte udma_66 = ((id->word93 & 0x2000) && (hwif->udma_four)) ? 1 : 0;
53
54 if (host_dev) {
55 switch(host_dev->device) {
56 case PCI_DEVICE_ID_SI_530:
57 case PCI_DEVICE_ID_SI_620:
58 unmask = 0xF0;
59 four_two = 0x01;
60 default:
61 break;
62 }
63 }
64
65 switch(drive_number) {
66 case 0: drive_pci = 0x40;break;
67 case 1: drive_pci = 0x42;break;
68 case 2: drive_pci = 0x44;break;
69 case 3: drive_pci = 0x46;break;
70 default: return ide_dma_off;
71 }
72
73 pci_read_config_byte(dev, drive_pci, &test1);
74 pci_read_config_byte(dev, drive_pci|0x01, &test2);
75
76 if ((!ultra) && (test2 & 0x80)) {
77 pci_write_config_byte(dev, drive_pci|0x01, test2 & ~0x80);
78 pci_read_config_byte(dev, drive_pci|0x01, &test2);
79 }
80
81 if ((id->dma_ultra & 0x0010) && (ultra) && (udma_66) && (four_two)) {
82 if (!((id->dma_ultra >> 8) & 16)) {
83 drive->id->dma_ultra &= ~0xFF00;
84 drive->id->dma_ultra |= 0x1010;
85 drive->id->dma_mword &= ~0x0F00;
86 drive->id->dma_1word &= ~0x0F00;
87 }
88 if (!(test2 & 0x90)) {
89 pci_write_config_byte(dev, drive_pci|0x01, test2 & ~unmask);
90 pci_write_config_byte(dev, drive_pci|0x01, test2|0x90);
91 }
92 speed = XFER_UDMA_4;
93 } else if ((id->dma_ultra & 0x0008) && (ultra) && (udma_66) && (four_two)) {
94 if (!((id->dma_ultra >> 8) & 8)) {
95 drive->id->dma_ultra &= ~0xFF00;
96 drive->id->dma_ultra |= 0x0808;
97 drive->id->dma_mword &= ~0x0F00;
98 drive->id->dma_1word &= ~0x0F00;
99 }
100 if (!(test2 & 0xA0)) {
101 pci_write_config_byte(dev, drive_pci|0x01, test2 & ~unmask);
102 pci_write_config_byte(dev, drive_pci|0x01, test2|0xA0);
103 }
104 speed = XFER_UDMA_3;
105 } else if ((id->dma_ultra & 0x0004) && (ultra)) {
106 if (!((id->dma_ultra >> 8) & 4)) {
107 drive->id->dma_ultra &= ~0xFF00;
108 drive->id->dma_ultra |= 0x0404;
109 drive->id->dma_mword &= ~0x0F00;
110 drive->id->dma_1word &= ~0x0F00;
111 }
112 mask = (four_two) ? 0xB0 : 0xA0;
113 if (!(test2 & mask)) {
114 pci_write_config_byte(dev, drive_pci|0x01, test2 & ~unmask);
115 pci_write_config_byte(dev, drive_pci|0x01, test2|mask);
116 }
117 speed = XFER_UDMA_2;
118 } else if ((id->dma_ultra & 0x0002) && (ultra)) {
119 if (!((id->dma_ultra >> 8) & 2)) {
120 drive->id->dma_ultra &= ~0xFF00;
121 drive->id->dma_ultra |= 0x0202;
122 drive->id->dma_mword &= ~0x0F00;
123 drive->id->dma_1word &= ~0x0F00;
124 }
125 mask = (four_two) ? 0xD0 : 0xC0;
126 if (!(test2 & mask)) {
127 pci_write_config_byte(dev, drive_pci|0x01, test2 & ~unmask);
128 pci_write_config_byte(dev, drive_pci|0x01, test2|mask);
129 }
130 speed = XFER_UDMA_1;
131 } else if ((id->dma_ultra & 0x0001) && (ultra)) {
132 if (!((id->dma_ultra >> 8) & 1)) {
133 drive->id->dma_ultra &= ~0xFF00;
134 drive->id->dma_ultra |= 0x0101;
135 drive->id->dma_mword &= ~0x0F00;
136 drive->id->dma_1word &= ~0x0F00;
137 }
138 if (!(test2 & unmask)) {
139 pci_write_config_byte(dev, drive_pci|0x01, test2 & ~unmask);
140 pci_write_config_byte(dev, drive_pci|0x01, test2|unmask);
141 }
142 speed = XFER_UDMA_0;
143 } else if (id->dma_mword & 0x0004) {
144 if (!((id->dma_mword >> 8) & 4)) {
145 drive->id->dma_mword &= ~0x0F00;
146 drive->id->dma_mword |= 0x0404;
147 drive->id->dma_1word &= ~0x0F00;
148 }
149 speed = XFER_MW_DMA_2;
150 } else if (id->dma_mword & 0x0002) {
151 if (!((id->dma_mword >> 8) & 2)) {
152 drive->id->dma_mword &= ~0x0F00;
153 drive->id->dma_mword |= 0x0202;
154 drive->id->dma_1word &= ~0x0F00;
155 }
156 speed = XFER_MW_DMA_1;
157 } else if (id->dma_mword & 0x0001) {
158 if (!((id->dma_mword >> 8) & 1)) {
159 drive->id->dma_mword &= ~0x0F00;
160 drive->id->dma_mword |= 0x0101;
161 drive->id->dma_1word &= ~0x0F00;
162 }
163 speed = XFER_MW_DMA_0;
164 } else if (id->dma_1word & 0x0004) {
165 if (!((id->dma_1word >> 8) & 4)) {
166 drive->id->dma_1word &= ~0x0F00;
167 drive->id->dma_1word |= 0x0404;
168 drive->id->dma_mword &= ~0x0F00;
169 }
170 speed = XFER_SW_DMA_2;
171 } else if (id->dma_1word & 0x0002) {
172 if (!((id->dma_1word >> 8) & 2)) {
173 drive->id->dma_1word &= ~0x0F00;
174 drive->id->dma_1word |= 0x0202;
175 drive->id->dma_mword &= ~0x0F00;
176 }
177 speed = XFER_SW_DMA_1;
178 } else if (id->dma_1word & 0x0001) {
179 if (!((id->dma_1word >> 8) & 1)) {
180 drive->id->dma_1word &= ~0x0F00;
181 drive->id->dma_1word |= 0x0101;
182 drive->id->dma_mword &= ~0x0F00;
183 }
184 speed = XFER_SW_DMA_0;
185 } else {
186 return ((int) ide_dma_off_quietly);
187 }
188
189 err = ide_config_drive_speed(drive, speed);
190
191 #if SIS5513_DEBUG_DRIVE_INFO
192 printk("%s: %s drive%d\n",
193 drive->name,
194 ide_xfer_verbose(speed),
195 drive_number);
196 #endif /* SIS5513_DEBUG_DRIVE_INFO */
197
198 return ((int) ((id->dma_ultra >> 11) & 3) ? ide_dma_on :
199 ((id->dma_ultra >> 8) & 7) ? ide_dma_on :
200 ((id->dma_mword >> 8) & 7) ? ide_dma_on :
201 ((id->dma_1word >> 8) & 7) ? ide_dma_on :
202 ide_dma_off_quietly);
203 }
204
205 static void config_drive_art_rwp (ide_drive_t *drive)
206 {
207 ide_hwif_t *hwif = HWIF(drive);
208 struct pci_dev *dev = hwif->pci_dev;
209
210 byte timing, pio, drive_pci, test1, test2;
211
212 unsigned short eide_pio_timing[6] = {600, 390, 240, 180, 120, 90};
213 unsigned short xfer_pio = drive->id->eide_pio_modes;
214 int drive_number = ((hwif->channel ? 2 : 0) + (drive->select.b.unit & 0x01));
215
216 if (drive->media == ide_disk) {
217 struct pci_dev *dev = hwif->pci_dev;
218 byte reg4bh = 0;
219 byte rw_prefetch = (0x11 << drive_number);
220
221 pci_read_config_byte(dev, 0x4b, &reg4bh);
222 if ((reg4bh & rw_prefetch) != rw_prefetch)
223 pci_write_config_byte(dev, 0x4b, reg4bh|rw_prefetch);
224 }
225
226 pio = ide_get_best_pio_mode(drive, 255, 5, NULL);
227
228 if (xfer_pio> 4)
229 xfer_pio = 0;
230
231 if (drive->id->eide_pio_iordy > 0) {
232 for (xfer_pio = 5;
233 xfer_pio>0 &&
234 drive->id->eide_pio_iordy>eide_pio_timing[xfer_pio];
235 xfer_pio--);
236 } else {
237 xfer_pio = (drive->id->eide_pio_modes & 4) ? 0x05 :
238 (drive->id->eide_pio_modes & 2) ? 0x04 :
239 (drive->id->eide_pio_modes & 1) ? 0x03 : xfer_pio;
240 }
241
242 timing = (xfer_pio >= pio) ? xfer_pio : pio;
243
244 /*
245 * Mode 0 Mode 1 Mode 2 Mode 3 Mode 4
246 * Active time 8T (240ns) 6T (180ns) 4T (120ns) 3T (90ns) 3T (90ns)
247 * 0x41 2:0 bits 000 110 100 011 011
248 * Recovery time 12T (360ns) 7T (210ns) 4T (120ns) 3T (90ns) 1T (30ns)
249 * 0x40 3:0 bits 0000 0111 0100 0011 0001
250 * Cycle time 20T (600ns) 13T (390ns) 8T (240ns) 6T (180ns) 4T (120ns)
251 */
252
253 switch(drive_number) {
254 case 0: drive_pci = 0x40;break;
255 case 1: drive_pci = 0x42;break;
256 case 2: drive_pci = 0x44;break;
257 case 3: drive_pci = 0x46;break;
258 default: return;
259 }
260
261 pci_read_config_byte(dev, drive_pci, &test1);
262 pci_read_config_byte(dev, drive_pci|0x01, &test2);
263
264 /*
265 * Do a blanket clear of active and recovery timings.
266 */
267
268 test1 &= ~0x07;
269 test2 &= ~0x0F;
270
271 switch(timing) {
272 case 4: test1 |= 0x01;test2 |= 0x03;break;
273 case 3: test1 |= 0x03;test2 |= 0x03;break;
274 case 2: test1 |= 0x04;test2 |= 0x04;break;
275 case 1: test1 |= 0x07;test2 |= 0x06;break;
276 default: break;
277 }
278
279 pci_write_config_byte(dev, drive_pci, test1);
280 pci_write_config_byte(dev, drive_pci|0x01, test2);
281 }
282
283 static int config_drive_xfer_rate (ide_drive_t *drive)
284 {
285 struct hd_driveid *id = drive->id;
286 ide_dma_action_t dma_func = ide_dma_off_quietly;
287
288 if (id && (id->capability & 1) && HWIF(drive)->autodma) {
289 /* Consult the list of known "bad" drives */
290 if (ide_dmaproc(ide_dma_bad_drive, drive)) {
291 return HWIF(drive)->dmaproc(ide_dma_off, drive);
292 }
293
294 if (id->field_valid & 4) {
295 if (id->dma_ultra & 0x001F) {
296 /* Force if Capable UltraDMA */
297 dma_func = config_chipset_for_dma(drive, 1);
298 if ((id->field_valid & 2) &&
299 (dma_func != ide_dma_on))
300 goto try_dma_modes;
301 }
302 } else if (id->field_valid & 2) {
303 try_dma_modes:
304 if ((id->dma_mword & 0x0007) ||
305 (id->dma_1word & 0x0007)) {
306 /* Force if Capable regular DMA modes */
307 dma_func = config_chipset_for_dma(drive, 0);
308 }
309 } else if ((ide_dmaproc(ide_dma_good_drive, drive)) &&
310 (id->eide_dma_time > 150)) {
311 /* Consult the list of known "good" drives */
312 dma_func = config_chipset_for_dma(drive, 0);
313 }
314 }
315 return HWIF(drive)->dmaproc(dma_func, drive);
316 }
317
318 /*
319 * sis5513_dmaproc() initiates/aborts (U)DMA read/write operations on a drive.
320 */
321 int sis5513_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
322 {
323 switch (func) {
324 case ide_dma_check:
325 config_drive_art_rwp(drive);
326 return config_drive_xfer_rate(drive);
327 default:
328 break;
329 }
330 return ide_dmaproc(func, drive); /* use standard DMA stuff */
331 }
332
333 unsigned int __init pci_init_sis5513 (struct pci_dev *dev, const char *name)
334 {
335 struct pci_dev *host;
336 byte latency = 0, reg48h = 0;
337
338 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &latency);
339 pci_read_config_byte(dev, 0x48, &reg48h);
340
341 for (host = pci_devices; host; host=host->next) {
342 if (host->vendor == PCI_VENDOR_ID_SI &&
343 host->device == PCI_DEVICE_ID_SI_620) {
344 if (latency != 0x10)
345 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x10);
346 host_dev = host;
347 printk("%s: Chipset Core ATA-66, SiS620\n", name);
348 printk("%s: Primary ATA-%s, Secondary ATA-%s Cable Detect\n",
349 name,
350 (reg48h & 0x10) ? "33" : "66",
351 (reg48h & 0x20) ? "33" : "66");
352 break;
353 } else if (host->vendor == PCI_VENDOR_ID_SI &&
354 host->device == PCI_DEVICE_ID_SI_530) {
355 host_dev = host;
356 printk("%s: Chipset Core ATA-66, SiS530\n", name);
357 printk("%s: Primary ATA-%s, Secondary ATA-%s Cable Detect\n",
358 name,
359 (reg48h & 0x10) ? "33" : "66",
360 (reg48h & 0x20) ? "33" : "66");
361 break;
362 } else if (host->vendor == PCI_VENDOR_ID_SI &&
363 host->device == PCI_DEVICE_ID_SI_5600) {
364 host_dev = host;
365 printk("SIS5600:%s Chipset Core ATA-33\n", name);
366 break;
367 } else if (host->vendor == PCI_VENDOR_ID_SI &&
368 host->device == PCI_DEVICE_ID_SI_5597) {
369 host_dev = host;
370 printk("SIS5597:%s Chipset Core ATA-33\n", name);
371 break;
372 }
373 }
374
375 if (host_dev) {
376 byte reg52h = 0;
377
378 pci_read_config_byte(dev, 0x52, &reg52h);
379 if (!(reg52h & 0x04))
380 pci_write_config_byte(dev, 0x52, reg52h|0x04);
381 }
382
383 return 0;
384 }
385
386 void __init ide_init_sis5513 (ide_hwif_t *hwif)
387 {
388 byte reg48h = 0;
389 byte mask = hwif->channel ? 0x20 : 0x10;
390
391 pci_read_config_byte(hwif->pci_dev, 0x48, &reg48h);
392 hwif->irq = hwif->channel ? 15 : 14;
393
394 if (!(hwif->dma_base))
395 return;
396
397 if (host_dev) {
398 switch(host_dev->device) {
399 case PCI_DEVICE_ID_SI_530:
400 case PCI_DEVICE_ID_SI_620:
401 hwif->autodma = 1;
402 hwif->udma_four = (reg48h & mask) ? 0 : 1;
403 hwif->dmaproc = &sis5513_dmaproc;
404 return;
405 case PCI_DEVICE_ID_SI_5600:
406 case PCI_DEVICE_ID_SI_5597:
407 hwif->autodma = 1;
408 hwif->udma_four = 0;
409 hwif->dmaproc = &sis5513_dmaproc;
410 return;
411 default:
412 hwif->autodma = 0;
413 hwif->udma_four = 0;
414 return;
415 }
416 }
417 }