* better
[mascara-docs.git] / i386 / linux-2.3.21 / drivers / net / pcnet32.c
blob570fbbc0df1475ca068fb4151f7742f8a5ca956f
1 /* pcnet32.c: An AMD PCnet32 ethernet driver for linux. */
2 /*
3 * Copyright 1996-1999 Thomas Bogendoerfer
4 *
5 * Derived from the lance driver written 1993,1994,1995 by Donald Becker.
6 *
7 * Copyright 1993 United States Government as represented by the
8 * Director, National Security Agency.
9 *
10 * This software may be used and distributed according to the terms
11 * of the GNU Public License, incorporated herein by reference.
13 * This driver is for PCnet32 and PCnetPCI based ethercards
16 static const char *version = "pcnet32.c:v1.23ac 21.9.1999 tsbogend@alpha.franken.de\n";
18 #include <linux/config.h>
19 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/sched.h>
23 #include <linux/string.h>
24 #include <linux/ptrace.h>
25 #include <linux/errno.h>
26 #include <linux/ioport.h>
27 #include <linux/malloc.h>
28 #include <linux/interrupt.h>
29 #include <linux/pci.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <asm/bitops.h>
33 #include <asm/io.h>
34 #include <asm/dma.h>
36 #include <linux/netdevice.h>
37 #include <linux/etherdevice.h>
38 #include <linux/skbuff.h>
39 #include <linux/spinlock.h>
41 static unsigned int pcnet32_portlist[] __initdata = {0x300, 0x320, 0x340, 0x360, 0};
43 static int pcnet32_debug = 1;
45 #ifdef MODULE
46 static struct net_device *pcnet32_dev = NULL;
47 #endif
49 static const int max_interrupt_work = 20;
50 static const int rx_copybreak = 200;
52 #define PORT_AUI 0x00
53 #define PORT_10BT 0x01
54 #define PORT_GPSI 0x02
55 #define PORT_MII 0x03
57 #define PORT_PORTSEL 0x03
58 #define PORT_ASEL 0x04
59 #define PORT_100 0x40
60 #define PORT_FD 0x80
64 * table to translate option values from tulip
65 * to internal options
67 static unsigned char options_mapping[] = {
68 PORT_ASEL, /* 0 Auto-select */
69 PORT_AUI, /* 1 BNC/AUI */
70 PORT_AUI, /* 2 AUI/BNC */
71 PORT_ASEL, /* 3 not supported */
72 PORT_10BT | PORT_FD, /* 4 10baseT-FD */
73 PORT_ASEL, /* 5 not supported */
74 PORT_ASEL, /* 6 not supported */
75 PORT_ASEL, /* 7 not supported */
76 PORT_ASEL, /* 8 not supported */
77 PORT_MII, /* 9 MII 10baseT */
78 PORT_MII | PORT_FD, /* 10 MII 10baseT-FD */
79 PORT_MII, /* 11 MII (autosel) */
80 PORT_10BT, /* 12 10BaseT */
81 PORT_MII | PORT_100, /* 13 MII 100BaseTx */
82 PORT_MII | PORT_100 | PORT_FD, /* 14 MII 100BaseTx-FD */
83 PORT_ASEL /* 15 not supported */
86 #define MAX_UNITS 8
87 static int options[MAX_UNITS] = {0, };
88 static int full_duplex[MAX_UNITS] = {0, };
91 * Theory of Operation
93 * This driver uses the same software structure as the normal lance
94 * driver. So look for a verbose description in lance.c. The differences
95 * to the normal lance driver is the use of the 32bit mode of PCnet32
96 * and PCnetPCI chips. Because these chips are 32bit chips, there is no
97 * 16MB limitation and we don't need bounce buffers.
101 * History:
102 * v0.01: Initial version
103 * only tested on Alpha Noname Board
104 * v0.02: changed IRQ handling for new interrupt scheme (dev_id)
105 * tested on a ASUS SP3G
106 * v0.10: fixed an odd problem with the 79C974 in a Compaq Deskpro XL
107 * looks like the 974 doesn't like stopping and restarting in a
108 * short period of time; now we do a reinit of the lance; the
109 * bug was triggered by doing ifconfig eth0 <ip> broadcast <addr>
110 * and hangs the machine (thanks to Klaus Liedl for debugging)
111 * v0.12: by suggestion from Donald Becker: Renamed driver to pcnet32,
112 * made it standalone (no need for lance.c)
113 * v0.13: added additional PCI detecting for special PCI devices (Compaq)
114 * v0.14: stripped down additional PCI probe (thanks to David C Niemi
115 * and sveneric@xs4all.nl for testing this on their Compaq boxes)
116 * v0.15: added 79C965 (VLB) probe
117 * added interrupt sharing for PCI chips
118 * v0.16: fixed set_multicast_list on Alpha machines
119 * v0.17: removed hack from dev.c; now pcnet32 uses ethif_probe in Space.c
120 * v0.19: changed setting of autoselect bit
121 * v0.20: removed additional Compaq PCI probe; there is now a working one
122 * in arch/i386/bios32.c
123 * v0.21: added endian conversion for ppc, from work by cort@cs.nmt.edu
124 * v0.22: added printing of status to ring dump
125 * v0.23: changed enet_statistics to net_devive_stats
126 * v0.90: added multicast filter
127 * added module support
128 * changed irq probe to new style
129 * added PCnetFast chip id
130 * added fix for receive stalls with Intel saturn chipsets
131 * added in-place rx skbs like in the tulip driver
132 * minor cleanups
133 * v0.91: added PCnetFast+ chip id
134 * back port to 2.0.x
135 * v1.00: added some stuff from Donald Becker's 2.0.34 version
136 * added support for byte counters in net_dev_stats
137 * v1.01: do ring dumps, only when debugging the driver
138 * increased the transmit timeout
139 * v1.02: fixed memory leak in pcnet32_init_ring()
140 * v1.10: workaround for stopped transmitter
141 * added port selection for modules
142 * detect special T1/E1 WAN card and setup port selection
143 * v1.11: fixed wrong checking of Tx errors
144 * v1.20: added check of return value kmalloc (cpeterso@cs.washington.edu)
145 * added save original kmalloc addr for freeing (mcr@solidum.com)
146 * added support for PCnetHome chip (joe@MIT.EDU)
147 * rewritten PCI card detection
148 * added dwio mode to get driver working on some PPC machines
149 * v1.21: added mii selection and mii ioctl
150 * v1.22: changed pci scanning code to make PPC people happy
151 * fixed switching to 32bit mode in pcnet32_open() (thanks
152 * to Michael Richard <mcr@solidum.com> for noticing this one)
153 * added sub vendor/device id matching (thanks again to
154 * Michael Richard <mcr@solidum.com>)
155 * added chip id for 79c973/975 (thanks to Zach Brown <zab@zabbo.net>)
156 * v1.23 fixed small bug, when manual selecting MII speed/duplex
157 * v1.23ac Added SMP spinlocking - Alan Cox <alan@redhat.com>
162 * Set the number of Tx and Rx buffers, using Log_2(# buffers).
163 * Reasonable default values are 4 Tx buffers, and 16 Rx buffers.
164 * That translates to 2 (4 == 2^^2) and 4 (16 == 2^^4).
166 #ifndef PCNET32_LOG_TX_BUFFERS
167 #define PCNET32_LOG_TX_BUFFERS 4
168 #define PCNET32_LOG_RX_BUFFERS 4
169 #endif
171 #define TX_RING_SIZE (1 << (PCNET32_LOG_TX_BUFFERS))
172 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
173 #define TX_RING_LEN_BITS ((PCNET32_LOG_TX_BUFFERS) << 12)
175 #define RX_RING_SIZE (1 << (PCNET32_LOG_RX_BUFFERS))
176 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
177 #define RX_RING_LEN_BITS ((PCNET32_LOG_RX_BUFFERS) << 4)
179 #define PKT_BUF_SZ 1544
181 /* Offsets from base I/O address. */
182 #define PCNET32_WIO_RDP 0x10
183 #define PCNET32_WIO_RAP 0x12
184 #define PCNET32_WIO_RESET 0x14
185 #define PCNET32_WIO_BDP 0x16
187 #define PCNET32_DWIO_RDP 0x10
188 #define PCNET32_DWIO_RAP 0x14
189 #define PCNET32_DWIO_RESET 0x18
190 #define PCNET32_DWIO_BDP 0x1C
192 #define PCNET32_TOTAL_SIZE 0x20
194 /* some PCI ids */
195 #ifndef PCI_DEVICE_ID_AMD_LANCE
196 #define PCI_VENDOR_ID_AMD 0x1022
197 #define PCI_DEVICE_ID_AMD_LANCE 0x2000
198 #endif
199 #ifndef PCI_DEVICE_ID_AMD_PCNETHOME
200 #define PCI_DEVICE_ID_AMD_PCNETHOME 0x2001
201 #endif
204 #define CRC_POLYNOMIAL_LE 0xedb88320UL /* Ethernet CRC, little endian */
206 /* The PCNET32 Rx and Tx ring descriptors. */
207 struct pcnet32_rx_head {
208 u32 base;
209 s16 buf_length;
210 s16 status;
211 u32 msg_length;
212 u32 reserved;
215 struct pcnet32_tx_head {
216 u32 base;
217 s16 length;
218 s16 status;
219 u32 misc;
220 u32 reserved;
223 /* The PCNET32 32-Bit initialization block, described in databook. */
224 struct pcnet32_init_block {
225 u16 mode;
226 u16 tlen_rlen;
227 u8 phys_addr[6];
228 u16 reserved;
229 u32 filter[2];
230 /* Receive and transmit ring base, along with extra bits. */
231 u32 rx_ring;
232 u32 tx_ring;
235 /* PCnet32 access functions */
236 struct pcnet32_access {
237 u16 (*read_csr)(unsigned long, int);
238 void (*write_csr)(unsigned long, int, u16);
239 u16 (*read_bcr)(unsigned long, int);
240 void (*write_bcr)(unsigned long, int, u16);
241 u16 (*read_rap)(unsigned long);
242 void (*write_rap)(unsigned long, u16);
243 void (*reset)(unsigned long);
246 struct pcnet32_private {
247 /* The Tx and Rx ring entries must be aligned on 16-byte boundaries in 32bit mode. */
248 struct pcnet32_rx_head rx_ring[RX_RING_SIZE];
249 struct pcnet32_tx_head tx_ring[TX_RING_SIZE];
250 struct pcnet32_init_block init_block;
251 const char *name;
252 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
253 struct sk_buff *tx_skbuff[TX_RING_SIZE];
254 struct sk_buff *rx_skbuff[RX_RING_SIZE];
255 struct pcnet32_access a;
256 void *origmem;
257 spinlock_t lock; /* Guard lock */
258 int cur_rx, cur_tx; /* The next free ring entry */
259 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
260 struct net_device_stats stats;
261 char tx_full;
262 int options;
263 int shared_irq:1, /* shared irq possible */
264 full_duplex:1, /* full duplex possible */
265 mii:1; /* mii port available */
266 #ifdef MODULE
267 struct net_device *next;
268 #endif
271 int pcnet32_probe(struct net_device *);
272 static int pcnet32_probe1(struct net_device *, unsigned long, unsigned char, int, int);
273 static int pcnet32_open(struct net_device *);
274 static int pcnet32_init_ring(struct net_device *);
275 static int pcnet32_start_xmit(struct sk_buff *, struct net_device *);
276 static int pcnet32_rx(struct net_device *);
277 static void pcnet32_interrupt(int, void *, struct pt_regs *);
278 static int pcnet32_close(struct net_device *);
279 static struct net_device_stats *pcnet32_get_stats(struct net_device *);
280 static void pcnet32_set_multicast_list(struct net_device *);
281 #ifdef HAVE_PRIVATE_IOCTL
282 static int pcnet32_mii_ioctl(struct net_device *, struct ifreq *, int);
283 #endif
285 enum pci_flags_bit {
286 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
287 PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
290 struct pcnet32_pci_id_info {
291 const char *name;
292 u16 vendor_id, device_id, svid, sdid, flags;
293 int io_size;
294 int (*probe1) (struct net_device *, unsigned long, unsigned char, int, int);
297 static struct pcnet32_pci_id_info pcnet32_tbl[] = {
298 { "AMD PCnetPCI series",
299 PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE, 0, 0,
300 PCI_USES_IO|PCI_USES_MASTER, PCNET32_TOTAL_SIZE,
301 pcnet32_probe1},
302 { "AMD PCnetHome series",
303 PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_PCNETHOME, 0, 0,
304 PCI_USES_IO|PCI_USES_MASTER, PCNET32_TOTAL_SIZE,
305 pcnet32_probe1},
306 {0,}
309 static u16 pcnet32_wio_read_csr (unsigned long addr, int index)
311 outw (index, addr+PCNET32_WIO_RAP);
312 return inw (addr+PCNET32_WIO_RDP);
315 static void pcnet32_wio_write_csr (unsigned long addr, int index, u16 val)
317 outw (index, addr+PCNET32_WIO_RAP);
318 outw (val, addr+PCNET32_WIO_RDP);
321 static u16 pcnet32_wio_read_bcr (unsigned long addr, int index)
323 outw (index, addr+PCNET32_WIO_RAP);
324 return inw (addr+PCNET32_WIO_BDP);
327 static void pcnet32_wio_write_bcr (unsigned long addr, int index, u16 val)
329 outw (index, addr+PCNET32_WIO_RAP);
330 outw (val, addr+PCNET32_WIO_BDP);
333 static u16 pcnet32_wio_read_rap (unsigned long addr)
335 return inw (addr+PCNET32_WIO_RAP);
338 static void pcnet32_wio_write_rap (unsigned long addr, u16 val)
340 outw (val, addr+PCNET32_WIO_RAP);
343 static void pcnet32_wio_reset (unsigned long addr)
345 inw (addr+PCNET32_WIO_RESET);
348 static int pcnet32_wio_check (unsigned long addr)
350 outw (88, addr+PCNET32_WIO_RAP);
351 return (inw (addr+PCNET32_WIO_RAP) == 88);
354 static struct pcnet32_access pcnet32_wio = {
355 pcnet32_wio_read_csr,
356 pcnet32_wio_write_csr,
357 pcnet32_wio_read_bcr,
358 pcnet32_wio_write_bcr,
359 pcnet32_wio_read_rap,
360 pcnet32_wio_write_rap,
361 pcnet32_wio_reset
364 static u16 pcnet32_dwio_read_csr (unsigned long addr, int index)
366 outl (index, addr+PCNET32_DWIO_RAP);
367 return (inl (addr+PCNET32_DWIO_RDP) & 0xffff);
370 static void pcnet32_dwio_write_csr (unsigned long addr, int index, u16 val)
372 outl (index, addr+PCNET32_DWIO_RAP);
373 outl (val, addr+PCNET32_DWIO_RDP);
376 static u16 pcnet32_dwio_read_bcr (unsigned long addr, int index)
378 outl (index, addr+PCNET32_DWIO_RAP);
379 return (inl (addr+PCNET32_DWIO_BDP) & 0xffff);
382 static void pcnet32_dwio_write_bcr (unsigned long addr, int index, u16 val)
384 outl (index, addr+PCNET32_DWIO_RAP);
385 outl (val, addr+PCNET32_DWIO_BDP);
388 static u16 pcnet32_dwio_read_rap (unsigned long addr)
390 return (inl (addr+PCNET32_DWIO_RAP) & 0xffff);
393 static void pcnet32_dwio_write_rap (unsigned long addr, u16 val)
395 outl (val, addr+PCNET32_DWIO_RAP);
398 static void pcnet32_dwio_reset (unsigned long addr)
400 inl (addr+PCNET32_DWIO_RESET);
403 static int pcnet32_dwio_check (unsigned long addr)
405 outl (88, addr+PCNET32_DWIO_RAP);
406 return (inl (addr+PCNET32_DWIO_RAP) == 88);
409 static struct pcnet32_access pcnet32_dwio = {
410 pcnet32_dwio_read_csr,
411 pcnet32_dwio_write_csr,
412 pcnet32_dwio_read_bcr,
413 pcnet32_dwio_write_bcr,
414 pcnet32_dwio_read_rap,
415 pcnet32_dwio_write_rap,
416 pcnet32_dwio_reset
422 int __init pcnet32_probe (struct net_device *dev)
424 unsigned long ioaddr = dev ? dev->base_addr: 0;
425 unsigned int irq_line = dev ? dev->irq : 0;
426 int *port;
427 int cards_found = 0;
430 #ifndef __powerpc__
431 if (ioaddr > 0x1ff) {
432 if (check_region(ioaddr, PCNET32_TOTAL_SIZE) == 0)
433 return pcnet32_probe1(dev, ioaddr, irq_line, 0, 0);
434 else
435 return ENODEV;
436 } else
437 #endif
438 if(ioaddr != 0)
439 return ENXIO;
441 #if defined(CONFIG_PCI)
442 if (pci_present()) {
443 struct pci_dev *pdev = NULL;
445 printk("pcnet32.c: PCI bios is present, checking for devices...\n");
446 while ((pdev = pci_find_class (PCI_CLASS_NETWORK_ETHERNET<<8, pdev))) {
447 u16 pci_command;
448 int chip_idx;
449 u16 sdid,svid;
451 pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &sdid);
452 pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &svid);
453 for (chip_idx = 0; pcnet32_tbl[chip_idx].vendor_id; chip_idx++)
454 if ((pdev->vendor == pcnet32_tbl[chip_idx].vendor_id) &&
455 (pdev->device == pcnet32_tbl[chip_idx].device_id) &&
456 (pcnet32_tbl[chip_idx].svid == 0 ||
457 (svid == pcnet32_tbl[chip_idx].svid)) &&
458 (pcnet32_tbl[chip_idx].sdid == 0 ||
459 (sdid == pcnet32_tbl[chip_idx].sdid)))
460 break;
461 if (pcnet32_tbl[chip_idx].vendor_id == 0)
462 continue;
464 ioaddr = pdev->resource[0].start;
465 irq_line = pdev->irq;
467 /* Avoid already found cards from previous pcnet32_probe() calls */
468 if ((pcnet32_tbl[chip_idx].flags & PCI_USES_IO) &&
469 check_region(ioaddr, pcnet32_tbl[chip_idx].io_size))
470 continue;
472 /* PCI Spec 2.1 states that it is either the driver or PCI card's
473 * responsibility to set the PCI Master Enable Bit if needed.
474 * (From Mark Stockton <marks@schooner.sys.hou.compaq.com>)
476 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
477 if ( ! (pci_command & PCI_COMMAND_MASTER)) {
478 printk("PCI Master Bit has not been set. Setting...\n");
479 pci_command |= PCI_COMMAND_MASTER|PCI_COMMAND_IO;
480 pci_write_config_word(pdev, PCI_COMMAND, pci_command);
482 printk("Found PCnet/PCI at %#lx, irq %d.\n", ioaddr, irq_line);
484 if (pcnet32_tbl[chip_idx].probe1(dev, ioaddr, irq_line, 1, cards_found) == 0) {
485 cards_found++;
486 dev = NULL;
489 } else
490 #endif /* defined(CONFIG_PCI) */
492 /* now look for PCnet32 VLB cards */
493 for (port = pcnet32_portlist; *port; port++) {
494 unsigned long ioaddr = *port;
496 if ( check_region(ioaddr, PCNET32_TOTAL_SIZE) == 0) {
497 /* check if there is really a pcnet chip on that ioaddr */
498 if ((inb(ioaddr + 14) == 0x57) &&
499 (inb(ioaddr + 15) == 0x57) &&
500 (pcnet32_probe1(dev, ioaddr, 0, 0, 0) == 0))
501 cards_found++;
504 return cards_found ? 0: ENODEV;
508 /* pcnet32_probe1 */
509 static int __init
510 pcnet32_probe1(struct net_device *dev, unsigned long ioaddr, unsigned char irq_line, int shared, int card_idx)
512 struct pcnet32_private *lp;
513 int i,media,fdx = 0, mii = 0, fset = 0;
514 int chip_version;
515 char *chipname;
516 char *priv;
517 struct pcnet32_access *a;
519 /* reset the chip */
520 pcnet32_dwio_reset(ioaddr);
521 pcnet32_wio_reset(ioaddr);
523 if (pcnet32_wio_read_csr (ioaddr, 0) == 4 && pcnet32_wio_check (ioaddr)) {
524 a = &pcnet32_wio;
525 } else {
526 if (pcnet32_dwio_read_csr (ioaddr, 0) == 4 && pcnet32_dwio_check(ioaddr)) {
527 a = &pcnet32_dwio;
528 } else
529 return ENODEV;
532 chip_version = a->read_csr (ioaddr, 88) | (a->read_csr (ioaddr,89) << 16);
533 if (pcnet32_debug > 2)
534 printk(" PCnet chip version is %#x.\n", chip_version);
535 if ((chip_version & 0xfff) != 0x003)
536 return ENODEV;
537 chip_version = (chip_version >> 12) & 0xffff;
538 switch (chip_version) {
539 case 0x2420:
540 chipname = "PCnet/PCI 79C970";
541 break;
542 case 0x2430:
543 if (shared)
544 chipname = "PCnet/PCI 79C970"; /* 970 gives the wrong chip id back */
545 else
546 chipname = "PCnet/32 79C965";
547 break;
548 case 0x2621:
549 chipname = "PCnet/PCI II 79C970A";
550 fdx = 1;
551 break;
552 case 0x2623:
553 chipname = "PCnet/FAST 79C971";
554 fdx = 1; mii = 1; fset = 1;
555 break;
556 case 0x2624:
557 chipname = "PCnet/FAST+ 79C972";
558 fdx = 1; mii = 1; fset = 1;
559 break;
560 case 0x2625:
561 chipname = "PCnet/FAST III 79C973";
562 fdx = 1; mii = 1;
563 break;
564 case 0x2626:
565 chipname = "PCnet/Home 79C978";
566 fdx = 1;
568 * This is based on specs published at www.amd.com. This section
569 * assumes that a card with a 79C978 wants to go into 1Mb HomePNA
570 * mode. The 79C978 can also go into standard ethernet, and there
571 * probably should be some sort of module option to select the
572 * mode by which the card should operate
574 /* switch to home wiring mode */
575 media = a->read_bcr (ioaddr, 49);
576 if (pcnet32_debug > 2)
577 printk("pcnet32: pcnet32 media value %#x.\n", media);
578 media &= ~3;
579 media |= 1;
580 if (pcnet32_debug > 2)
581 printk("pcnet32: pcnet32 media reset to %#x.\n", media);
582 a->write_bcr (ioaddr, 49, media);
583 break;
584 case 0x2627:
585 chipname = "PCnet/FAST III 79C975";
586 fdx = 1; mii = 1;
587 default:
588 printk("pcnet32: PCnet version %#x, no PCnet32 chip.\n",chip_version);
589 return ENODEV;
593 * On selected chips turn on the BCR18:NOUFLO bit. This stops transmit
594 * starting until the packet is loaded. Strike one for reliability, lose
595 * one for latency - although on PCI this isnt a big loss. Older chips
596 * have FIFO's smaller than a packet, so you can't do this.
599 if(fset)
601 a->write_bcr(ioaddr, 18, (a->read_bcr(ioaddr, 18) | 0x0800));
602 a->write_csr(ioaddr, 80, a->read_csr(ioaddr, 80) | 0x0c00);
605 dev = init_etherdev(dev, 0);
607 printk(KERN_INFO "%s: %s at %#3lx,", dev->name, chipname, ioaddr);
609 /* There is a 16 byte station address PROM at the base address.
610 The first six bytes are the station address. */
611 for (i = 0; i < 6; i++)
612 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
614 dev->base_addr = ioaddr;
615 request_region(ioaddr, PCNET32_TOTAL_SIZE, chipname);
617 if ((priv = kmalloc(sizeof(*lp)+15,GFP_KERNEL)) == NULL)
618 return ENOMEM;
621 * Make certain the data structures used by
622 * the PCnet32 are 16byte aligned
624 lp = (struct pcnet32_private *)(((unsigned long)priv+15) & ~15);
626 memset(lp, 0, sizeof(*lp));
628 spin_lock_init(&lp->lock);
630 dev->priv = lp;
631 lp->name = chipname;
632 lp->shared_irq = shared;
633 lp->full_duplex = fdx;
634 lp->mii = mii;
635 if (options[card_idx] > sizeof (options_mapping))
636 lp->options = PORT_ASEL;
637 else
638 lp->options = options_mapping[options[card_idx]];
640 if (fdx && !(lp->options & PORT_ASEL) && full_duplex[card_idx])
641 lp->options |= PORT_FD;
643 lp->origmem = priv;
644 lp->a = *a;
646 /* detect special T1/E1 WAN card by checking for MAC address */
647 if (dev->dev_addr[0] == 0x00 && dev->dev_addr[1] == 0xe0 && dev->dev_addr[2] == 0x75)
648 lp->options = PORT_FD | PORT_GPSI;
650 lp->init_block.mode = le16_to_cpu(0x0003); /* Disable Rx and Tx. */
651 lp->init_block.tlen_rlen = le16_to_cpu(TX_RING_LEN_BITS | RX_RING_LEN_BITS);
652 for (i = 0; i < 6; i++)
653 lp->init_block.phys_addr[i] = dev->dev_addr[i];
654 lp->init_block.filter[0] = 0x00000000;
655 lp->init_block.filter[1] = 0x00000000;
656 lp->init_block.rx_ring = (u32)le32_to_cpu(virt_to_bus(lp->rx_ring));
657 lp->init_block.tx_ring = (u32)le32_to_cpu(virt_to_bus(lp->tx_ring));
659 /* switch pcnet32 to 32bit mode */
660 a->write_bcr (ioaddr, 20, 2);
662 a->write_csr (ioaddr, 1, virt_to_bus(&lp->init_block) & 0xffff);
663 a->write_csr (ioaddr, 2, virt_to_bus(&lp->init_block) >> 16);
665 if (irq_line) {
666 dev->irq = irq_line;
669 if (dev->irq >= 2)
670 printk(" assigned IRQ %d.\n", dev->irq);
671 else {
672 unsigned long irq_mask = probe_irq_on();
675 * To auto-IRQ we enable the initialization-done and DMA error
676 * interrupts. For ISA boards we get a DMA error, but VLB and PCI
677 * boards will work.
679 /* Trigger an initialization just for the interrupt. */
680 a->write_csr (ioaddr, 0, 0x41);
681 mdelay (1);
683 dev->irq = probe_irq_off (irq_mask);
684 if (dev->irq)
685 printk(", probed IRQ %d.\n", dev->irq);
686 else {
687 printk(", failed to detect IRQ line.\n");
688 return ENODEV;
692 if (pcnet32_debug > 0)
693 printk(version);
695 /* The PCNET32-specific entries in the device structure. */
696 dev->open = &pcnet32_open;
697 dev->hard_start_xmit = &pcnet32_start_xmit;
698 dev->stop = &pcnet32_close;
699 dev->get_stats = &pcnet32_get_stats;
700 dev->set_multicast_list = &pcnet32_set_multicast_list;
701 #ifdef HAVE_PRIVATE_IOCTL
702 dev->do_ioctl = &pcnet32_mii_ioctl;
703 #endif
706 #ifdef MODULE
707 lp->next = pcnet32_dev;
708 pcnet32_dev = dev;
709 #endif
711 /* Fill in the generic fields of the device structure. */
712 ether_setup(dev);
713 return 0;
717 static int
718 pcnet32_open(struct net_device *dev)
720 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
721 unsigned long ioaddr = dev->base_addr;
722 u16 val;
723 int i;
725 if (dev->irq == 0 ||
726 request_irq(dev->irq, &pcnet32_interrupt,
727 lp->shared_irq ? SA_SHIRQ : 0, lp->name, (void *)dev)) {
728 return -EAGAIN;
731 /* Reset the PCNET32 */
732 lp->a.reset (ioaddr);
734 /* switch pcnet32 to 32bit mode */
735 lp->a.write_bcr (ioaddr, 20, 2);
737 if (pcnet32_debug > 1)
738 printk("%s: pcnet32_open() irq %d tx/rx rings %#x/%#x init %#x.\n",
739 dev->name, dev->irq,
740 (u32) virt_to_bus(lp->tx_ring),
741 (u32) virt_to_bus(lp->rx_ring),
742 (u32) virt_to_bus(&lp->init_block));
744 /* set/reset autoselect bit */
745 val = lp->a.read_bcr (ioaddr, 2) & ~2;
746 if (lp->options & PORT_ASEL)
747 val |= 2;
748 lp->a.write_bcr (ioaddr, 2, val);
750 /* handle full duplex setting */
751 if (lp->full_duplex) {
752 val = lp->a.read_bcr (ioaddr, 9) & ~3;
753 if (lp->options & PORT_FD) {
754 val |= 1;
755 if (lp->options == (PORT_FD | PORT_AUI))
756 val |= 2;
758 lp->a.write_bcr (ioaddr, 9, val);
761 /* set/reset GPSI bit in test register */
762 val = lp->a.read_csr (ioaddr, 124) & ~0x10;
763 if ((lp->options & PORT_PORTSEL) == PORT_GPSI)
764 val |= 0x10;
765 lp->a.write_csr (ioaddr, 124, val);
767 if (lp->mii & !(lp->options & PORT_ASEL)) {
768 val = lp->a.read_bcr (ioaddr, 32) & ~0x38; /* disable Auto Negotiation, set 10Mpbs, HD */
769 if (lp->options & PORT_FD)
770 val |= 0x10;
771 if (lp->options & PORT_100)
772 val |= 0x08;
773 lp->a.write_bcr (ioaddr, 32, val);
776 lp->init_block.mode = le16_to_cpu((lp->options & PORT_PORTSEL) << 7);
777 lp->init_block.filter[0] = 0x00000000;
778 lp->init_block.filter[1] = 0x00000000;
779 if (pcnet32_init_ring(dev))
780 return -ENOMEM;
782 /* Re-initialize the PCNET32, and start it when done. */
783 lp->a.write_csr (ioaddr, 1, virt_to_bus(&lp->init_block) &0xffff);
784 lp->a.write_csr (ioaddr, 2, virt_to_bus(&lp->init_block) >> 16);
786 lp->a.write_csr (ioaddr, 4, 0x0915);
787 lp->a.write_csr (ioaddr, 0, 0x0001);
789 dev->tbusy = 0;
790 dev->interrupt = 0;
791 dev->start = 1;
792 i = 0;
793 while (i++ < 100)
794 if (lp->a.read_csr (ioaddr, 0) & 0x0100)
795 break;
797 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
798 * reports that doing so triggers a bug in the '974.
800 lp->a.write_csr (ioaddr, 0, 0x0042);
802 if (pcnet32_debug > 2)
803 printk("%s: PCNET32 open after %d ticks, init block %#x csr0 %4.4x.\n",
804 dev->name, i, (u32) virt_to_bus(&lp->init_block),
805 lp->a.read_csr (ioaddr, 0));
807 MOD_INC_USE_COUNT;
809 return 0; /* Always succeed */
813 * The LANCE has been halted for one reason or another (busmaster memory
814 * arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
815 * etc.). Modern LANCE variants always reload their ring-buffer
816 * configuration when restarted, so we must reinitialize our ring
817 * context before restarting. As part of this reinitialization,
818 * find all packets still on the Tx ring and pretend that they had been
819 * sent (in effect, drop the packets on the floor) - the higher-level
820 * protocols will time out and retransmit. It'd be better to shuffle
821 * these skbs to a temp list and then actually re-Tx them after
822 * restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
825 static void
826 pcnet32_purge_tx_ring(struct net_device *dev)
828 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
829 int i;
831 for (i = 0; i < TX_RING_SIZE; i++) {
832 if (lp->tx_skbuff[i]) {
833 dev_kfree_skb(lp->tx_skbuff[i]);
834 lp->tx_skbuff[i] = NULL;
840 /* Initialize the PCNET32 Rx and Tx rings. */
841 static int
842 pcnet32_init_ring(struct net_device *dev)
844 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
845 int i;
847 lp->tx_full = 0;
848 lp->cur_rx = lp->cur_tx = 0;
849 lp->dirty_rx = lp->dirty_tx = 0;
851 for (i = 0; i < RX_RING_SIZE; i++) {
852 if (lp->rx_skbuff[i] == NULL) {
853 if (!(lp->rx_skbuff[i] = dev_alloc_skb (PKT_BUF_SZ))) {
854 /* there is not much, we can do at this point */
855 printk ("%s: pcnet32_init_ring dev_alloc_skb failed.\n",dev->name);
856 return -1;
858 skb_reserve (lp->rx_skbuff[i], 2);
860 lp->rx_ring[i].base = (u32)le32_to_cpu(virt_to_bus(lp->rx_skbuff[i]->tail));
861 lp->rx_ring[i].buf_length = le16_to_cpu(-PKT_BUF_SZ);
862 lp->rx_ring[i].status = le16_to_cpu(0x8000);
864 /* The Tx buffer address is filled in as needed, but we do need to clear
865 the upper ownership bit. */
866 for (i = 0; i < TX_RING_SIZE; i++) {
867 lp->tx_ring[i].base = 0;
868 lp->tx_ring[i].status = 0;
871 lp->init_block.tlen_rlen = TX_RING_LEN_BITS | RX_RING_LEN_BITS;
872 for (i = 0; i < 6; i++)
873 lp->init_block.phys_addr[i] = dev->dev_addr[i];
874 lp->init_block.rx_ring = (u32)le32_to_cpu(virt_to_bus(lp->rx_ring));
875 lp->init_block.tx_ring = (u32)le32_to_cpu(virt_to_bus(lp->tx_ring));
876 return 0;
879 static void
880 pcnet32_restart(struct net_device *dev, unsigned int csr0_bits)
882 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
883 unsigned long ioaddr = dev->base_addr;
884 int i;
886 pcnet32_purge_tx_ring(dev);
887 if (pcnet32_init_ring(dev))
888 return;
890 /* ReInit Ring */
891 lp->a.write_csr (ioaddr, 0, 1);
892 i = 0;
893 while (i++ < 100)
894 if (lp->a.read_csr (ioaddr, 0) & 0x0100)
895 break;
897 lp->a.write_csr (ioaddr, 0, csr0_bits);
900 static int
901 pcnet32_start_xmit(struct sk_buff *skb, struct net_device *dev)
903 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
904 unsigned int ioaddr = dev->base_addr;
905 int entry;
906 unsigned long flags;
908 /* Transmitter timeout, serious problems. */
909 if (dev->tbusy) {
910 int tickssofar = jiffies - dev->trans_start;
911 if (tickssofar < HZ/2)
912 return 1;
913 printk("%s: transmit timed out, status %4.4x, resetting.\n",
914 dev->name, lp->a.read_csr (ioaddr, 0));
915 lp->a.write_csr (ioaddr, 0, 0x0004);
916 lp->stats.tx_errors++;
917 if (pcnet32_debug > 2) {
918 int i;
919 printk(" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
920 lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
921 lp->cur_rx);
922 for (i = 0 ; i < RX_RING_SIZE; i++)
923 printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
924 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
925 lp->rx_ring[i].msg_length, (unsigned)lp->rx_ring[i].status);
926 for (i = 0 ; i < TX_RING_SIZE; i++)
927 printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
928 lp->tx_ring[i].base, -lp->tx_ring[i].length,
929 lp->tx_ring[i].misc, (unsigned)lp->tx_ring[i].status);
930 printk("\n");
932 pcnet32_restart(dev, 0x0042);
934 dev->tbusy = 0;
935 dev->trans_start = jiffies;
936 dev_kfree_skb(skb);
937 return 0;
940 if (pcnet32_debug > 3) {
941 printk("%s: pcnet32_start_xmit() called, csr0 %4.4x.\n",
942 dev->name, lp->a.read_csr (ioaddr, 0));
945 /* Block a timer-based transmit from overlapping. This could better be
946 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
947 if (test_and_set_bit(0, (void*)&dev->tbusy) != 0) {
948 printk("%s: Transmitter access conflict.\n", dev->name);
949 return 1;
952 spin_lock_irqsave(&lp->lock, flags);
953 /* Fill in a Tx ring entry */
955 /* Mask to ring buffer boundary. */
956 entry = lp->cur_tx & TX_RING_MOD_MASK;
958 /* Caution: the write order is important here, set the base address
959 with the "ownership" bits last. */
961 lp->tx_ring[entry].length = le16_to_cpu(-skb->len);
963 lp->tx_ring[entry].misc = 0x00000000;
965 lp->tx_skbuff[entry] = skb;
966 lp->tx_ring[entry].base = (u32)le32_to_cpu(virt_to_bus(skb->data));
967 lp->tx_ring[entry].status = le16_to_cpu(0x8300);
969 lp->cur_tx++;
970 lp->stats.tx_bytes += skb->len;
972 /* Trigger an immediate send poll. */
973 lp->a.write_csr (ioaddr, 0, 0x0048);
975 dev->trans_start = jiffies;
977 if (lp->tx_ring[(entry+1) & TX_RING_MOD_MASK].base == 0)
978 clear_bit (0, (void *)&dev->tbusy);
979 else
980 lp->tx_full = 1;
981 spin_unlock_irqrestore(&lp->lock, flags);
982 return 0;
985 /* The PCNET32 interrupt handler. */
986 static void
987 pcnet32_interrupt(int irq, void *dev_id, struct pt_regs * regs)
989 struct net_device *dev = (struct net_device *)dev_id;
990 struct pcnet32_private *lp;
991 unsigned long ioaddr;
992 u16 csr0,rap;
993 int boguscnt = max_interrupt_work;
994 int must_restart;
996 if (dev == NULL) {
997 printk ("pcnet32_interrupt(): irq %d for unknown device.\n", irq);
998 return;
1001 ioaddr = dev->base_addr;
1002 lp = (struct pcnet32_private *)dev->priv;
1004 spin_lock(&lp->lock);
1006 if (dev->interrupt)
1007 printk("%s: Re-entering the interrupt handler.\n", dev->name);
1009 dev->interrupt = 1;
1011 rap = lp->a.read_rap(ioaddr);
1012 while ((csr0 = lp->a.read_csr (ioaddr, 0)) & 0x8600 && --boguscnt >= 0) {
1013 /* Acknowledge all of the current interrupt sources ASAP. */
1014 lp->a.write_csr (ioaddr, 0, csr0 & ~0x004f);
1016 must_restart = 0;
1018 if (pcnet32_debug > 5)
1019 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
1020 dev->name, csr0, lp->a.read_csr (ioaddr, 0));
1022 if (csr0 & 0x0400) /* Rx interrupt */
1023 pcnet32_rx(dev);
1025 if (csr0 & 0x0200) { /* Tx-done interrupt */
1026 int dirty_tx = lp->dirty_tx;
1028 while (dirty_tx < lp->cur_tx) {
1029 int entry = dirty_tx & TX_RING_MOD_MASK;
1030 int status = (short)le16_to_cpu(lp->tx_ring[entry].status);
1032 if (status < 0)
1033 break; /* It still hasn't been Txed */
1035 lp->tx_ring[entry].base = 0;
1037 if (status & 0x4000) {
1038 /* There was an major error, log it. */
1039 int err_status = le32_to_cpu(lp->tx_ring[entry].misc);
1040 lp->stats.tx_errors++;
1041 if (err_status & 0x04000000) lp->stats.tx_aborted_errors++;
1042 if (err_status & 0x08000000) lp->stats.tx_carrier_errors++;
1043 if (err_status & 0x10000000) lp->stats.tx_window_errors++;
1044 if (err_status & 0x40000000) {
1045 /* Ackk! On FIFO errors the Tx unit is turned off! */
1046 lp->stats.tx_fifo_errors++;
1047 /* Remove this verbosity later! */
1048 printk("%s: Tx FIFO error! Status %4.4x.\n",
1049 dev->name, csr0);
1050 must_restart = 1;
1052 } else {
1053 if (status & 0x1800)
1054 lp->stats.collisions++;
1055 lp->stats.tx_packets++;
1058 /* We must free the original skb */
1059 if (lp->tx_skbuff[entry]) {
1060 dev_kfree_skb(lp->tx_skbuff[entry]);
1061 lp->tx_skbuff[entry] = 0;
1063 dirty_tx++;
1066 #ifndef final_version
1067 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
1068 printk("out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
1069 dirty_tx, lp->cur_tx, lp->tx_full);
1070 dirty_tx += TX_RING_SIZE;
1072 #endif
1073 if (lp->tx_full && dev->tbusy
1074 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
1075 /* The ring is no longer full, clear tbusy. */
1076 lp->tx_full = 0;
1077 clear_bit(0, (void *)&dev->tbusy);
1078 mark_bh(NET_BH);
1080 lp->dirty_tx = dirty_tx;
1083 /* Log misc errors. */
1084 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
1085 if (csr0 & 0x1000) {
1087 * this happens when our receive ring is full. This shouldn't
1088 * be a problem as we will see normal rx interrupts for the frames
1089 * in the receive ring. But there are some PCI chipsets (I can reproduce
1090 * this on SP3G with Intel saturn chipset) which have sometimes problems
1091 * and will fill up the receive ring with error descriptors. In this
1092 * situation we don't get a rx interrupt, but a missed frame interrupt sooner
1093 * or later. So we try to clean up our receive ring here.
1095 pcnet32_rx(dev);
1096 lp->stats.rx_errors++; /* Missed a Rx frame. */
1098 if (csr0 & 0x0800) {
1099 printk("%s: Bus master arbitration failure, status %4.4x.\n",
1100 dev->name, csr0);
1101 /* unlike for the lance, there is no restart needed */
1104 if (must_restart) {
1105 /* stop the chip to clear the error condition, then restart */
1106 lp->a.write_csr (ioaddr, 0, 0x0004);
1107 pcnet32_restart(dev, 0x0002);
1111 /* Clear any other interrupt, and set interrupt enable. */
1112 lp->a.write_csr (ioaddr, 0, 0x7940);
1113 lp->a.write_rap(ioaddr,rap);
1115 if (pcnet32_debug > 4)
1116 printk("%s: exiting interrupt, csr0=%#4.4x.\n",
1117 dev->name, lp->a.read_csr (ioaddr, 0));
1119 dev->interrupt = 0;
1121 spin_unlock(&lp->lock);
1122 return;
1125 static int
1126 pcnet32_rx(struct net_device *dev)
1128 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
1129 int entry = lp->cur_rx & RX_RING_MOD_MASK;
1130 int i;
1132 /* If we own the next entry, it's a new packet. Send it up. */
1133 while ((short)le16_to_cpu(lp->rx_ring[entry].status) >= 0) {
1134 int status = (short)le16_to_cpu(lp->rx_ring[entry].status) >> 8;
1136 if (status != 0x03) { /* There was an error. */
1138 * There is a tricky error noted by John Murphy,
1139 * <murf@perftech.com> to Russ Nelson: Even with full-sized
1140 * buffers it's possible for a jabber packet to use two
1141 * buffers, with only the last correctly noting the error.
1143 if (status & 0x01) /* Only count a general error at the */
1144 lp->stats.rx_errors++; /* end of a packet.*/
1145 if (status & 0x20) lp->stats.rx_frame_errors++;
1146 if (status & 0x10) lp->stats.rx_over_errors++;
1147 if (status & 0x08) lp->stats.rx_crc_errors++;
1148 if (status & 0x04) lp->stats.rx_fifo_errors++;
1149 lp->rx_ring[entry].status &= le16_to_cpu(0x03ff);
1150 } else {
1151 /* Malloc up new buffer, compatible with net-2e. */
1152 short pkt_len = (le32_to_cpu(lp->rx_ring[entry].msg_length) & 0xfff)-4;
1153 struct sk_buff *skb;
1155 if(pkt_len < 60) {
1156 printk("%s: Runt packet!\n",dev->name);
1157 lp->stats.rx_errors++;
1158 } else {
1159 int rx_in_place = 0;
1161 if (pkt_len > rx_copybreak) {
1162 struct sk_buff *newskb;
1164 if ((newskb = dev_alloc_skb (PKT_BUF_SZ))) {
1165 skb_reserve (newskb, 2);
1166 skb = lp->rx_skbuff[entry];
1167 skb_put (skb, pkt_len);
1168 lp->rx_skbuff[entry] = newskb;
1169 newskb->dev = dev;
1170 lp->rx_ring[entry].base = le32_to_cpu(virt_to_bus(newskb->tail));
1171 rx_in_place = 1;
1172 } else
1173 skb = NULL;
1174 } else
1175 skb = dev_alloc_skb(pkt_len+2);
1177 if (skb == NULL) {
1178 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1179 for (i=0; i < RX_RING_SIZE; i++)
1180 if ((short)le16_to_cpu(lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].status) < 0)
1181 break;
1183 if (i > RX_RING_SIZE -2) {
1184 lp->stats.rx_dropped++;
1185 lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
1186 lp->cur_rx++;
1188 break;
1190 skb->dev = dev;
1191 if (!rx_in_place) {
1192 skb_reserve(skb,2); /* 16 byte align */
1193 skb_put(skb,pkt_len); /* Make room */
1194 eth_copy_and_sum(skb,
1195 (unsigned char *)bus_to_virt(le32_to_cpu(lp->rx_ring[entry].base)),
1196 pkt_len,0);
1198 lp->stats.rx_bytes += skb->len;
1199 skb->protocol=eth_type_trans(skb,dev);
1200 netif_rx(skb);
1201 lp->stats.rx_packets++;
1205 * The docs say that the buffer length isn't touched, but Andrew Boyd
1206 * of QNX reports that some revs of the 79C965 clear it.
1208 lp->rx_ring[entry].buf_length = le16_to_cpu(-PKT_BUF_SZ);
1209 lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
1210 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1213 return 0;
1216 static int
1217 pcnet32_close(struct net_device *dev)
1219 unsigned long ioaddr = dev->base_addr;
1220 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
1221 int i;
1223 dev->start = 0;
1224 set_bit (0, (void *)&dev->tbusy);
1226 lp->stats.rx_missed_errors = lp->a.read_csr (ioaddr, 112);
1228 if (pcnet32_debug > 1)
1229 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1230 dev->name, lp->a.read_csr (ioaddr, 0));
1232 /* We stop the PCNET32 here -- it occasionally polls memory if we don't. */
1233 lp->a.write_csr (ioaddr, 0, 0x0004);
1236 * Switch back to 16bit mode to avoid problems with dumb
1237 * DOS packet driver after a warm reboot
1239 lp->a.write_bcr (ioaddr, 20, 4);
1241 free_irq(dev->irq, dev);
1243 /* free all allocated skbuffs */
1244 for (i = 0; i < RX_RING_SIZE; i++) {
1245 lp->rx_ring[i].status = 0;
1246 if (lp->rx_skbuff[i])
1247 dev_kfree_skb(lp->rx_skbuff[i]);
1248 lp->rx_skbuff[i] = NULL;
1251 for (i = 0; i < TX_RING_SIZE; i++) {
1252 if (lp->tx_skbuff[i])
1253 dev_kfree_skb(lp->tx_skbuff[i]);
1254 lp->rx_skbuff[i] = NULL;
1257 MOD_DEC_USE_COUNT;
1259 return 0;
1262 static struct net_device_stats *
1263 pcnet32_get_stats(struct net_device *dev)
1265 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
1266 unsigned long ioaddr = dev->base_addr;
1267 u16 saved_addr;
1268 unsigned long flags;
1270 spin_lock_irqsave(&lp->lock, flags);
1271 saved_addr = lp->a.read_rap(ioaddr);
1272 lp->stats.rx_missed_errors = lp->a.read_csr (ioaddr, 112);
1273 lp->a.write_rap(ioaddr, saved_addr);
1274 spin_unlock_irqrestore(&lp->lock, flags);
1276 return &lp->stats;
1279 /* taken from the sunlance driver, which it took from the depca driver */
1280 static void pcnet32_load_multicast (struct net_device *dev)
1282 struct pcnet32_private *lp = (struct pcnet32_private *) dev->priv;
1283 volatile struct pcnet32_init_block *ib = &lp->init_block;
1284 volatile u16 *mcast_table = (u16 *)&ib->filter;
1285 struct dev_mc_list *dmi=dev->mc_list;
1286 char *addrs;
1287 int i, j, bit, byte;
1288 u32 crc, poly = CRC_POLYNOMIAL_LE;
1290 /* set all multicast bits */
1291 if (dev->flags & IFF_ALLMULTI){
1292 ib->filter [0] = 0xffffffff;
1293 ib->filter [1] = 0xffffffff;
1294 return;
1296 /* clear the multicast filter */
1297 ib->filter [0] = 0;
1298 ib->filter [1] = 0;
1300 /* Add addresses */
1301 for (i = 0; i < dev->mc_count; i++){
1302 addrs = dmi->dmi_addr;
1303 dmi = dmi->next;
1305 /* multicast address? */
1306 if (!(*addrs & 1))
1307 continue;
1309 crc = 0xffffffff;
1310 for (byte = 0; byte < 6; byte++)
1311 for (bit = *addrs++, j = 0; j < 8; j++, bit >>= 1) {
1312 int test;
1314 test = ((bit ^ crc) & 0x01);
1315 crc >>= 1;
1317 if (test) {
1318 crc = crc ^ poly;
1322 crc = crc >> 26;
1323 mcast_table [crc >> 4] |= 1 << (crc & 0xf);
1325 return;
1330 * Set or clear the multicast filter for this adaptor.
1332 static void pcnet32_set_multicast_list(struct net_device *dev)
1334 unsigned long ioaddr = dev->base_addr;
1335 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
1337 if (dev->flags&IFF_PROMISC) {
1338 /* Log any net taps. */
1339 printk("%s: Promiscuous mode enabled.\n", dev->name);
1340 lp->init_block.mode = le16_to_cpu(0x8000 | (lp->options & PORT_PORTSEL) << 7);
1341 } else {
1342 lp->init_block.mode = le16_to_cpu((lp->options & PORT_PORTSEL) << 7);
1343 pcnet32_load_multicast (dev);
1346 lp->a.write_csr (ioaddr, 0, 0x0004); /* Temporarily stop the lance. */
1348 pcnet32_restart(dev, 0x0042); /* Resume normal operation */
1351 #ifdef HAVE_PRIVATE_IOCTL
1352 static int pcnet32_mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1354 unsigned long ioaddr = dev->base_addr;
1355 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
1356 u16 *data = (u16 *)&rq->ifr_data;
1357 int phyaddr = lp->a.read_bcr (ioaddr, 33);
1359 if (lp->mii) {
1360 switch(cmd) {
1361 case SIOCDEVPRIVATE: /* Get the address of the PHY in use. */
1362 data[0] = (phyaddr >> 5) & 0x1f;
1363 /* Fall Through */
1364 case SIOCDEVPRIVATE+1: /* Read the specified MII register. */
1365 lp->a.write_bcr (ioaddr, 33, ((data[0] & 0x1f) << 5) | (data[1] & 0x1f));
1366 data[3] = lp->a.read_bcr (ioaddr, 34);
1367 lp->a.write_bcr (ioaddr, 33, phyaddr);
1368 return 0;
1369 case SIOCDEVPRIVATE+2: /* Write the specified MII register */
1370 if (!suser())
1371 return -EPERM;
1372 lp->a.write_bcr (ioaddr, 33, ((data[0] & 0x1f) << 5) | (data[1] & 0x1f));
1373 lp->a.write_bcr (ioaddr, 34, data[2]);
1374 lp->a.write_bcr (ioaddr, 33, phyaddr);
1375 return 0;
1376 default:
1377 return -EOPNOTSUPP;
1380 return -EOPNOTSUPP;
1382 #endif /* HAVE_PRIVATE_IOCTL */
1384 #ifdef MODULE
1385 MODULE_PARM(debug, "i");
1386 MODULE_PARM(max_interrupt_work, "i");
1387 MODULE_PARM(rx_copybreak, "i");
1388 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
1389 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
1392 /* An additional parameter that may be passed in... */
1393 static int debug = -1;
1396 init_module(void)
1398 if (debug > 0)
1399 pcnet32_debug = debug;
1401 pcnet32_dev = NULL;
1402 return pcnet32_probe(NULL);
1405 void
1406 cleanup_module(void)
1408 struct net_device *next_dev;
1410 /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
1411 while (pcnet32_dev) {
1412 next_dev = ((struct pcnet32_private *) pcnet32_dev->priv)->next;
1413 unregister_netdev(pcnet32_dev);
1414 release_region(pcnet32_dev->base_addr, PCNET32_TOTAL_SIZE);
1415 kfree(((struct pcnet32_private *)pcnet32_dev->priv)->origmem);
1416 kfree(pcnet32_dev);
1417 pcnet32_dev = next_dev;
1420 #endif /* MODULE */
1425 * Local variables:
1426 * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c pcnet32.c"
1427 * c-indent-level: 4
1428 * tab-width: 4
1429 * End: