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[mascara-docs.git] / i386 / linux-2.3.21 / drivers / net / sis900.c
blobd356e39af514f0709558d4beb386c73b27f2e9e4
1 /*****************************************************************************/
2 /* sis900.c: A SiS 900 PCI Fast Ethernet driver for Linux. */
3 /* */
4 /* Silicon Integrated System Corporation */
5 /* Revision: 1.05 Aug 7 1999 */
6 /* */
7 /*****************************************************************************/
8
9 /*
10 Modified from the driver which is originally written by Donald Becker.
11
12 This software may be used and distributed according to the terms
13 of the GNU Public License (GPL), incorporated herein by reference.
14 Drivers based on this skeleton fall under the GPL and must retain
15 the authorship (implicit copyright) notice.
16
17 The author may be reached as becker@tidalwave.net, or
18 Donald Becker
19 312 Severn Ave. #W302
20 Annapolis MD 21403
21
22 Support and updates [to the original skeleton] available at
23 http://www.tidalwave.net/~becker/pci-skeleton.html
24 */
25
26 static const char *version =
27 "sis900.c:v1.05 8/07/99\n";
28
29 static int max_interrupt_work = 20;
30 #define sis900_debug debug
31 static int sis900_debug = 0;
32
33 static int multicast_filter_limit = 128;
34
35 #define MAX_UNITS 8 /* More are supported, limit only on options */
36 static int speeds[MAX_UNITS] = {100, 100, 100, 100, 100, 100, 100, 100};
37 static int full_duplex[MAX_UNITS] = {1, 1, 1, 1, 1, 1, 1, 1};
38
39 #define TX_BUF_SIZE 1536
40 #define RX_BUF_SIZE 1536
41
42 #define TX_DMA_BURST 0
43 #define RX_DMA_BURST 0
44 #define TX_FIFO_THRESH 16
45 #define TxDRNT_100 (1536>>5)
46 #define TxDRNT_10 16
47 #define RxDRNT_100 8
48 #define RxDRNT_10 8
49 #define TRUE 1
50 #define FALSE 0
51
52 /* Operational parameters that usually are not changed. */
53 /* Time in jiffies before concluding the transmitter is hung. */
54 #define TX_TIMEOUT (4*HZ)
55
56 #include <linux/module.h>
57 #include <linux/version.h>
58 #include <linux/kernel.h>
59 #include <linux/sched.h>
60 #include <linux/string.h>
61 #include <linux/timer.h>
62 #include <linux/errno.h>
63 #include <linux/ioport.h>
64 #include <linux/malloc.h>
65 #include <linux/interrupt.h>
66 #include <linux/pci.h>
67 #include <linux/netdevice.h>
68 #include <linux/etherdevice.h>
69 #include <linux/skbuff.h>
70 #include <asm/processor.h> /* Processor type for cache alignment. */
71 #include <asm/bitops.h>
72 #include <asm/io.h>
73
74 #define RUN_AT(x) (jiffies + (x))
75
76 #include <linux/delay.h>
77
78 #if LINUX_VERSION_CODE < 0x20123
79 #define test_and_set_bit(val, addr) set_bit(val, addr)
80 #endif
81 #if LINUX_VERSION_CODE <= 0x20139
82 #define net_device_stats enet_statistics
83 #else
84 #define NETSTATS_VER2
85 #endif
86 #if LINUX_VERSION_CODE < 0x20155 || defined(CARDBUS)
87 /* Grrrr, the PCI code changed, but did not consider CardBus... */
88 #include <linux/bios32.h>
89 #define PCI_SUPPORT_VER1
90 #else
91 #define PCI_SUPPORT_VER2
92 #endif
93 #if LINUX_VERSION_CODE < 0x20159
94 #define dev_free_skb(skb) dev_kfree_skb(skb, FREE_WRITE);
95 #else
96 #define dev_free_skb(skb) dev_kfree_skb(skb);
97 #endif
98
99 /* The I/O extent. */
100 #define SIS900_TOTAL_SIZE 0x100
101
102 /* This table drives the PCI probe routines. It's mostly boilerplate in all
103 of the drivers, and will likely be provided by some future kernel.
104 Note the matching code -- the first table entry matchs all 56** cards but
105 second only the 1234 card.
106 */
107
108 enum pci_flags_bit {
109 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
110 };
111
112 struct pci_id_info {
113 const char *name;
114 u16 vendor_id, device_id, device_id_mask, flags;
115 int io_size;
116 struct net_device *(*probe1)(int pci_bus, int pci_devfn, struct net_device *dev,
117 long ioaddr, int irq, int chip_idx, int fnd_cnt);
118 };
119
120 static struct net_device * sis900_probe1(int pci_bus, int pci_devfn,
121 struct net_device *dev, long ioaddr,
122 int irq, int chp_idx, int fnd_cnt);
123
124 static struct pci_id_info pci_tbl[] =
125 {{ "SiS 900 PCI Fast Ethernet",
126 0x1039, 0x0900, 0xffff, PCI_USES_IO|PCI_USES_MASTER, 0x100, sis900_probe1},
127 { "SiS 7016 PCI Fast Ethernet",
128 0x1039, 0x7016, 0xffff, PCI_USES_IO|PCI_USES_MASTER, 0x100, sis900_probe1},
129 {0,}, /* 0 terminated list. */
130 };
131
132 /* The capability table matches the chip table above. */
133 enum {HAS_MII_XCVR=0x01, HAS_CHIP_XCVR=0x02, HAS_LNK_CHNG=0x04};
134 static int sis_cap_tbl[] = {
135 HAS_MII_XCVR|HAS_CHIP_XCVR|HAS_LNK_CHNG,
136 HAS_MII_XCVR|HAS_CHIP_XCVR|HAS_LNK_CHNG,
137 };
138
139 /* The rest of these values should never change. */
140 #define NUM_TX_DESC 16 /* Number of Tx descriptor registers. */
141 #define NUM_RX_DESC 8 /* Number of Rx descriptor registers. */
142
143 /* Symbolic offsets to registers. */
144 enum SIS900_registers {
145 cr=0x0, //Command Register
146 cfg=0x4, //Configuration Register
147 mear=0x8, //EEPROM Access Register
148 ptscr=0xc, //PCI Test Control Register
149 isr=0x10, //Interrupt Status Register
150 imr=0x14, //Interrupt Mask Register
151 ier=0x18, //Interrupt Enable Register
152 epar=0x18, //Enhanced PHY Access Register
153 txdp=0x20, //Transmit Descriptor Pointer Register
154 txcfg=0x24, //Transmit Configuration Register
155 rxdp=0x30, //Receive Descriptor Pointer Register
156 rxcfg=0x34, //Receive Configuration Register
157 flctrl=0x38, //Flow Control Register
158 rxlen=0x3c, //Receive Packet Length Register
159 rfcr=0x48, //Receive Filter Control Register
160 rfdr=0x4C, //Receive Filter Data Register
161 pmctrl=0xB0, //Power Management Control Register
162 pmer=0xB4 //Power Management Wake-up Event Register
163 };
164
165 #define RESET 0x00000100
166 #define SWI 0x00000080
167 #define RxRESET 0x00000020
168 #define TxRESET 0x00000010
169 #define RxDIS 0x00000008
170 #define RxENA 0x00000004
171 #define TxDIS 0x00000002
172 #define TxENA 0x00000001
173
174 #define BISE 0x80000000
175 #define EUPHCOM 0x00000100
176 #define REQALG 0x00000080
177 #define SB 0x00000040
178 #define POW 0x00000020
179 #define EXD 0x00000010
180 #define PESEL 0x00000008
181 #define LPM 0x00000004
182 #define BEM 0x00000001
183
184 /* Interrupt register bits, using my own meaningful names. */
185 #define WKEVT 0x10000000
186 #define TxPAUSEEND 0x08000000
187 #define TxPAUSE 0x04000000
188 #define TxRCMP 0x02000000
189 #define RxRCMP 0x01000000
190 #define DPERR 0x00800000
191 #define SSERR 0x00400000
192 #define RMABT 0x00200000
193 #define RTABT 0x00100000
194 #define RxSOVR 0x00010000
195 #define HIBERR 0x00008000
196 #define SWINT 0x00001000
197 #define MIBINT 0x00000800
198 #define TxURN 0x00000400
199 #define TxIDLE 0x00000200
200 #define TxERR 0x00000100
201 #define TxDESC 0x00000080
202 #define TxOK 0x00000040
203 #define RxORN 0x00000020
204 #define RxIDLE 0x00000010
205 #define RxEARLY 0x00000008
206 #define RxERR 0x00000004
207 #define RxDESC 0x00000002
208 #define RxOK 0x00000001
209
210 #define IE 0x00000001
211
212 #define TxCSI 0x80000000
213 #define TxHBI 0x40000000
214 #define TxMLB 0x20000000
215 #define TxATP 0x10000000
216 #define TxIFG 0x0C000000
217 #define TxMXF 0x03800000
218 #define TxMXF_shift 0x23
219 #define TxMXDMA 0x00700000
220 #define TxMXDMA_shift 20
221 #define TxRTCNT 0x000F0000
222 #define TxRTCNT_shift 16
223 #define TxFILLT 0x00007F00
224 #define TxFILLT_shift 8
225 #define TxDRNT 0x0000007F
226
227 #define RxAEP 0x80000000
228 #define RxARP 0x40000000
229 #define RxATP 0x10000000
230 #define RxAJAB 0x08000000
231 #define RxMXF 0x03800000
232 #define RxMXF_shift 23
233 #define RxMXDMA 0x00700000
234 #define RxMXDMA_shift 20
235 #define RxDRNT 0x0000007F
236
237 #define RFEN 0x80000000
238 #define RFAAB 0x40000000
239 #define RFAAM 0x20000000
240 #define RFAAP 0x10000000
241 #define RFPromiscuous (RFAAB|RFAAM|RFAAP)
242 #define RFAA_shift 28
243 #define RFEP 0x00070000
244 #define RFEP_shift 16
245
246 #define RFDAT 0x0000FFFF
247
248 #define OWN 0x80000000
249 #define MORE 0x40000000
250 #define INTR 0x20000000
251 #define OK 0x08000000
252 #define DSIZE 0x00000FFF
253
254 #define SUPCRC 0x10000000
255 #define ABORT 0x04000000
256 #define UNDERRUN 0x02000000
257 #define NOCARRIER 0x01000000
258 #define DEFERD 0x00800000
259 #define EXCDEFER 0x00400000
260 #define OWCOLL 0x00200000
261 #define EXCCOLL 0x00100000
262 #define COLCNT 0x000F0000
263
264 #define INCCRC 0x10000000
265 // ABORT 0x04000000
266 #define OVERRUN 0x02000000
267 #define DEST 0x01800000
268 #define BCAST 0x01800000
269 #define MCAST 0x01000000
270 #define UNIMATCH 0x00800000
271 #define TOOLONG 0x00400000
272 #define RUNT 0x00200000
273 #define RXISERR 0x00100000
274 #define CRCERR 0x00080000
275 #define FAERR 0x00040000
276 #define LOOPBK 0x00020000
277 #define RXCOL 0x00010000
278
279 #define EuphLiteEEMACAddr 0x08
280 #define EuphLiteEEVendorID 0x02
281 #define EuphLiteEEDeviceID 0x03
282 #define EuphLiteEECardTypeRev 0x0b
283 #define EuphLiteEEPlexusRev 0x0c
284 #define EuphLiteEEChecksum 0x0f
285
286 #define RXSTS_shift 18
287 #define OWN 0x80000000
288 #define MORE 0x40000000
289 #define INTR 0x20000000
290 #define OK 0x08000000
291 #define DSIZE 0x00000FFF
292 /* MII register offsets */
293 #define MII_CONTROL 0x0000
294 #define MII_STATUS 0x0001
295 #define MII_PHY_ID0 0x0002
296 #define MII_PHY_ID1 0x0003
297 #define MII_ANAR 0x0004
298 #define MII_ANLPAR 0x0005
299 #define MII_ANER 0x0006
300 /* MII Control register bit definitions. */
301 #define MIICNTL_FDX 0x0100
302 #define MIICNTL_RST_AUTO 0x0200
303 #define MIICNTL_ISOLATE 0x0400
304 #define MIICNTL_PWRDWN 0x0800
305 #define MIICNTL_AUTO 0x1000
306 #define MIICNTL_SPEED 0x2000
307 #define MIICNTL_LPBK 0x4000
308 #define MIICNTL_RESET 0x8000
309 /* MII Status register bit significance. */
310 #define MIISTAT_EXT 0x0001
311 #define MIISTAT_JAB 0x0002
312 #define MIISTAT_LINK 0x0004
313 #define MIISTAT_CAN_AUTO 0x0008
314 #define MIISTAT_FAULT 0x0010
315 #define MIISTAT_AUTO_DONE 0x0020
316 #define MIISTAT_CAN_T 0x0800
317 #define MIISTAT_CAN_T_FDX 0x1000
318 #define MIISTAT_CAN_TX 0x2000
319 #define MIISTAT_CAN_TX_FDX 0x4000
320 #define MIISTAT_CAN_T4 0x8000
321 /* MII NWAY Register Bits ...
322 ** valid for the ANAR (Auto-Negotiation Advertisement) and
323 ** ANLPAR (Auto-Negotiation Link Partner) registers */
324 #define MII_NWAY_NODE_SEL 0x001f
325 #define MII_NWAY_CSMA_CD 0x0001
326 #define MII_NWAY_T 0x0020
327 #define MII_NWAY_T_FDX 0x0040
328 #define MII_NWAY_TX 0x0080
329 #define MII_NWAY_TX_FDX 0x0100
330 #define MII_NWAY_T4 0x0200
331 #define MII_NWAY_RF 0x2000
332 #define MII_NWAY_ACK 0x4000
333 #define MII_NWAY_NP 0x8000
334
335 /* MII Auto-Negotiation Expansion Register Bits */
336 #define MII_ANER_PDF 0x0010
337 #define MII_ANER_LP_NP_ABLE 0x0008
338 #define MII_ANER_NP_ABLE 0x0004
339 #define MII_ANER_RX_PAGE 0x0002
340 #define MII_ANER_LP_AN_ABLE 0x0001
341 #define HALF_DUPLEX 1
342 #define FDX_CAPABLE_DUPLEX_UNKNOWN 2
343 #define FDX_CAPABLE_HALF_SELECTED 3
344 #define FDX_CAPABLE_FULL_SELECTED 4
345 #define HW_SPEED_UNCONFIG 0
346 #define HW_SPEED_10_MBPS 10
347 #define HW_SPEED_100_MBPS 100
348 #define HW_SPEED_DEFAULT (HW_SPEED_10_MBPS)
349
350 #define ACCEPT_ALL_PHYS 0x01
351 #define ACCEPT_ALL_MCASTS 0x02
352 #define ACCEPT_ALL_BCASTS 0x04
353 #define ACCEPT_ALL_ERRORS 0x08
354 #define ACCEPT_CAM_QUALIFIED 0x10
355 #define MAC_LOOPBACK 0x20
356 //#define FDX_CAPABLE_FULL_SELECTED 4
357 #define CRC_SIZE 4
358 #define MAC_HEADER_SIZE 14
359
360 typedef struct _EuphLiteDesc {
361 u32 llink;
362 unsigned char* buf;
363 u32 physAddr;
364 /* Hardware sees the physical address of descriptor */
365 u32 plink;
366 u32 cmdsts;
367 u32 bufPhys;
368 } EuphLiteDesc;
369
370 struct sis900_private {
371 char devname[8]; /* Used only for kernel debugging. */
372 const char *product_name;
373 struct net_device *next_module;
374 int chip_id;
375 int chip_revision;
376 unsigned char pci_bus, pci_devfn;
377 #if LINUX_VERSION_CODE > 0x20139
378 struct net_device_stats stats;
379 #else
380 struct enet_statistics stats;
381 #endif
382 struct timer_list timer; /* Media selection timer. */
383 unsigned int cur_rx; /* Index into the Rx buffer of next Rx pkt. */
384 unsigned int cur_tx, dirty_tx, tx_flag;
385
386 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
387 struct sk_buff* tx_skbuff[NUM_TX_DESC];
388 EuphLiteDesc tx_buf[NUM_TX_DESC]; /* Tx bounce buffers */
389 EuphLiteDesc rx_buf[NUM_RX_DESC];
390 unsigned char *rx_bufs;
391 unsigned char *tx_bufs; /* Tx bounce buffer region. */
392 char phys[4]; /* MII device addresses. */
393 int phy_idx; /* Support Max 4 PHY */
394 u16 pmd_status;
395 unsigned int tx_full; /* The Tx queue is full. */
396 int MediaSpeed; /* user force speed */
397 int MediaDuplex; /* user force duplex */
398 int full_duplex; /* Full/Half-duplex. */
399 int speeds; /* 100/10 Mbps. */
400 u16 LinkOn;
401 u16 LinkChange;
402 };
403
404 #ifdef MODULE
405 #if LINUX_VERSION_CODE > 0x20115
406 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>");
407 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
408 MODULE_PARM(speeds, "1-" __MODULE_STRING(MAX_UNITS) "i");
409 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
410 MODULE_PARM(multicast_filter_limit, "i");
411 MODULE_PARM(max_interrupt_work, "i");
412 MODULE_PARM(debug, "i");
413 #endif
414 #endif
415
416 static int sis900_open(struct net_device *dev);
417 static u16 read_eeprom(long ioaddr, int location);
418 static int mdio_read(struct net_device *dev, int phy_id, int location);
419 static void mdio_write(struct net_device *dev, int phy_id, int location, int val);
420 static void sis900_timer(unsigned long data);
421 static void sis900_tx_timeout(struct net_device *dev);
422 static void sis900_init_ring(struct net_device *dev);
423 static int sis900_start_xmit(struct sk_buff *skb, struct net_device *dev);
424 static int sis900_rx(struct net_device *dev);
425 static void sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
426 static int sis900_close(struct net_device *dev);
427 static int mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
428 static struct enet_statistics *sis900_get_stats(struct net_device *dev);
429 static void set_rx_mode(struct net_device *dev);
430 static void sis900_reset(struct net_device *dev);
431 static u16 elAutoNegotiate(struct net_device *dev, int phy_id, int *duplex, int *speed);
432 static void elSetCapability(struct net_device *dev, int phy_id, int duplex, int speed);
433 static u16 elPMDreadMode(struct net_device *dev, int phy_id, int *speed, int *duplex);
434 static u16 elMIIpollBit(struct net_device *dev, int phy_id, int location, u16 mask, u16 polarity, u16 *value);
435 static void elSetMediaType(struct net_device *dev, int speed, int duplex);
436
437 /* A list of all installed SiS900 devices, for removing the driver module. */
438 static struct net_device *root_sis900_dev = NULL;
439
440 /* Ideally we would detect all network cards in slot order. That would
441 be best done a central PCI probe dispatch, which wouldn't work
442 well when dynamically adding drivers. So instead we detect just the
443 SiS 900 cards in slot order. */
444
445 int sis900_probe(struct net_device *dev)
446 {
447 int cards_found = 0;
448 int pci_index = 0;
449 unsigned char pci_bus, pci_device_fn;
450
451 if ( ! pcibios_present())
452 return -ENODEV;
453
454 for (;pci_index < 0xff; pci_index++) {
455 u16 vendor, device, pci_command, new_command;
456 int chip_idx, irq;
457 long ioaddr;
458
459 if (pcibios_find_class (PCI_CLASS_NETWORK_ETHERNET << 8,
460 pci_index,
461 &pci_bus, &pci_device_fn)
462 != PCIBIOS_SUCCESSFUL) {
463 break;
464 }
465 pcibios_read_config_word(pci_bus, pci_device_fn, PCI_VENDOR_ID,
466 &vendor);
467 pcibios_read_config_word(pci_bus, pci_device_fn, PCI_DEVICE_ID,
468 &device);
469
470 for (chip_idx = 0; pci_tbl[chip_idx].vendor_id; chip_idx++)
471 if (vendor == pci_tbl[chip_idx].vendor_id &&
472 (device & pci_tbl[chip_idx].device_id_mask) ==
473 pci_tbl[chip_idx].device_id)
474 break;
475 if (pci_tbl[chip_idx].vendor_id == 0) /* Compiled out! */
476 continue;
477
478 {
479 struct pci_dev *pdev = pci_find_slot(pci_bus, pci_device_fn);
480 ioaddr = pdev->resource[0].start;
481 irq = pdev->irq;
482 }
483
484 if ((pci_tbl[chip_idx].flags & PCI_USES_IO) &&
485 check_region(ioaddr, pci_tbl[chip_idx].io_size))
486 continue;
487
488 /* Activate the card: fix for brain-damaged Win98 BIOSes. */
489 pcibios_read_config_word(pci_bus, pci_device_fn,
490 PCI_COMMAND, &pci_command);
491 new_command = pci_command | (pci_tbl[chip_idx].flags & 7);
492 if (pci_command != new_command) {
493 printk(KERN_INFO " The PCI BIOS has not enabled the"
494 " device at %d/%d!"
495 "Updating PCI command %4.4x->%4.4x.\n",
496 pci_bus, pci_device_fn,
497 pci_command, new_command);
498
499 pcibios_write_config_word(pci_bus, pci_device_fn,
500 PCI_COMMAND, new_command);
501 }
502
503 dev = pci_tbl[chip_idx].probe1(pci_bus,
504 pci_device_fn,
505 dev,
506 ioaddr,
507 irq,
508 chip_idx,
509 cards_found);
510
511 if (dev && (pci_tbl[chip_idx].flags & PCI_COMMAND_MASTER)) {
512 u8 pci_latency;
513
514 pcibios_read_config_byte(pci_bus, pci_device_fn,
515 PCI_LATENCY_TIMER, &pci_latency);
516
517 if (pci_latency < 32) {
518 printk(KERN_NOTICE " PCI latency timer (CFLT) is "
519 "unreasonably low at %d. Setting to 64 clocks.\n",
520 pci_latency);
521 pcibios_write_config_byte(pci_bus, pci_device_fn,
522 PCI_LATENCY_TIMER, 64);
523 }
524 }
525 dev = 0;
526 cards_found++;
527 }
528 return cards_found ? 0 : -ENODEV;
529 }
530
531 static struct net_device * sis900_probe1( int pci_bus,
532 int pci_devfn,
533 struct net_device *dev,
534 long ioaddr,
535 int irq,
536 int chip_idx,
537 int found_cnt)
538 {
539 static int did_version = 0; /* Already printed version info. */
540 struct sis900_private *tp;
541 u16 status;
542 int duplex = found_cnt < MAX_UNITS ? full_duplex[found_cnt] : 0 ;
543 int speed = found_cnt < MAX_UNITS ? speeds[found_cnt] : 0 ;
544 int phy=0, phy_idx=0, i;
545
546 if (did_version++ == 0)
547 printk(KERN_INFO "%s", version);
548
549 dev = init_etherdev(dev, 0);
550
551 if(dev==NULL)
552 return NULL;
553
554 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ",
555 dev->name, pci_tbl[chip_idx].name, ioaddr, irq);
556
557 if ((u16)read_eeprom(ioaddr, EuphLiteEEVendorID) != 0xffff) {
558 for (i = 0; i < 3; i++)
559 ((u16 *)(dev->dev_addr))[i] =
560 read_eeprom(ioaddr,i+EuphLiteEEMACAddr);
561 for (i = 0; i < 5; i++)
562 printk("%2.2x:", (u8)dev->dev_addr[i]);
563 printk("%2.2x.\n", dev->dev_addr[i]);
564 } else
565 printk(KERN_INFO "Error EEPROM read\n");
566
567 /* We do a request_region() to register /proc/ioports info. */
568 request_region(ioaddr, pci_tbl[chip_idx].io_size, dev->name);
569
570 dev->base_addr = ioaddr;
571 dev->irq = irq;
572
573 /* Some data structures must be quadword aligned. */
574 tp = kmalloc(sizeof(*tp), GFP_KERNEL | GFP_DMA);
575 if(tp==NULL)
576 {
577 release_region(ioaddr, pci_tbl[chip_idx].io_size);
578 return NULL;
579 }
580 memset(tp, 0, sizeof(*tp));
581 dev->priv = tp;
582
583 tp->next_module = root_sis900_dev;
584 root_sis900_dev = dev;
585
586 tp->chip_id = chip_idx;
587 tp->pci_bus = pci_bus;
588 tp->pci_devfn = pci_devfn;
589
590 /* Find the connected MII xcvrs.
591 Doing this in open() would allow detecting external xcvrs later, but
592 takes too much time. */
593 if (sis_cap_tbl[chip_idx] & HAS_MII_XCVR) {
594 for (phy = 0, phy_idx = 0;
595 phy < 32 && phy_idx < sizeof(tp->phys); phy++)
596 {
597 int mii_status ;
598 mii_status = mdio_read(dev, phy, MII_STATUS);
599
600 if (mii_status != 0xffff && mii_status != 0x0000) {
601 tp->phy_idx = phy_idx;
602 tp->phys[phy_idx++] = phy;
603 tp->pmd_status=mdio_read(dev, phy, MII_STATUS);
604 printk(KERN_INFO "%s: MII transceiver found "
605 "at address %d.\n",
606 dev->name, phy);
607 break;
608 }
609 }
610
611 if (phy_idx == 0) {
612 printk(KERN_INFO "%s: No MII transceivers found!\n",
613 dev->name);
614 tp->phys[0] = -1;
615 tp->pmd_status = 0;
616 }
617 } else {
618 tp->phys[0] = -1;
619 tp->pmd_status = 0;
620 }
621
622 if ((tp->pmd_status > 0) && (phy_idx > 0)) {
623 if (sis900_debug > 1) {
624 printk(KERN_INFO "duplex=%d, speed=%d\n",
625 duplex, speed);
626 }
627 if (!duplex && !speed) {
628 // auto-config media type
629 // Set full capability
630 if (sis900_debug > 1) {
631 printk(KERN_INFO "Auto Config ...\n");
632 }
633 elSetCapability(dev, tp->phys[tp->phy_idx], 1, 100);
634 tp->pmd_status=elAutoNegotiate(dev,
635 tp->phys[tp->phy_idx],
636 &tp->full_duplex,
637 &tp->speeds);
638 } else {
639 tp->MediaSpeed = speed;
640 tp->MediaDuplex = duplex;
641 elSetCapability(dev, tp->phys[tp->phy_idx],
642 duplex, speed);
643 elAutoNegotiate(dev, tp->phys[tp->phy_idx],
644 &tp->full_duplex,
645 &tp->speeds);
646 status = mdio_read(dev, phy, MII_ANLPAR);
647 if ( !(status & (MII_NWAY_T | MII_NWAY_T_FDX |
648 MII_NWAY_TX | MII_NWAY_TX_FDX )))
649 {
650 u16 cmd=0;
651 cmd |= ( speed == 100 ?
652 MIICNTL_SPEED : 0 );
653 cmd |= ( duplex ? MIICNTL_FDX : 0 );
654 mdio_write(dev, phy, MII_CONTROL, cmd);
655 elSetMediaType(dev, speed==100 ?
656 HW_SPEED_100_MBPS :
657 HW_SPEED_10_MBPS,
658 duplex ?
659 FDX_CAPABLE_FULL_SELECTED:
660 FDX_CAPABLE_HALF_SELECTED);
661 elMIIpollBit(dev, phy, MII_STATUS,
662 MIISTAT_LINK, TRUE, &status);
663 } else {
664 status = mdio_read(dev, phy, MII_STATUS);
665 }
666 }
667
668 if (tp->pmd_status & MIISTAT_LINK)
669 tp->LinkOn = TRUE;
670 else
671 tp->LinkOn = FALSE;
672
673 tp->LinkChange = FALSE;
674
675 }
676
677 if (sis900_debug > 1) {
678 if (tp->full_duplex == FDX_CAPABLE_FULL_SELECTED) {
679 printk(KERN_INFO "%s: Media type is Full Duplex.\n",
680 dev->name);
681 } else {
682 printk(KERN_INFO "%s: Media type is Half Duplex.\n",
683 dev->name);
684 }
685 if (tp->speeds == HW_SPEED_100_MBPS) {
686 printk(KERN_INFO "%s: Speed is 100mbps.\n", dev->name);
687 } else {
688 printk(KERN_INFO "%s: Speed is 10mbps.\n", dev->name);
689 }
690 }
691
692 /* The SiS900-specific entries in the device structure. */
693 dev->open = &sis900_open;
694 dev->hard_start_xmit = &sis900_start_xmit;
695 dev->stop = &sis900_close;
696 dev->get_stats = &sis900_get_stats;
697 dev->set_multicast_list = &set_rx_mode;
698 dev->do_ioctl = &mii_ioctl;
699
700 return dev;
701 }
702
703 /* Serial EEPROM section. */
704
705 /* EEPROM_Ctrl bits. */
706 #define EECLK 0x00000004 /* EEPROM shift clock. */
707 #define EECS 0x00000008 /* EEPROM chip select. */
708 #define EEDO 0x00000002 /* EEPROM chip data out. */
709 #define EEDI 0x00000001 /* EEPROM chip data in. */
710
711 /* Delay between EEPROM clock transitions.
712 No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
713 */
714
715 #define eeprom_delay() inl(ee_addr)
716
717 /* The EEPROM commands include the alway-set leading bit. */
718 #define EEread 0x0180
719 #define EEwrite 0x0140
720 #define EEerase 0x01C0
721 #define EEwriteEnable 0x0130
722 #define EEwriteDisable 0x0100
723 #define EEeraseAll 0x0120
724 #define EEwriteAll 0x0110
725 #define EEaddrMask 0x013F
726 #define EEcmdShift 16
727
728 static u16 read_eeprom(long ioaddr, int location)
729 {
730 int i;
731 u16 retval = 0;
732 long ee_addr = ioaddr + mear;
733 u32 read_cmd = location | EEread;
734
735 outl(0, ee_addr);
736 eeprom_delay();
737 outl(EECLK, ee_addr);
738 eeprom_delay();
739
740 /* Shift the read command bits out. */
741 for (i = 8; i >= 0; i--) {
742 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
743 outl(dataval, ee_addr);
744 eeprom_delay();
745 outl(dataval | EECLK, ee_addr);
746 eeprom_delay();
747 }
748 outb(EECS, ee_addr);
749 eeprom_delay();
750
751 for (i = 16; i > 0; i--) {
752 outl(EECS, ee_addr);
753 eeprom_delay();
754 outl(EECS | EECLK, ee_addr);
755 eeprom_delay();
756 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
757 eeprom_delay();
758 }
759
760 /* Terminate the EEPROM access. */
761 outl(0, ee_addr);
762 eeprom_delay();
763 outl(EECLK, ee_addr);
764 return (retval);
765 }
766
767 /* MII serial management: mostly bogus for now. */
768 /* Read and write the MII management registers using software-generated
769 serial MDIO protocol.
770 The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
771 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
772 "overclocking" issues. */
773
774 #define mdio_delay() inl(mdio_addr)
775
776 #define MIIread 0x6000
777 #define MIIwrite 0x6002
778 #define MIIpmdMask 0x0F80
779 #define MIIpmdShift 7
780 #define MIIregMask 0x007C
781 #define MIIregShift 2
782 #define MIIturnaroundBits 2
783 #define MIIcmdLen 16
784 #define MIIcmdShift 16
785 #define MIIreset 0xFFFFFFFF
786 #define MIIwrLen 32
787
788 #define MDC 0x00000040
789 #define MDDIR 0x00000020
790 #define MDIO 0x00000010
791
792 static void mdio_idle(long mdio_addr)
793 {
794 outl(MDIO | MDDIR, mdio_addr);
795 mdio_delay();
796 outl(MDIO | MDDIR | MDC, mdio_addr);
797 }
798
799 /* Syncronize the MII management interface by shifting 32 one bits out. */
800 static void mdio_reset(long mdio_addr)
801 {
802 int i;
803
804 for (i = 31; i >= 0; i--) {
805 outl(MDDIR | MDIO, mdio_addr);
806 mdio_delay();
807 outl(MDDIR | MDIO | MDC, mdio_addr);
808 mdio_delay();
809 }
810 return;
811 }
812
813 static int mdio_read(struct net_device *dev, int phy_id, int location)
814 {
815 long mdio_addr = dev->base_addr + mear;
816 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
817 int retval = 0;
818 int i;
819
820 mdio_reset(mdio_addr);
821 mdio_idle(mdio_addr);
822
823 for (i = 15; i >= 0; i--) {
824 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
825 outl(dataval, mdio_addr);
826 outl(dataval | MDC, mdio_addr);
827 }
828
829 /* Read the two transition, 16 data, and wire-idle bits. */
830 for (i = 16; i > 0; i--) {
831 outl(0, mdio_addr);
832 //mdio_delay();
833 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
834 outl(MDC, mdio_addr);
835 mdio_delay();
836 }
837 return retval;
838 }
839
840 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
841 {
842 long mdio_addr = dev->base_addr + mear;
843 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
844 int i;
845
846 mdio_reset(mdio_addr);
847 mdio_idle(mdio_addr);
848
849 /* Shift the command bits out. */
850 for (i = 31; i >= 0; i--) {
851 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
852 outb(dataval, mdio_addr);
853 mdio_delay();
854 outb(dataval | MDC, mdio_addr);
855 mdio_delay();
856 }
857 mdio_delay();
858 /* Clear out extra bits. */
859 for (i = 2; i > 0; i--) {
860 outb(0, mdio_addr);
861 mdio_delay();
862 outb(MDC, mdio_addr);
863 mdio_delay();
864 }
865 return;
866 }
867
868 static int
869 sis900_open(struct net_device *dev)
870 {
871 struct sis900_private *tp = (struct sis900_private *)dev->priv;
872 long ioaddr = dev->base_addr;
873
874 if (sis900_debug > 0)
875 printk(KERN_INFO "%s sis900_open, IO Addr=%x, Irq=%x\n",
876 dev->name, (unsigned int)ioaddr, dev->irq);
877
878 /* Soft reset the chip. */
879 outl(0, ioaddr + imr);
880 outl(0, ioaddr + ier);
881 outl(0, ioaddr + rfcr);
882 outl(RESET | RxRESET | TxRESET, ioaddr + cr);
883
884 if (request_irq(dev->irq, &sis900_interrupt, SA_SHIRQ, dev->name, dev))
885 {
886 return -EAGAIN;
887 }
888
889 MOD_INC_USE_COUNT;
890
891 tp->tx_bufs = kmalloc(TX_BUF_SIZE * NUM_TX_DESC, GFP_KERNEL);
892 tp->rx_bufs = kmalloc(RX_BUF_SIZE * NUM_RX_DESC, GFP_KERNEL);
893 if (tp->tx_bufs == NULL || tp->rx_bufs == NULL) {
894 if (tp->tx_bufs)
895 kfree(tp->tx_bufs);
896 if (tp->rx_bufs)
897 kfree(tp->rx_bufs);
898 if (!tp->tx_bufs) {
899 printk(KERN_ERR "%s: Can't allocate a %d byte TX Bufs.\n",
900 dev->name, TX_BUF_SIZE * NUM_TX_DESC);
901 }
902 if (!tp->rx_bufs) {
903 printk(KERN_ERR "%s: Can't allocate a %d byte RX Bufs.\n",
904 dev->name, RX_BUF_SIZE * NUM_RX_DESC);
905 }
906 return -ENOMEM;
907 }
908
909 {
910 u32 rfcrSave;
911 u32 w;
912 u32 i;
913
914 rfcrSave = inl(rfcr);
915 outl(rfcrSave & ~RFEN, rfcr);
916 for (i=0 ; i<3 ; i++) {
917 w = (u16)*((u16*)(dev->dev_addr)+i);
918 outl((((u32) i) << RFEP_shift), ioaddr + rfcr);
919 outl((u32)w, ioaddr + rfdr);
920 if (sis900_debug > 4) {
921 printk(KERN_INFO "Filter Addr[%d]=%x\n",
922 i, inl(ioaddr + rfdr));
923 }
924 }
925 outl(rfcrSave, rfcr);
926 }
927
928 sis900_init_ring(dev);
929 outl((u32)tp->tx_buf[0].physAddr, ioaddr + txdp);
930 outl((u32)tp->rx_buf[0].physAddr, ioaddr + rxdp);
931
932 if (sis900_debug > 4)
933 printk(KERN_INFO "txdp:%8.8x\n", inl(ioaddr + txdp));
934
935 /* Check that the chip has finished the reset. */
936 {
937 u32 status;
938 int j=0;
939 status = TxRCMP | RxRCMP;
940 while (status && (j++ < 30000)) {
941 status ^= (inl(isr) & status);
942 }
943 }
944
945 outl(PESEL, ioaddr + cfg);
946
947 /* Must enable Tx/Rx before setting transfer thresholds! */
948 /*
949 * #define TX_DMA_BURST 0
950 * #define RX_DMA_BURST 0
951 * #define TX_FIFO_THRESH 16
952 * #define TxDRNT_100 (1536>>5)
953 * #define TxDRNT_10 (1536>>5)
954 * #define RxDRNT_100 (1536>>5)
955 * #define RxDRNT_10 (1536>>5)
956 */
957 outl((RX_DMA_BURST<<20) | (RxDRNT_10 << 1), ioaddr+rxcfg);
958 outl(TxATP | (TX_DMA_BURST << 20) | (TX_FIFO_THRESH<<8) | TxDRNT_10,
959 ioaddr + txcfg);
960 if (sis900_debug > 1)
961 {
962 if (tp->LinkOn) {
963 printk(KERN_INFO"%s: Media Type %s%s-duplex.\n",
964 dev->name,
965 tp->speeds==HW_SPEED_100_MBPS ?
966 "100mbps " : "10mbps ",
967 tp->full_duplex== FDX_CAPABLE_FULL_SELECTED ?
968 "full" : "half");
969 }
970 else printk(KERN_INFO"%s: Media Link Off\n", dev->name);
971 }
972 set_rx_mode(dev);
973
974 dev->tbusy = 0;
975 dev->interrupt = 0;
976 dev->start = 1;
977
978 /* Enable all known interrupts by setting the interrupt mask. */
979 outl((RxOK|RxERR|RxORN|RxSOVR|TxOK|TxERR|TxURN), ioaddr + imr);
980 outl(RxENA, ioaddr + cr);
981 outl(IE, ioaddr + ier);
982
983 if (sis900_debug > 3)
984 printk(KERN_INFO "%s: sis900_open() ioaddr %#lx IRQ %d \n",
985 dev->name, ioaddr, dev->irq);
986
987 /* Set the timer to switch to check for link beat and perhaps switch
988 to an alternate media type. */
989 init_timer(&tp->timer);
990 tp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
991 tp->timer.data = (unsigned long)dev;
992 tp->timer.function = &sis900_timer; /* timer handler */
993 add_timer(&tp->timer);
994
995 return 0;
996 }
997
998 static void sis900_timer(unsigned long data)
999 {
1000 struct net_device *dev = (struct net_device *)data;
1001 struct sis900_private *tp = (struct sis900_private *)dev->priv;
1002 int next_tick = 0;
1003 u16 status;
1004
1005 if (!tp->LinkOn) {
1006 status = mdio_read(dev, tp->phys[tp->phy_idx], MII_STATUS);
1007 if (status & MIISTAT_LINK) {
1008 elPMDreadMode(dev, tp->phys[tp->phy_idx],
1009 &tp->speeds, &tp->full_duplex);
1010 tp->LinkOn = TRUE;
1011 printk(KERN_INFO "%s: Media Link On %s%s-duplex ",
1012 dev->name,
1013 tp->speeds == HW_SPEED_100_MBPS ?
1014 "100mbps " : "10mbps ",
1015 tp->full_duplex==FDX_CAPABLE_FULL_SELECTED ?
1016 "full" : "half");
1017 }
1018 } else { // previous link on
1019 status = mdio_read(dev, tp->phys[tp->phy_idx], MII_STATUS);
1020 if (!(status & MIISTAT_LINK)) {
1021 tp->LinkOn = FALSE;
1022 printk(KERN_INFO "%s: Media Link Off\n", dev->name);
1023 }
1024 }
1025 next_tick = 2*HZ;
1026
1027 if (next_tick) {
1028 tp->timer.expires = RUN_AT(next_tick);
1029 add_timer(&tp->timer);
1030 }
1031 }
1032
1033 static void sis900_tx_timeout(struct net_device *dev)
1034 {
1035 struct sis900_private *tp = (struct sis900_private *)dev->priv;
1036 long ioaddr = dev->base_addr;
1037 int i;
1038
1039 if (sis900_debug > 0)
1040 printk(KERN_INFO "%s: Transmit timeout, status %2.2x %4.4x \n",
1041 dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1042
1043 /* Disable interrupts by clearing the interrupt mask. */
1044 outl(0x0000, ioaddr + imr);
1045
1046 /* Emit info to figure out what went wrong. */
1047 if (sis900_debug > 1) {
1048 printk(KERN_INFO "%s:Tx queue start entry %d dirty entry %d.\n",
1049 dev->name, tp->cur_tx, tp->dirty_tx);
1050 for (i = 0; i < NUM_TX_DESC; i++)
1051 printk(KERN_INFO "%s: Tx descriptor %d is %8.8x.%s\n",
1052 dev->name, i, (unsigned int)&tp->tx_buf[i],
1053 i == tp->dirty_tx % NUM_TX_DESC ?
1054 " (queue head)" : "");
1055 }
1056
1057 /* Soft reset the chip. */
1058 //outb(RESET, ioaddr + cr);
1059 /* Check that the chip has finished the reset. */
1060 /*
1061 for (i = 1000; i > 0; i--)
1062 if ((inb(ioaddr + cr) & RESET) == 0)
1063 break;
1064 */
1065
1066 tp->cur_rx = 0;
1067 /* Must enable Tx/Rx before setting transfer thresholds! */
1068 /*
1069 set_rx_mode(dev);
1070 */
1071 { /* Save the unsent Tx packets. */
1072 struct sk_buff *saved_skb[NUM_TX_DESC], *skb;
1073 int j;
1074 for (j = 0; tp->cur_tx - tp->dirty_tx > 0 ; j++, tp->dirty_tx++)
1075 saved_skb[j]=tp->tx_skbuff[tp->dirty_tx % NUM_TX_DESC];
1076 tp->dirty_tx = tp->cur_tx = 0;
1077
1078 for (i = 0; i < j; i++) {
1079 skb = tp->tx_skbuff[i] = saved_skb[i];
1080 /* Always alignment */
1081 memcpy((unsigned char*)(tp->tx_buf[i].buf),
1082 skb->data, skb->len);
1083 tp->tx_buf[i].cmdsts = OWN | skb->len;
1084 /* Note: the chip doesn't have auto-pad! */
1085 /*
1086 outl(tp->tx_flag|(skb->len>=ETH_ZLEN?skb->len:ETH_ZLEN),
1087 ioaddr + TxStatus0 + i*4);
1088 */
1089 }
1090 outl(TxENA, ioaddr + cr);
1091 tp->cur_tx = i;
1092 while (i < NUM_TX_DESC)
1093 tp->tx_skbuff[i++] = 0;
1094 if (tp->cur_tx - tp->dirty_tx < NUM_TX_DESC) {/* Typical path */
1095 dev->tbusy = 0;
1096 tp->tx_full = 0;
1097 } else {
1098 tp->tx_full = 1;
1099 }
1100 }
1101
1102 dev->trans_start = jiffies;
1103 tp->stats.tx_errors++;
1104 /* Enable all known interrupts by setting the interrupt mask. */
1105 outl((RxOK|RxERR|RxORN|RxSOVR|TxOK|TxERR|TxURN), ioaddr + imr);
1106 return;
1107 }
1108
1109
1110 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1111 static void
1112 sis900_init_ring(struct net_device *dev)
1113 {
1114 struct sis900_private *tp = (struct sis900_private *)dev->priv;
1115 int i;
1116
1117 tp->tx_full = 0;
1118 tp->cur_rx = 0;
1119 tp->dirty_tx = tp->cur_tx = 0;
1120
1121 /* Tx Buffer */
1122 for (i = 0; i < NUM_TX_DESC; i++) {
1123 tp->tx_skbuff[i] = 0;
1124 tp->tx_buf[i].buf = &tp->tx_bufs[i*TX_BUF_SIZE];
1125 tp->tx_buf[i].bufPhys =
1126 virt_to_bus(&tp->tx_bufs[i*TX_BUF_SIZE]);
1127 }
1128
1129 /* Tx Descriptor */
1130 for (i = 0; i< NUM_TX_DESC; i++) {
1131 tp->tx_buf[i].llink = (u32)
1132 &(tp->tx_buf[((i+1) < NUM_TX_DESC) ? (i+1) : 0]);
1133 tp->tx_buf[i].plink = (u32)
1134 virt_to_bus(&(tp->tx_buf[((i+1) < NUM_TX_DESC) ?
1135 (i+1) : 0].plink));
1136 tp->tx_buf[i].physAddr=
1137 virt_to_bus(&(tp->tx_buf[i].plink));
1138 tp->tx_buf[i].cmdsts=0;
1139 }
1140
1141 /* Rx Buffer */
1142 for (i = 0; i < NUM_RX_DESC; i++) {
1143 tp->rx_buf[i].buf = &tp->rx_bufs[i*RX_BUF_SIZE];
1144 tp->rx_buf[i].bufPhys =
1145 virt_to_bus(&tp->rx_bufs[i*RX_BUF_SIZE]);
1146 }
1147
1148 /* Rx Descriptor */
1149 for (i = 0; i< NUM_RX_DESC; i++) {
1150 tp->rx_buf[i].llink = (u32)
1151 &(tp->rx_buf[((i+1) < NUM_RX_DESC) ? (i+1) : 0]);
1152 tp->rx_buf[i].plink = (u32)
1153 virt_to_bus(&(tp->rx_buf[((i+1) < NUM_RX_DESC) ?
1154 (i+1) : 0].plink));
1155 tp->rx_buf[i].physAddr=
1156 virt_to_bus(&(tp->rx_buf[i].plink));
1157 tp->rx_buf[i].cmdsts=RX_BUF_SIZE;
1158 }
1159 }
1160
1161 static int
1162 sis900_start_xmit(struct sk_buff *skb, struct net_device *dev)
1163 {
1164 struct sis900_private *tp = (struct sis900_private *)dev->priv;
1165 long ioaddr = dev->base_addr;
1166 int entry;
1167
1168 /* Block a timer-based transmit from overlapping. This could better be
1169 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
1170 if (test_and_set_bit(0, (void*)&dev->tbusy) != 0) {
1171 if (jiffies - dev->trans_start < TX_TIMEOUT)
1172 return 1;
1173 sis900_tx_timeout(dev);
1174 return 1;
1175 }
1176
1177 /* Calculate the next Tx descriptor entry. ????? */
1178 entry = tp->cur_tx % NUM_TX_DESC;
1179
1180 tp->tx_skbuff[entry] = skb;
1181
1182 if (sis900_debug > 5) {
1183 int i;
1184 printk(KERN_INFO "%s: SKB Tx Frame contents:(len=%d)",
1185 dev->name,skb->len);
1186
1187 for (i = 0; i < skb->len; i++) {
1188 printk("%2.2x ",
1189 (u8)skb->data[i]);
1190 }
1191 printk(".\n");
1192 }
1193
1194 memcpy(tp->tx_buf[entry].buf,
1195 skb->data, skb->len);
1196
1197 tp->tx_buf[entry].cmdsts=(OWN | skb->len);
1198
1199 //tp->tx_buf[entry].plink = 0;
1200 outl(TxENA, ioaddr + cr);
1201 if (++tp->cur_tx - tp->dirty_tx < NUM_TX_DESC) {/* Typical path */
1202 clear_bit(0, (void*)&dev->tbusy);
1203 } else {
1204 tp->tx_full = 1;
1205 }
1206
1207 /* Note: the chip doesn't have auto-pad! */
1208
1209 dev->trans_start = jiffies;
1210 if (sis900_debug > 4)
1211 printk(KERN_INFO "%s: Queued Tx packet at "
1212 "%p size %d to slot %d.\n",
1213 dev->name, skb->data, (int)skb->len, entry);
1214
1215 return 0;
1216 }
1217
1218 /* The interrupt handler does all of the Rx thread work and cleans up
1219 after the Tx thread. */
1220 static void sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1221 {
1222 struct net_device *dev = (struct net_device *)dev_instance;
1223 struct sis900_private *tp = (struct sis900_private *)dev->priv;
1224 int boguscnt = max_interrupt_work;
1225 int status;
1226 long ioaddr = dev->base_addr;
1227
1228 #if defined(__i386__)
1229 /* A lock to prevent simultaneous entry bug on Intel SMP machines. */
1230 if (test_and_set_bit(0, (void*)&dev->interrupt)) {
1231 printk(KERN_INFO "%s: SMP simultaneous entry of "
1232 "an interrupt handler.\n", dev->name);
1233 dev->interrupt = 0; /* Avoid halting machine. */
1234 return;
1235 }
1236 #else
1237 if (dev->interrupt) {
1238 printk(KERN_INFO "%s: Re-entering the "
1239 "interrupt handler.\n", dev->name);
1240 return;
1241 }
1242 dev->interrupt = 1;
1243 #endif
1244
1245 do {
1246 status = inl(ioaddr + isr);
1247 /* Acknowledge all of the current interrupt sources ASAP. */
1248 outl(status, ioaddr + isr); // ?????
1249
1250 if (sis900_debug > 4)
1251 printk(KERN_INFO "%s: interrupt status=%#4.4x "
1252 "new intstat=%#4.4x.\n",
1253 dev->name, status, inl(ioaddr + isr));
1254
1255 if ((status & (TxURN|TxERR|TxOK | RxORN|RxERR|RxOK)) == 0) {
1256 break;
1257 }
1258
1259 if (status & (RxOK|RxORN|RxERR)) /* Rx interrupt */
1260 sis900_rx(dev);
1261
1262 if (status & (TxOK | TxERR)) {
1263 unsigned int dirty_tx;
1264
1265 if (sis900_debug > 5) {
1266 printk(KERN_INFO "TxOK:tp->cur_tx:%d,"
1267 "tp->dirty_tx:%x\n",
1268 tp->cur_tx, tp->dirty_tx);
1269 }
1270 for (dirty_tx = tp->dirty_tx; dirty_tx < tp->cur_tx;
1271 dirty_tx++)
1272 {
1273 int i;
1274 int entry = dirty_tx % NUM_TX_DESC;
1275 int txstatus = tp->tx_buf[entry].cmdsts;
1276
1277 if (sis900_debug > 4) {
1278 printk(KERN_INFO "%s: Tx Frame contents:"
1279 "(len=%d)",
1280 dev->name, (txstatus & DSIZE));
1281
1282 for (i = 0; i < (txstatus & DSIZE) ;
1283 i++) {
1284 printk("%2.2x ",
1285 (u8)(tp->tx_buf[entry].buf[i]));
1286 }
1287 printk(".\n");
1288 }
1289 if ( ! (txstatus & (OK | UNDERRUN)))
1290 {
1291 if (sis900_debug > 1)
1292 printk(KERN_INFO "Tx NOT (OK,"
1293 "UnderRun)\n");
1294 break; /* It still hasn't been Txed */
1295 }
1296
1297 /* Note: TxCarrierLost is always asserted
1298 at 100mbps. */
1299 if (txstatus & (OWCOLL | ABORT)) {
1300 /* There was an major error, log it. */
1301 if (sis900_debug > 1)
1302 printk(KERN_INFO "Tx Out of "
1303 " Window,Abort\n");
1304 #ifndef final_version
1305 if (sis900_debug > 1)
1306 printk(KERN_INFO "%s: Transmit "
1307 "error, Tx status %8.8x.\n",
1308 dev->name, txstatus);
1309 #endif
1310 tp->stats.tx_errors++;
1311 if (txstatus & ABORT) {
1312 tp->stats.tx_aborted_errors++;
1313 }
1314 if (txstatus & NOCARRIER)
1315 tp->stats.tx_carrier_errors++;
1316 if (txstatus & OWCOLL)
1317 tp->stats.tx_window_errors++;
1318 #ifdef ETHER_STATS
1319 if ((txstatus & COLCNT)==COLCNT)
1320 tp->stats.collisions16++;
1321 #endif
1322 } else {
1323 #ifdef ETHER_STATS
1324 /* No count for tp->stats.tx_deferred */
1325 #endif
1326 if (txstatus & UNDERRUN) {
1327 if (sis900_debug > 2)
1328 printk(KERN_INFO "Tx UnderRun\n");
1329 }
1330 tp->stats.collisions +=
1331 (txstatus >> 16) & 0xF;
1332 #if LINUX_VERSION_CODE > 0x20119
1333 tp->stats.tx_bytes += txstatus & DSIZE;
1334 #endif
1335 if (sis900_debug > 2)
1336 printk(KERN_INFO "Tx Transmit OK\n");
1337 tp->stats.tx_packets++;
1338 }
1339
1340 /* Free the original skb. */
1341 if (sis900_debug > 2)
1342 printk(KERN_INFO "Free original skb\n");
1343 dev_free_skb(tp->tx_skbuff[entry]);
1344 tp->tx_skbuff[entry] = 0;
1345 } // for dirty
1346
1347 #ifndef final_version
1348 if (tp->cur_tx - dirty_tx > NUM_TX_DESC) {
1349 printk(KERN_INFO"%s: Out-of-sync dirty pointer,"
1350 " %d vs. %d, full=%d.\n",
1351 dev->name, dirty_tx,
1352 tp->cur_tx, tp->tx_full);
1353 dirty_tx += NUM_TX_DESC;
1354 }
1355 #endif
1356
1357 if (tp->tx_full && dirty_tx > tp->cur_tx-NUM_TX_DESC) {
1358 /* The ring is no longer full, clear tbusy. */
1359 if (sis900_debug > 3)
1360 printk(KERN_INFO "Tx Ring NO LONGER Full\n");
1361 tp->tx_full = 0;
1362 dev->tbusy = 0;
1363 mark_bh(NET_BH);
1364 }
1365
1366 tp->dirty_tx = dirty_tx;
1367 if (sis900_debug > 2)
1368 printk(KERN_INFO "TxOK,tp->cur_tx:%d,tp->dirty:%d\n",
1369 tp->cur_tx, tp->dirty_tx);
1370 } // if (TxOK | TxERR)
1371
1372 /* Check uncommon events with one test. */
1373 if (status & (RxORN | TxERR | RxERR)) {
1374 if (sis900_debug > 2)
1375 printk(KERN_INFO "%s: Abnormal interrupt,"
1376 "status %8.8x.\n", dev->name, status);
1377
1378 if (status == 0xffffffff)
1379 break;
1380 if (status & (RxORN | RxERR))
1381 tp->stats.rx_errors++;
1382
1383
1384 if (status & RxORN) {
1385 tp->stats.rx_over_errors++;
1386 }
1387 }
1388 if (--boguscnt < 0) {
1389 printk(KERN_INFO "%s: Too much work at interrupt, "
1390 "IntrStatus=0x%4.4x.\n",
1391 dev->name, status);
1392 break;
1393 }
1394 } while (1);
1395
1396 if (sis900_debug > 3)
1397 printk(KERN_INFO "%s: exiting interrupt, intr_status=%#4.4x.\n",
1398 dev->name, inl(ioaddr + isr));
1399
1400 #if defined(__i386__)
1401 clear_bit(0, (void*)&dev->interrupt);
1402 #else
1403 dev->interrupt = 0;
1404 #endif
1405 return;
1406 }
1407
1408 /* The data sheet doesn't describe the Rx ring at all, so I'm guessing at the
1409 field alignments and semantics. */
1410 static int sis900_rx(struct net_device *dev)
1411 {
1412 struct sis900_private *tp = (struct sis900_private *)dev->priv;
1413 long ioaddr = dev->base_addr;
1414 u16 cur_rx = tp->cur_rx % NUM_RX_DESC;
1415 int rx_status=tp->rx_buf[cur_rx].cmdsts;
1416
1417 if (sis900_debug > 4)
1418 printk(KERN_INFO "%s: sis900_rx, current %4.4x,"
1419 " rx status=%8.8x\n",
1420 dev->name, cur_rx,
1421 rx_status);
1422
1423 while (rx_status & OWN) {
1424 int rx_size = rx_status & DSIZE;
1425 rx_size -= CRC_SIZE;
1426
1427 if (sis900_debug > 4) {
1428 int i;
1429 printk(KERN_INFO "%s: sis900_rx, rx status %8.8x,"
1430 " size %4.4x, cur %4.4x.\n",
1431 dev->name, rx_status, rx_size, cur_rx);
1432 printk(KERN_INFO "%s: Rx Frame contents:", dev->name);
1433
1434 for (i = 0; i < rx_size; i++) {
1435 printk("%2.2x ",
1436 (u8)(tp->rx_buf[cur_rx].buf[i]));
1437 }
1438
1439 printk(".\n");
1440 }
1441 if (rx_status & TOOLONG) {
1442 if (sis900_debug > 1)
1443 printk(KERN_INFO "%s: Oversized Ethernet frame,"
1444 " status %4.4x!\n",
1445 dev->name, rx_status);
1446 tp->stats.rx_length_errors++;
1447 } else if (rx_status & (RXISERR | RUNT | CRCERR | FAERR)) {
1448 if (sis900_debug > 1)
1449 printk(KERN_INFO"%s: Ethernet frame had errors,"
1450 " status %4.4x.\n",
1451 dev->name, rx_status);
1452 tp->stats.rx_errors++;
1453 if (rx_status & (RXISERR | FAERR))
1454 tp->stats.rx_frame_errors++;
1455 if (rx_status & (RUNT | TOOLONG))
1456 tp->stats.rx_length_errors++;
1457 if (rx_status & CRCERR) tp->stats.rx_crc_errors++;
1458 } else {
1459 /* Malloc up new buffer, compatible with net-2e. */
1460 /* Omit the four octet CRC from the length. */
1461 struct sk_buff *skb;
1462
1463 skb = dev_alloc_skb(rx_size + 2);
1464 if (skb == NULL) {
1465 printk(KERN_INFO "%s: Memory squeeze,"
1466 "deferring packet.\n",
1467 dev->name);
1468 /* We should check that some rx space is free.
1469 If not,
1470 free one and mark stats->rx_dropped++. */
1471 tp->stats.rx_dropped++;
1472 tp->rx_buf[cur_rx].cmdsts = RX_BUF_SIZE;
1473 break;
1474 }
1475 skb->dev = dev;
1476 skb_reserve(skb, 2); /* 16 byte align the IP fields. */
1477 if (rx_size+CRC_SIZE > RX_BUF_SIZE) {
1478 /*
1479 int semi_count = RX_BUF_LEN - ring_offset - 4;
1480 memcpy(skb_put(skb, semi_count),
1481 &rx_bufs[ring_offset + 4], semi_count);
1482 memcpy(skb_put(skb, rx_size-semi_count),
1483 rx_bufs, rx_size - semi_count);
1484 if (sis900_debug > 4) {
1485 int i;
1486 printk(KERN_DEBUG"%s: Frame wrap @%d",
1487 dev->name, semi_count);
1488 for (i = 0; i < 16; i++)
1489 printk(" %2.2x", rx_bufs[i]);
1490 printk(".\n");
1491 memset(rx_bufs, 0xcc, 16);
1492 }
1493 */
1494 } else {
1495 #if 0 /* USE_IP_COPYSUM */
1496 eth_copy_and_sum(skb,
1497 tp->rx_buf[cur_rx].buf, rx_size, 0);
1498 skb_put(skb, rx_size);
1499 #else
1500 memcpy(skb_put(skb, rx_size),
1501 tp->rx_buf[cur_rx].buf, rx_size);
1502 #endif
1503 }
1504 skb->protocol = eth_type_trans(skb, dev);
1505 netif_rx(skb);
1506 #if LINUX_VERSION_CODE > 0x20119
1507 tp->stats.rx_bytes += rx_size;
1508 #endif
1509 tp->stats.rx_packets++;
1510 }
1511 tp->rx_buf[cur_rx].cmdsts = RX_BUF_SIZE;
1512
1513 cur_rx = ((cur_rx+1) % NUM_RX_DESC);
1514 rx_status = tp->rx_buf[cur_rx].cmdsts;
1515 } // while
1516 if (sis900_debug > 4)
1517 printk(KERN_INFO "%s: Done sis900_rx(), current %4.4x "
1518 "Cmd %2.2x.\n",
1519 dev->name, cur_rx,
1520 inb(ioaddr + cr));
1521 tp->cur_rx = cur_rx;
1522 return 0;
1523 }
1524
1525 static int
1526 sis900_close(struct net_device *dev)
1527 {
1528 long ioaddr = dev->base_addr;
1529 struct sis900_private *tp = (struct sis900_private *)dev->priv;
1530 int i;
1531
1532 dev->start = 0;
1533 dev->tbusy = 1;
1534
1535 if (sis900_debug > 1)
1536 printk(KERN_DEBUG"%s: Shutting down ethercard, status was 0x%4.4x.\n",
1537 dev->name, inl(ioaddr + isr));
1538
1539 /* Disable interrupts by clearing the interrupt mask. */
1540 outl(0x0000, ioaddr + imr);
1541
1542 /* Stop the chip's Tx and Rx DMA processes. */
1543 outl(0x00, ioaddr + cr);
1544
1545 del_timer(&tp->timer);
1546
1547 free_irq(dev->irq, dev);
1548
1549 for (i = 0; i < NUM_TX_DESC; i++) {
1550 if (tp->tx_skbuff[i])
1551 dev_free_skb(tp->tx_skbuff[i]);
1552 tp->tx_skbuff[i] = 0;
1553 }
1554 kfree(tp->rx_bufs);
1555 kfree(tp->tx_bufs);
1556
1557 /* Green! Put the chip in low-power mode. */
1558
1559 MOD_DEC_USE_COUNT;
1560
1561 return 0;
1562 }
1563
1564 static int mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1565 {
1566 struct sis900_private *tp = (struct sis900_private *)dev->priv;
1567 u16 *data = (u16 *)&rq->ifr_data;
1568
1569 switch(cmd) {
1570 case SIOCDEVPRIVATE: /* Get the address of the PHY in use. */
1571 data[0] = tp->phys[tp->phy_idx];
1572 /* Fall Through */
1573 case SIOCDEVPRIVATE+1: /* Read the specified MII register. */
1574 data[3] = mdio_read(dev, data[0] & 0x1f, data[1] & 0x1f);
1575 return 0;
1576 case SIOCDEVPRIVATE+2: /* Write the specified MII register */
1577 if (!suser())
1578 return -EPERM;
1579 mdio_write(dev, data[0] & 0x1f, data[1] & 0x1f, data[2]);
1580 return 0;
1581 default:
1582 return -EOPNOTSUPP;
1583 }
1584 }
1585
1586 static struct enet_statistics *
1587 sis900_get_stats(struct net_device *dev)
1588 {
1589 struct sis900_private *tp = (struct sis900_private *)dev->priv;
1590
1591 return &tp->stats;
1592 }
1593
1594 /* Set or clear the multicast filter for this adaptor.
1595 This routine is not state sensitive and need not be SMP locked. */
1596
1597 static u16 elComputeHashTableIndex(u8 *addr)
1598 {
1599 #define POLYNOMIAL 0x04C11DB6L
1600 u32 crc = 0xffffffff, msb;
1601 int i, j;
1602 u8 byte;
1603
1604 for( i=0; i<6; i++ ) {
1605 byte = *addr++;
1606 for( j=0; j<8; j++ ) {
1607 msb = crc >> 31;
1608 crc <<= 1;
1609 if( msb ^ ( byte & 1 )) {
1610 crc ^= POLYNOMIAL;
1611 crc |= 1;
1612 }
1613 byte >>= 1;
1614 }
1615 }
1616 // 7 bit crc for 128 bit hash table
1617 return( (int)(crc >> 25) );
1618 }
1619
1620 static u16 elMIIpollBit(struct net_device *dev,
1621 int phy_id,
1622 int location,
1623 u16 mask,
1624 u16 polarity,
1625 u16 *value)
1626 {
1627 u32 i;
1628 i=0;
1629 while (1) {
1630 *value = mdio_read(dev, phy_id, location);
1631 if (polarity) {
1632 if (mask & *value) return(TRUE);
1633 } else {
1634 if (mask & ~(*value)) return(TRUE);
1635 }
1636 if (++i == 1200) break;
1637 }
1638 return(FALSE);
1639 }
1640
1641 static u16 elPMDreadMode(struct net_device *dev,
1642 int phy_id,
1643 int *speed,
1644 int *duplex)
1645 {
1646 u16 status, OurCap;
1647
1648 *speed = HW_SPEED_10_MBPS;
1649 *duplex = FDX_CAPABLE_HALF_SELECTED;
1650
1651 status = mdio_read(dev, phy_id, MII_ANLPAR);
1652 OurCap = mdio_read(dev, phy_id, MII_ANAR);
1653 if (sis900_debug > 1) {
1654 printk(KERN_INFO "Link Part Status %4X\n", status);
1655 printk(KERN_INFO "Our Status %4X\n", OurCap);
1656 printk(KERN_INFO "Status Reg %4X\n",
1657 mdio_read(dev, phy_id, MII_STATUS));
1658 }
1659 status &= OurCap;
1660
1661 if ( !( status &
1662 (MII_NWAY_T|MII_NWAY_T_FDX | MII_NWAY_TX | MII_NWAY_TX_FDX ))) {
1663 if (sis900_debug > 1) {
1664 printk(KERN_INFO "The other end NOT support NWAY...\n");
1665 }
1666 while (( status = mdio_read(dev, phy_id, 18)) & 0x4000) ;
1667 while (( status = mdio_read(dev, phy_id, 18)) & 0x0020) ;
1668 if (status & 0x80)
1669 *speed = HW_SPEED_100_MBPS;
1670 if (status & 0x40)
1671 *duplex = FDX_CAPABLE_FULL_SELECTED;
1672 if (sis900_debug > 3) {
1673 printk(KERN_INFO"%s: Setting %s%s-duplex.\n",
1674 dev->name,
1675 *speed == HW_SPEED_100_MBPS ?
1676 "100mbps " : "10mbps ",
1677 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1678 "full" : "half");
1679 }
1680 } else {
1681 if (sis900_debug > 1) {
1682 printk(KERN_INFO "The other end support NWAY...\n");
1683 }
1684
1685 if (status & (MII_NWAY_TX_FDX | MII_NWAY_T_FDX)) {
1686 *duplex = FDX_CAPABLE_FULL_SELECTED;
1687 }
1688 if (status & (MII_NWAY_TX_FDX | MII_NWAY_TX)) {
1689 *speed = HW_SPEED_100_MBPS;
1690 }
1691 if (sis900_debug > 3) {
1692 printk(KERN_INFO"%s: Setting %s%s-duplex based on"
1693 " auto-negotiated partner ability.\n",
1694 dev->name,
1695 *speed == HW_SPEED_100_MBPS ?
1696 "100mbps " : "10mbps ",
1697 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1698 "full" : "half");
1699 }
1700 }
1701 return (status);
1702 }
1703
1704 static u16 elAutoNegotiate(struct net_device *dev, int phy_id, int *duplex, int *speed)
1705 {
1706 u16 status, retnVal;
1707
1708 if (sis900_debug > 1) {
1709 printk(KERN_INFO "AutoNegotiate...\n");
1710 }
1711 mdio_write(dev, phy_id, MII_CONTROL, 0);
1712 mdio_write(dev, phy_id, MII_CONTROL, MIICNTL_AUTO | MIICNTL_RST_AUTO);
1713 retnVal = elMIIpollBit(dev, phy_id, MII_CONTROL, MIICNTL_RST_AUTO,
1714 FALSE,&status);
1715 if (!retnVal) {
1716 printk(KERN_INFO "Not wait for Reset Complete\n");
1717 }
1718 retnVal = elMIIpollBit(dev, phy_id, MII_STATUS, MIISTAT_AUTO_DONE,
1719 TRUE, &status);
1720 if (!retnVal) {
1721 printk(KERN_INFO "Not wait for AutoNego Complete\n");
1722 }
1723 retnVal = elMIIpollBit(dev, phy_id, MII_STATUS, MIISTAT_LINK,
1724 TRUE, &status);
1725 if (!retnVal) {
1726 printk(KERN_INFO "Not wait for Link Complete\n");
1727 }
1728 if (status & MIISTAT_LINK) {
1729 elPMDreadMode(dev, phy_id, speed, duplex);
1730 elSetMediaType(dev, *speed, *duplex);
1731 }
1732 return(status);
1733 }
1734
1735 static void elSetCapability(struct net_device *dev, int phy_id,
1736 int duplex, int speed)
1737 {
1738 u16 cap = ( MII_NWAY_T | MII_NWAY_T_FDX |
1739 MII_NWAY_TX | MII_NWAY_TX_FDX | MII_NWAY_CSMA_CD );
1740
1741 if (speed != 100) {
1742 cap &= ~( MII_NWAY_TX | MII_NWAY_TX_FDX );
1743 if (sis900_debug > 1) {
1744 printk(KERN_INFO "UNSET 100Mbps\n");
1745 }
1746 }
1747
1748 if (!duplex) {
1749 cap &= ~( MII_NWAY_T_FDX | MII_NWAY_TX_FDX );
1750 if (sis900_debug > 1) {
1751 printk(KERN_INFO "UNSET full-duplex\n");
1752 }
1753 }
1754
1755 mdio_write(dev, phy_id, MII_ANAR, cap);
1756 }
1757
1758 static void elSetMediaType(struct net_device *dev, int speed, int duplex)
1759 {
1760 long ioaddr = dev->base_addr;
1761 u32 txCfgOn = 0, txCfgOff = TxDRNT;
1762 u32 rxCfgOn = 0, rxCfgOff = 0;
1763
1764 if (speed == HW_SPEED_100_MBPS) {
1765 txCfgOn |= (TxDRNT_100 | TxHBI);
1766 } else {
1767 txCfgOn |= TxDRNT_10;
1768 }
1769
1770 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1771 txCfgOn |= (TxCSI | TxHBI);
1772 rxCfgOn |= RxATP;
1773 } else {
1774 txCfgOff |= (TxCSI | TxHBI);
1775 rxCfgOff |= RxATP;
1776 }
1777 outl( (inl(ioaddr + txcfg) & ~txCfgOff) | txCfgOn, ioaddr + txcfg);
1778 outl( (inl(ioaddr + rxcfg) & ~rxCfgOff) | rxCfgOn, ioaddr + rxcfg);
1779 }
1780
1781 static void set_rx_mode(struct net_device *dev)
1782 {
1783 long ioaddr = dev->base_addr;
1784 u16 mc_filter[8];
1785 int i;
1786 int rx_mode;
1787 u32 rxCfgOn = 0, rxCfgOff = 0;
1788 u32 txCfgOn = 0, txCfgOff = 0;
1789
1790 if (sis900_debug > 3)
1791 printk(KERN_INFO "%s: set_rx_mode (%4.4x) done--"
1792 "RxCfg %8.8x.\n",
1793 dev->name, dev->flags, inl(ioaddr + rxcfg));
1794
1795 /* Note: do not reorder, GCC is clever about common statements. */
1796 if (dev->flags & IFF_PROMISC) {
1797 printk(KERN_NOTICE"%s: Promiscuous mode enabled.\n", dev->name);
1798 rx_mode = ACCEPT_ALL_BCASTS | ACCEPT_ALL_MCASTS |
1799 ACCEPT_CAM_QUALIFIED | ACCEPT_ALL_PHYS;
1800 for (i=0 ; i<8 ; i++)
1801 mc_filter[i]=0xffff;
1802 } else if ((dev->mc_count > multicast_filter_limit)
1803 || (dev->flags & IFF_ALLMULTI)) {
1804 rx_mode = ACCEPT_ALL_BCASTS | ACCEPT_ALL_MCASTS |
1805 ACCEPT_CAM_QUALIFIED;
1806 for (i=0 ; i<8 ; i++)
1807 mc_filter[i]=0xffff;
1808 } else {
1809 struct dev_mc_list *mclist;
1810 rx_mode = ACCEPT_ALL_BCASTS | ACCEPT_ALL_MCASTS |
1811 ACCEPT_CAM_QUALIFIED;
1812 for (i=0 ; i<8 ; i++)
1813 mc_filter[i]=0;
1814 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1815 i++, mclist = mclist->next)
1816 set_bit(elComputeHashTableIndex(mclist->dmi_addr),
1817 mc_filter);
1818 }
1819
1820 for (i=0 ; i<8 ; i++) {
1821 outl((u32)(0x00000004+i) << 16, ioaddr + rfcr);
1822 outl(mc_filter[i], ioaddr + rfdr);
1823 }
1824 /* We can safely update without stopping the chip. */
1825 //rx_mode = ACCEPT_CAM_QUALIFIED | ACCEPT_ALL_BCASTS | ACCEPT_ALL_PHYS;
1826 //rx_mode = ACCEPT_CAM_QUALIFIED | ACCEPT_ALL_BCASTS;
1827 outl(RFEN | ((rx_mode & (ACCEPT_ALL_MCASTS | ACCEPT_ALL_BCASTS |
1828 ACCEPT_ALL_PHYS)) << RFAA_shift), ioaddr + rfcr);
1829
1830 if (rx_mode & ACCEPT_ALL_ERRORS) {
1831 rxCfgOn = RxAEP | RxARP | RxAJAB;
1832 } else {
1833 rxCfgOff = RxAEP | RxARP | RxAJAB;
1834 }
1835 if (rx_mode & MAC_LOOPBACK) {
1836 rxCfgOn |= RxATP;
1837 txCfgOn |= TxMLB;
1838 } else {
1839 if (!(( (struct sis900_private *)(dev->priv) )->full_duplex))
1840 rxCfgOff |= RxATP;
1841 txCfgOff |= TxMLB;
1842 }
1843
1844 if (sis900_debug > 2) {
1845 printk(KERN_INFO "Before Set TxCfg=%8.8x\n",inl(ioaddr+txcfg));
1846 printk(KERN_INFO "Before Set RxCfg=%8.8x\n",inl(ioaddr+rxcfg));
1847 }
1848
1849 outl((inl(ioaddr + rxcfg) | rxCfgOn) & ~rxCfgOff, ioaddr + rxcfg);
1850 outl((inl(ioaddr + txcfg) | txCfgOn) & ~txCfgOff, ioaddr + txcfg);
1851
1852 if (sis900_debug > 2) {
1853 printk(KERN_INFO "After Set TxCfg=%8.8x\n",inl(ioaddr+txcfg));
1854 printk(KERN_INFO "After Set RxCfg=%8.8x\n",inl(ioaddr+rxcfg));
1855 printk(KERN_INFO "Receive Filter Register:%8.8x\n",
1856 inl(ioaddr + rfcr));
1857 }
1858 return;
1859 }
1860
1861 static void sis900_reset(struct net_device *dev)
1862 {
1863 long ioaddr = dev->base_addr;
1864
1865 outl(0, ioaddr + ier);
1866 outl(0, ioaddr + imr);
1867 outl(0, ioaddr + rfcr);
1868
1869 outl(RxRESET | TxRESET | RESET, ioaddr + cr);
1870 outl(PESEL, ioaddr + cfg);
1871
1872 set_rx_mode(dev);
1873 }
1874
1875 #ifdef MODULE
1876 int init_module(void)
1877 {
1878 return sis900_probe(0);
1879 }
1880
1881 void
1882 cleanup_module(void)
1883 {
1884 struct net_device *next_dev;
1885
1886 /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
1887 while (root_sis900_dev) {
1888 struct sis900_private *tp =
1889 (struct sis900_private *)root_sis900_dev->priv;
1890 next_dev = tp->next_module;
1891 unregister_netdev(root_sis900_dev);
1892 release_region(root_sis900_dev->base_addr,
1893 pci_tbl[tp->chip_id].io_size);
1894 kfree(tp);
1895 kfree(root_sis900_dev);
1896 root_sis900_dev = next_dev;
1897 }
1898 }
1899
1900 #endif /* MODULE */
1901 /*
1902 * Local variables:
1903 * compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -c sis900.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
1904 * SMP-compile-command: "gcc -D__SMP__ -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -c sis900.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
1905 * c-indent-level: 4
1906 * c-basic-offset: 4
1907 * tab-width: 4
1908 * End:
1909 */