* remove "\r" nonsense
[mascara-docs.git] / amd64 / bareMetalOS-0.5.3 / os / drivers / pci.asm
blob0143eb60cb7f694d9d07ae42ded12a362d7b5728
1 ; =============================================================================
2 ; BareMetal -- a 64-bit OS written in Assembly for x86-64 systems
3 ; Copyright (C) 2008-2012 Return Infinity -- see LICENSE.TXT
5 ; PCI Functions. http://wiki.osdev.org/PCI
6 ; =============================================================================
8 align 16
9 db 'DEBUG: PCI '
10 align 16
13 ; -----------------------------------------------------------------------------
14 ; os_pci_read_reg -- Read a register from a PCI device
15 ; IN: BL = Bus number
16 ; CL = Device/Slot number
17 ; DL = Register number
18 ; OUT: EAX = Register information
19 ; All other registers preserved
20 os_pci_read_reg:
21 push rdx
22 push rcx
23 push rbx
25 shl ebx, 16 ; Move Bus number to bits 23 - 16
26 shl ecx, 11 ; Move Device number to bits 15 - 11
27 mov bx, cx
28 shl edx, 2
29 mov bl, dl
30 and ebx, 0x00ffffff ; Clear bits 31 - 24
31 or ebx, 0x80000000 ; Set bit 31
32 mov eax, ebx
33 mov dx, PCI_CONFIG_ADDRESS
34 out dx, eax
35 mov dx, PCI_CONFIG_DATA
36 in eax, dx
38 pop rbx
39 pop rcx
40 pop rdx
41 ret
42 ; -----------------------------------------------------------------------------
45 ; -----------------------------------------------------------------------------
46 ; os_pci_find_device -- Finds a PCI device based on the Device and Vendor ID provided
47 ; IN: EAX = Device and Vendor ID (ie: 0x70008086)
48 ; OUT: BL = Bus number (8-bit value)
49 ; CL = Device/Slot number (5-bit value)
50 ; Carry set if no matching device was found
51 ; All other registers preserved
52 os_pci_find_device:
53 push rdx
55 mov rbx, rax ; Save device and vendor IDs to RBX
56 xor rcx, rcx
57 xor rax, rax
59 mov ecx, 0x80000000 ; Bit 31 must be set
61 os_pci_find_device_check_next:
62 mov eax, ecx
63 mov dx, PCI_CONFIG_ADDRESS
64 out dx, eax
65 mov dx, PCI_CONFIG_DATA
66 in eax, dx ; EAX now holds the Device and Vendor ID
67 cmp eax, ebx
68 je os_pci_find_device_found
69 add ecx, 0x800
70 cmp ecx, 0x81000000 ; The end has been reached (already looked at 8192 devices)
71 jne os_pci_find_device_check_next
73 os_pci_find_device_not_found:
74 stc ; Set carry (failure)
75 jmp os_pci_find_device_end
77 os_pci_find_device_found: ; ECX bits 23 - 16 is the Bus # and bits 15 - 11 is the Device/Slot #
78 xor rax, rax
79 xor rbx, rbx
80 shr ecx, 11 ; Device/Slot number is now bits 4 - 0
81 mov bl, cl ; BL contains Device/Slot number
82 and bl, 00011111b ; Clear the top 3 bits, BL contains the Device/Slot number
83 shr ecx, 5 ; Bus number is now bits 7 - 0
84 mov al, cl ; AL contains the Bus number
85 xor ecx, ecx
86 mov cl, bl
87 mov bl, al
88 clc ; Clear carry (success)
90 os_pci_find_device_end:
91 pop rdx
92 ret
93 ; -----------------------------------------------------------------------------
96 ; -----------------------------------------------------------------------------
97 ; os_pci_dump_devices -- Dump all Device and Vendor ID's to the screen
98 ; IN: Nothing
99 ; OUT: Nothing, All registers preserved
100 ; http://pci-ids.ucw.cz/read/PC/ - Online list of Device and Vendor ID's
101 os_pci_dump_devices:
102 push rdx
103 push rcx
104 push rbx
105 push rax
107 xor rcx, rcx
108 xor rax, rax
110 mov ecx, 0x80000000 ; Bit 31 must be set
112 os_pci_dump_devices_check_next:
113 mov eax, ecx
114 mov dx, PCI_CONFIG_ADDRESS
115 out dx, eax
116 mov dx, PCI_CONFIG_DATA
117 in eax, dx ; EAX now holds the Device and Vendor ID
118 cmp eax, 0xffffffff ; 0xFFFFFFFF means no device present on that Bus and Slot
119 je os_pci_dump_devices_nothing_there
120 call os_debug_dump_eax ; Print the Device and Vendor ID (DDDDVVVV)
121 call os_print_newline
122 os_pci_dump_devices_nothing_there:
123 add ecx, 0x800
124 cmp ecx, 0x81000000 ; The end has been reached (already looked at 8192 devices)
125 jne os_pci_dump_devices_check_next
127 os_pci_dump_devices_end:
128 pop rax
129 pop rbx
130 pop rcx
131 pop rdx
133 ; -----------------------------------------------------------------------------
136 ;Configuration Mechanism One has two IO port rages associated with it.
137 ;The address port (0xcf8-0xcfb) and the data port (0xcfc-0xcff).
138 ;A configuration cycle consists of writing to the address port to specify which device and register you want to access and then reading or writing the data to the data port.
140 PCI_CONFIG_ADDRESS EQU 0x0CF8
141 PCI_CONFIG_DATA EQU 0x0CFC
143 ;ddress dd 10000000000000000000000000000000b
144 ; /\ /\ /\ /\ /\ /\
145 ; E Res Bus Dev F Reg 0
146 ; Bits
147 ; 31 Enable bit = set to 1
148 ; 30 - 24 Reserved = set to 0
149 ; 23 - 16 Bus number = 256 options
150 ; 15 - 11 Device/Slot number = 32 options
151 ; 10 - 8 Function number = will leave at 0 (8 options)
152 ; 7 - 2 Register number = will leave at 0 (64 options) 64 x 4 bytes = 256 bytes worth of accessible registers
153 ; 1 - 0 Set to 0
156 ; =============================================================================
157 ; EOF