i386/i386.reference/CLTS.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Opcode CLTS</TITLE>
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   8 Chapter 17 -- 80386 Instruction Set</A><BR>
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  13 <P>
  14 <H1>CLTS -- Clear Task-Switched Flag in CR0</H1>
  15
  16 <PRE>
  17 Opcode    Instruction    Clocks   Description
  18
  19 OF  06    CLTS           5        Clear task-switched flag
  20 </PRE>
  21
  22
  23 <H2>Operation</H2>
  24
  25 <PRE>
  26 TS Flag in CR0 := 0;
  27 </PRE>
  28
  29 <H2>Description</H2>
  30
  31 CLTS clears the task-switched (TS) flag in register CR0. This flag is set by
  32 the 80386 every time a task switch occurs. The TS flag is used to manage
  33 processor extensions as follows:
  34 <UL>
  35   <LI> Every execution of an ESC instruction is trapped if the TS flag is set.
  36
  37   <LI>  Execution of a WAIT instruction is trapped if the MP flag and the TS
  38      flag are both set.
  39 </UL>
  40
  41 Thus, if a task switch was made after an ESC instruction was begun, the
  42 processor extension's context may need to be saved before a new ESC
  43 instruction can be issued. The fault handler saves the context and resets
  44 the TS flag.
  45 <P>
  46 CLTS appears in operating system software, not in application programs. It
  47 is a privileged instruction that can only be executed at privilege level 0.
  48
  49 <H2>Flags Affected</H2>
  50
  51 TS := 0 (TS is in CR0, not the flag register)
  52
  53 <H2>Protected Mode Exceptions</H2>
  54
  55 #GP(0) if CLTS is executed with a current privilege level other than 0
  56
  57 <H2>Real Address Mode Exceptions</H2>
  58
  59 None (valid in Real Address Mode to allow initialization for Protected
  60 Mode)
  61
  62 <H2>Virtual 8086 Mode Exceptions</H2>
  63
  64 Same exceptions as in Real Address Mode
  65
  66
  67 <P>
  68 <HR>
  69 <P>
  70 <B>up:</B> <A HREF="c17.htm">
  71 Chapter 17 -- 80386 Instruction Set</A><BR>
  72 <B>prev:</B><A HREF="CLI.htm"> CLI Clear Interrupt Flag</A><BR>
  73 <B>next:</B><A HREF="CMC.htm"> CMC Complement Carry Flag</A>
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