1 <!DOCTYPE HTML PUBLIC
"-//IETF//DTD HTML 2.0//EN">
4 <TITLE>80386 Programmer's Reference Manual -- Section
1.1</TITLE>
7 <B>up:
</B> <A HREF=
"c01.htm">
8 Chapter
1 -- Introduction to the
80386</A><BR>
9 <B>prev:
</B> <A HREF=
"c01.htm">Chapter
1 -- Introduction to the
80386</A><BR>
10 <B>next:
</B> <A HREF=
"s01_02.htm">1.2 Related Literature
</A>
14 <H1>1.1 Organization of This Manual
</H1>
15 This book presents the architecture of the
80386 in five parts:
17 <LI><A HREF=
"PI.htm">Part I -- Applications Programming
</A>
18 <LI><A HREF=
"PII.htm">Part II -- Systems Programming
</A>
19 <LI><A HREF=
"PIII.htm">Part III -- Compatibility
</A>
20 <LI><A HREF=
"PIV.htm">Part IV -- Instruction Set
</A>
21 <LI><A HREF=
"APP.htm">Appendices
</A>
24 These divisions are determined in part by the architecture itself and in
25 part by the different ways the book will be used. As the following table
26 indicates, the latter two parts are intended as reference material for
27 programmers actually engaged in the process of developing software for the
28 80386. The first three parts are explanatory, showing the purpose of
29 architectural features, developing terminology and concepts, and describing
30 instructions as they relate to specific purposes or to specific
31 architectural features.
35 <LI><A HREF=
"PI.htm">Part I -- Applications Programming
</A>
36 <LI><A HREF=
"PII.htm">Part II -- Systems Programming
</A>
37 <LI><A HREF=
"PIII.htm">Part III -- Compatibility
</A>
41 <LI><A HREF=
"PIV.htm">Part IV -- Instruction Set
</A>
42 <LI><A HREF=
"APP.htm">Appendices
</A>
46 The first three parts follow the execution modes and protection features of
47 the
80386 CPU. The distinction between applications features and systems
48 features is determined by the protection mechanism of the
80386. One purpose
49 of protection is to prevent applications from interfering with the operating
50 system; therefore, the processor makes certain registers and instructions
51 inaccessible to applications programs. The features discussed in Part I are
52 those that are accessible to applications; the features in Part II are
53 available only to systems software that has been given special privileges or
54 in unprotected systems.
56 The processing mode of the
80386 also determines the features that are
57 accessible. The
80386 has three processing modes:
61 <LI> Real-Address Mode.
62 <LI> Virtual
8086 Mode.
65 Protected mode is the natural
32-bit environment of the
80386 processor. In
66 this mode all instructions and features are available.
68 Real-address mode (often called just
"real mode") is the mode of the
69 processor immediately after RESET. In real mode the
80386 appears to
70 programmers as a fast
8086 with some new instructions. Most applications of
71 the
80386 will use real mode for initialization only.
73 Virtual
8086 mode (also called V86 mode) is a dynamic mode in the sense
74 that the processor can switch repeatedly and rapidly between V86 mode and
75 protected mode. The CPU enters V86 mode from protected mode to execute an
76 8086 program, then leaves V86 mode and enters protected mode to continue
77 executing a native
80386 program.
79 The features that are available to applications programs in protected mode
80 and to all programs in V86 mode are the same. These features form the
81 content of Part I. The additional features that are available to systems
82 software in protected mode form Part II. Part III explains real-address
83 mode and V86 mode, as well as how to execute a mix of
32-bit and
16-bit
86 <DT>Available in All Modes
87 <DD><A HREF=
"PI.htm">Part I -- Applications Programming
</A>
89 <DT>Available in Protected Mode Only
90 <DD><A HREF=
"PII.htm">Part II -- Systems Programming
</A>
92 <DT>Compatibility Modes
93 <DD><A HREF=
"PIII.htm">Part III -- Compatibility
</A>
96 <H2>1.1.1 <A HREF=
"PI.htm">Part I -- Applications Programming
</A></H2>
98 This part presents those aspects of the architecture that are customarily
99 used by applications programmers.
101 <H4><A HREF=
"c02.htm">Chapter
2 -- Basic Programming Model:
</A></H4>
102 Introduces the models of memory
103 organization. Defines the data types. Presents the register set used by
104 applications. Introduces the stack. Explains string operations. Defines the
105 parts of an instruction. Explains addressing calculations. Introduces
106 interrupts and exceptions as they may apply to applications programming.
108 <H4><A HREF=
"c03.htm">Chapter
3 -- Application Instruction Set:
</A></H4>
109 Surveys the instructions commonly
110 used for applications programming. Considers instructions in functionally
111 related groups; for example, string instructions are considered in one
112 section, while control-transfer instructions are considered in another.
113 Explains the concepts behind the instructions. Details of individual
114 instructions are deferred until Part IV, the instruction-set reference.
117 <H2>1.1.2 <A HREF=
"PII.htm">Part II -- Systems Programming
</A></H2>
119 This part presents those aspects of the architecture that are customarily
120 used by programmers who write operating systems, device drivers, debuggers,
121 and other software that supports applications programs in the protected mode
124 <H4><A HREF=
"c04.htm">Chapter
4 -- Systems Architecture:
</A></H4>
125 Surveys the features of the
80386 that
126 are used by systems programmers. Introduces the remaining registers and data
127 structures of the
80386 that were not discussed in Part I. Introduces the
128 systems-oriented instructions in the context of the registers and data
129 structures they support. Points to the chapter where each register, data
130 structure, and instruction is considered in more detail.
132 <H4><A HREF=
"c05.htm">Chapter
5 -- Memory Management:
</A></H4>
133 Presents details of the data structures,
134 registers, and instructions that support virtual memory and the concepts of
135 segmentation and paging. Explains how systems designers can choose a model
136 of memory organization ranging from completely linear (
"flat") to fully
139 <H4><A HREF=
"c06.htm">Chapter
6 -- Protection:
</A></H4>
140 Expands on the memory management features of the
141 80386 to include protection as it applies to both segments and pages.
142 Explains the implementation of privilege rules, stack switching, pointer
143 validation, user and supervisor modes. Protection aspects of multitasking
144 are deferred until the following chapter.
146 <H4><A HREF=
"c07.htm">Chapter
7 -- Multitasking:
</A></H4>
147 Explains how the hardware of the
80386
149 multitasking with context-switching operations and intertask protection.
151 <H4><A HREF=
"c08.htm">Chapter
8 -- Input/Output:
</A></H4>
152 Reveals the I/O features of the
80386, including
153 I/O instructions, protection as it relates to I/O, and the I/O permission
156 <H4><A HREF=
"c09.htm">Chapter
9 -- Exceptions and Interrupts:
</A></H4>
157 Explains the basic interrupt
158 mechanisms of the
80386. Shows how interrupts and exceptions relate to
159 protection. Discusses all possible exceptions, listing causes and including
160 information needed to handle and recover from the exception.
162 <H4><A HREF=
"c10.htm">Chapter
10 -- Initialization:
</A></H4>
163 Defines the condition of the processor after
164 RESET or power-up. Explains how to set up registers, flags, and data
165 structures for either real-address mode or protected mode. Contains an
166 example of an initialization program.
168 <H4><A HREF=
"c11.htm">Chapter
11 -- Coprocessing and Multiprocessing:
</A></H4>
169 Explains the instructions
170 and flags that support a numerics coprocessor and multiple CPUs with shared
173 <H4><A HREF=
"c12.htm">Chapter
12 -- Debugging:
</A></H4>
174 Tells how to use the debugging registers of
178 <H2>1.1.3 <A HREF=
"PIII.htm">Part III -- Compatibility
</A></H2>
180 Other parts of the book treat the processor primarily as a
32-bit machine,
181 omitting for simplicity its facilities for
16-bit operations. Indeed, the
182 80386 is a
32-bit machine, but its design fully supports
16-bit operands and
183 addressing, too. This part completes the picture of the
80386 by explaining
184 the features of the architecture that support
16-bit programs and
16-bit
185 operations in
32-bit programs. All three processor modes are used to
186 execute
16-bit programs: protected mode can directly execute
16-bit
80286
187 protected mode programs, real mode executes
8086 programs and real-mode
188 80286 programs, and virtual
8086 mode executes
8086 programs in a
189 multitasking environment with other
80386 protected-mode programs. In
190 addition,
32-bit and
16-bit modules and individual
32-bit and
16-bit
191 operations can be mixed in protected mode.
194 <A HREF=
"c13.htm">Chapter
13 -- Executing
80286 Protected-Mode Code:
</A></H4>
195 In its protected mode,
196 the
80386 can execute complete
80286 protected-mode systems, because
80286
197 capabilities are a subset of
80386 capabilities.
199 <H4><A HREF=
"c14.htm">Chapter
14 --
80386 Real-Address Mode:
</A></H4>
200 Explains the real mode of the
80386
201 CPU. In this mode the
80386 appears as a fast real-mode
80286 or fast
8086
202 enhanced with additional instructions.
204 <H4><A HREF=
"c15.htm">Chapter
15 -- Virtual
8086 Mode:
</A></H4>
205 The
80386 can switch rapidly between its
206 protected mode and V86 mode, giving it the ability to multiprogram
8086
207 programs along with
"native mode" 32-bit programs.
209 <H4><A HREF=
"c16.htm">Chapter
16 -- Mixing
16-Bit and
32-Bit Code:
</A></H4>
210 Even within a program or
212 the
80386 can mix
16-bit and
32-bit modules. Furthermore, any given module
213 can utilize both
16-bit and
32-bit operands and addresses.
216 <H2>1.1.4 <A HREF=
"PIV.htm">Part IV -- Instruction Set
</A></H2>
218 Parts I, II, and III present overviews of the instructions as they relate
219 to specific aspects of the architecture, but this part presents the
220 instructions in alphabetical order, providing the detail needed by
221 assembly-language programmers and programmers of debuggers, compilers,
222 operating systems, etc. Instruction descriptions include algorithmic
223 description of operation, effect of flag settings, effect on flag settings,
224 effect of operand- or address-size attributes, effect of processor modes,
225 and possible exceptions.
228 <H2>1.1.5 <A HREF=
"APP.htm">Appendices
</A></H2>
230 The appendices present tables of encodings and other details in a format
231 designed for quick reference by assembly-language and systems programmers.
235 <B>up:
</B> <A HREF=
"c01.htm">
236 Chapter
1 -- Introduction to the
80386</A><BR>
237 <B>prev:
</B> <A HREF=
"c01.htm">Chapter
1 -- Introduction to the
80386</A><BR>
238 <B>next:
</B> <A HREF=
"s01_02.htm">1.2 Related Literature
</A>