i386/i386.reference/s03_09.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Section 3.9</TITLE>
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   7 <B>up:</B> <A HREF="c03.htm">
   8 Chapter 3 -- Applications Instruction Set</A><BR>
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  13 <P>
  14 <H1>3.9  Coprocessor Interface Instructions</H1>
  15 A numerics coprocessor (e.g., the 80387 or 80287) provides an extension to
  16 the instruction set of the base architecture. The coprocessor extends the
  17 instruction set of the base architecture to support high-precision integer
  18 and floating-point calculations. This extended instruction set includes
  19 arithmetic, comparison, transcendental, and data transfer instructions. The
  20 coprocessor also contains a set of useful constants to enhance the speed of
  21 numeric calculations.
  22 <P>
  23 A program contains instructions for the coprocessor in line with the
  24 instructions for the CPU. The system executes these instructions in the same
  25 order as they appear in the instruction stream. The coprocessor operates
  26 concurrently with the CPU to provide maximum throughput for numeric
  27 calculations.
  28 <P>
  29 The 80386 also has features to support emulation of the numerics
  30 coprocessor when the coprocessor is absent. The software emulation of the
  31 coprocessor is transparent to application software but requires more time
  32 for execution . Refer to
  33 <A HREF="c11.htm">Chapter 11</A>
  34    for more information on coprocessor
  35 emulation.
  36 <P>
  37 ESC (Escape) is a 5-bit sequence that begins the opcodes that identify
  38 floating point numeric instructions. The ESC pattern tells the 80386 to send
  39 the opcode and addresses of operands to the numerics coprocessor. The
  40 numerics coprocessor uses the escape instructions to perform
  41 high-performance, high-precision floating point arithmetic that conforms to
  42 the IEEE floating point standard 754.
  43 <P>
  44 <A HREF="WAIT.htm">WAIT</A> (Wait)
  45 is an 80386 instruction that suspends program execution until
  46 the 80386 CPU detects that the BUSY pin is inactive. This condition
  47 indicates that the coprocessor has completed its processing task and that
  48 the CPU may obtain the results.
  49 <P>
  50 <A NAME="fig3-23">
  51 <IMG align=center SRC="fig3-23.gif" border=0>
  52 <P>
  53 <HR>
  54 <P>
  55 <B>up:</B> <A HREF="c03.htm">
  56 Chapter 3 -- Applications Instruction Set</A><BR>
  57 <B>prev:</B> <A HREF="s03_08.htm">3.8  Flag Control Instructions</A><BR>
  58 <B>next:</B> <A HREF="s03_10.htm">3.10  Segment Register Instructions</A>
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