i386/i386.reference/s07_04.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Section 7.4</TITLE>
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   8 Chapter 7 -- Multitasking</A><BR>
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  13 <P>
  14 <H1>7.4  Task Gate Descriptor</H1>
  15 A task gate descriptor provides an indirect, protected reference to a TSS.
  16
  17 <A HREF="#fig7-4">Figure 7-4</A>
  18   illustrates the format of a task gate.
  19 <P>
  20 The SELECTOR field of a task gate must refer to a TSS descriptor. The value
  21 of the RPL in this selector is not used by the processor.
  22 <P>
  23 The DPL field of a task gate controls the right to use the descriptor to
  24 cause a task switch. A procedure may not select a task gate descriptor
  25 unless the maximum of the selector's RPL and the CPL of the procedure is
  26 numerically less than or equal to the DPL of the descriptor. This constraint
  27 prevents untrusted procedures from causing a task switch. (Note that when a
  28 task gate is used, the DPL of the target TSS descriptor is not used for
  29 privilege checking.)
  30 <P>
  31 A procedure that has access to a task gate has the power to cause a task
  32 switch, just as a procedure that has access to a TSS descriptor. The 80386
  33 has task gates in addition to TSS descriptors to satisfy three needs:
  34 <OL>
  35 <LI> The need for a task to have a single busy bit. Because the busy-bit
  36 is stored in the TSS descriptor, each task should have only one such
  37 descriptor. There may, however, be several task gates that select the
  38 single TSS descriptor.
  39 <LI> The need to provide selective access to tasks. Task gates fulfill
  40 this need, because they can reside in LDTs and can have a DPL that is
  41 different from the TSS descriptor's DPL. A procedure that does not
  42 have sufficient privilege to use the TSS descriptor in the GDT (which
  43 usually has a DPL of 0) can still switch to another task if it has
  44 access to a task gate for that task in its LDT. With task gates,
  45 systems software can limit the right to cause task switches to
  46 specific tasks.
  47 <LI> The need for an interrupt or exception to cause a task switch. Task
  48 gates may also reside in the IDT, making it possible for interrupts
  49 and exceptions to cause task switching. When interrupt or exception
  50 vectors to an IDT entry that contains a task gate, the 80386 switches
  51 to the indicated task. Thus, all tasks in the system can benefit from
  52 the protection afforded by isolation from interrupt tasks.
  53 </OL>
  54
  55 <A HREF="#fig7-5">Figure 7-5</A>
  56   illustrates how both a task gate in an LDT and a task gate in
  57 the IDT can identify the same task.
  58 <P>
  59 <A NAME="fig7-4">
  60 <IMG align=center SRC="fig7-4.gif" border=0>
  61 <HR>
  62 <A NAME="fig7-5">
  63 <IMG align=center SRC="fig7-5.gif" border=0>
  64
  65 <P>
  66 <HR>
  67 <P>
  68 <B>up:</B> <A HREF="c07.htm">
  69 Chapter 7 -- Multitasking</A><BR>
  70 <B>prev:</B> <A HREF="s07_03.htm">7.3  Task Register</A><BR>
  71 <B>next:</B> <A HREF="s07_05.htm">7.5  Task Switching</A>
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