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14 <H1>10.1 Processor State After Reset
</H1>
15 The contents of EAX depend upon the results of the power-up self test. The
16 self-test may be requested externally by assertion of BUSY# at the end of
17 RESET. The EAX register holds zero if the
80386 passed the test. A nonzero
18 value in EAX after self-test indicates that the particular
80386 unit is
19 faulty. If the self-test is not requested, the contents of EAX after RESET
22 DX holds a component identifier and revision number after RESET as
23 <A HREF=
"#fig10-1">Figure
10-
1</A>
24 illustrates. DH contains
3, which indicates an
80386 component. DL
25 contains a unique identifier of the revision level.
27 Control register zero (CR0) contains the values shown in
28 <A HREF=
"#fig10-2">Figure
10-
2</A>
30 ET bit of CR0 is set if an
80387 is present in the configuration (according
31 to the state of the ERROR# pin after RESET). If ET is reset, the
32 configuration either contains an
80287 or does not contain a coprocessor. A
33 software test is required to distinguish between these latter two
36 The remaining registers and flags are set as follows:
50 All registers not mentioned above are undefined.
52 These settings imply that the processor begins in real-address mode with
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