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3 <HEAD>
4 <TITLE>80386 Programmer's Reference Manual -- Section 12.1</TITLE>
5 </HEAD>
6 <BODY>
7 <B>up:</B> <A HREF="c12.htm">
8 Chapter 12 -- Debugging</A><BR>
9 <B>prev:</B> <A HREF="c12.htm">Chapter 12 -- Debugging</A><BR>
10 <B>next:</B> <A HREF="s12_02.htm">12.2 Debug Registers</A>
11 <P>
12 <HR>
13 <P>
14 <H1>12.1 Debugging Features of the Architecture</H1>
15 The features of the 80386 architecture that support debugging include:
16 <DL>
17 <DT>
18 Reserved debug interrupt vector
19 <DD>
20 Permits processor to automatically invoke a debugger task or procedure when
21 an event occurs that is of interest to the debugger.
22 <DT>
23 Four debug address registers
24 <DD>
25 Permit programmers to specify up to four addresses that the CPU will
26 automatically monitor.
27 <DT>
28 Debug control register
29 <DD>
30 Allows programmers to selectively enable various debug conditions
31 associated with the four debug addresses.
32 <DT>
33 Debug status register
34 <DD>
35 Helps debugger identify condition that caused debug exception.
36 <DT>
37 Trap bit of TSS (T-bit)
38 <DD>
39 Permits monitoring of task switches.
40 <DT>
41 Resume flag (RF) of flags register
42 <DD>
43 Allows an instruction to be restarted after a debug exception without
44 immediately causing another debug exception due to the same condition.
45 <DT>
46 Single-step flag (TF)
47 <DD>
48 Allows complete monitoring of program flow by specifying whether the CPU
49 should cause a debug exception with the execution of every instruction.
50 <DT>
51 Breakpoint instruction
52 <DD>
53 Permits debugger intervention at any point in program execution and aids
54 debugging of debugger programs.
55 <DT>
56 Reserved interrupt vector for breakpoint exception
57 <DD>
58 Permits processor to automatically invoke a handler task or procedure upon
59 encountering a breakpoint instruction.
60 </DL>
61 These features make it possible to invoke a debugger that is either a
62 separate task or a procedure in the context of the current task. The
63 debugger can be invoked under any of the following kinds of conditions:
64 <UL>
65 <LI> Task switch to a specific task.
66 <LI> Execution of the breakpoint instruction.
67 <LI> Execution of every instruction.
68 <LI> Execution of any instruction at a given address.
69 <LI> Read or write of a byte, word, or doubleword at any specified address.
70 <LI> Write to a byte, word, or doubleword at any specified address.
71 <LI> Attempt to change a debug register.
72 </UL>
73 <P>
74 <HR>
75 <P>
76 <B>up:</B> <A HREF="c12.htm">
77 Chapter 12 -- Debugging</A><BR>
78 <B>prev:</B> <A HREF="c12.htm">Chapter 12 -- Debugging</A><BR>
79 <B>next:</B> <A HREF="s12_02.htm">12.2 Debug Registers</A>
80 </BODY>