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3 <HEAD>
4 <TITLE>80386 Programmer's Reference Manual -- Section 15.4</TITLE>
5 </HEAD>
6 <BODY>
7 <B>up:</B> <A HREF="c15.htm">
8 Chapter 15 -- Virtual 8086 Mode</A><BR>
9 <B>prev:</B> <A HREF="s15_03.htm">15.3 Entering and Leaving V86 Mode</A><BR>
10 <B>next:</B> <A HREF="s15_05.htm">15.5 Virtual I/O</A>
11 <P>
12 <HR>
13 <P>
14 <H1>15.4 Additional Sensitive Instructions</H1>
15 When the 80386 is executing in V86 mode, the instructions
16 <A HREF="PUSHF.htm">PUSHF</A>,
17 <A HREF="POPF.htm">POPF</A>,
18 <A HREF="INT.htm">INT n</A>, and
19 <A HREF="IRET.htm">IRET</A> are sensitive to IOPL. The instructions
20 <A HREF="IN.htm">IN</A>,
21 <A HREF="INS.htm">INS</A>,
22 <A HREF="OUT.htm">OUT</A>, and
23 <A HREF="OUTS.htm">OUTS</A>,
24 which are ordinarily sensitive in protected mode, are not sensitive
25 in V86 mode. Following is a complete list of instructions that are sensitive
26 in V86 mode:
27 <UL>
28 <LI> <A HREF="CLI.htm">CLI</A> -- Clear Interrupt-Enable Flag
29 <LI> <A HREF="STI.htm">STI</A> -- Set Interrupt-Enable Flag
30 <LI> <A HREF="LOCK.htm">LOCK</A> -- Assert Bus-Lock Signal
31 <LI> <A HREF="PUSHF.htm">PUSHF</A> -- Push Flags
32 <LI> <A HREF="POPF.htm">POPF</A> -- Pop Flags
33 <LI> <A HREF="INT.htm">INT n</A> -- Software Interrupt
34 <LI> <A HREF="RET.htm">RET</A> -- Interrupt Return
35 </UL>
36 CPL is always three in V86 mode; therefore, if IOPL < 3, these instructions
37 will trigger a general-protection exceptions. These instructions are made
38 sensitive so that their functions can be simulated by the V86 monitor.
40 <H2>15.4.1 Emulating 8086 Operating System Calls</H2>
41 <A HREF="INT.htm">INT n</A>
42 is sensitive so that the V86 monitor can intercept calls to the
43 8086 OS. Many 8086 operating systems are called by pushing parameters onto
44 the stack, then executing an
45 <A HREF="INT.htm">INT n</A> instruction. If IOPL < 3,
46 <A HREF="INT.htm">INT n</A>
47 instructions will be intercepted by the V86 monitor. The V86 monitor can
48 then emulate the function of the 8086 operating system or reflect the
49 interrupt back to the 8086 operating system in V86 mode.
51 <H2>15.4.2 Virtualizing the Interrupt-Enable Flag</H2>
52 When the processor is executing 8086 code in a V86 task, the instructions
53 <A HREF="PUSHF.htm">PUSHF</A>,
54 <A HREF="POPF.htm">POPF</A>, and
55 <A HREF="IRET.htm">IRET</A> are sensitive to IOPL so that the V86 monitor can
56 control changes to the interrupt-enable flag (IF). Other instructions that
57 affect IF
58 (<A HREF="STI.htm">STI</A> and
59 <A HREF="CLI.htm">CLI</A>) are IOPL sensitive both in 8086 code and in
60 80386/80386 code.
61 <P>
62 Many 8086 programs that were designed to execute on single-task systems set
63 and clear IF to control interrupts. However, when these same programs are
64 executed in a multitasking environment, such control of IF can be
65 disruptive. If IOPL is less than three, all instructions that change or
66 interrogate IF will trap to the V86 monitor. The V86 monitor can then
67 control IF in a manner that both suits the needs of the larger environment
68 and is transparent to the 8086 program.
69 <P>
70 <HR>
71 <P>
72 <B>up:</B> <A HREF="c15.htm">
73 Chapter 15 -- Virtual 8086 Mode</A><BR>
74 <B>prev:</B> <A HREF="s15_03.htm">15.3 Entering and Leaving V86 Mode</A><BR>
75 <B>next:</B> <A HREF="s15_05.htm">15.5 Virtual I/O</A>
76 </BODY>