i386/linux/linux-2.3.21/drivers/isdn/avmb1/avmcard.h

   1 /*
   2  * $Id: avmcard.h,v 1.4 1999/08/04 10:10:08 calle Exp $
   3  *
   4  * Copyright 1999 by Carsten Paeth (calle@calle.in-berlin.de)
   5  *
   6  * $Log: avmcard.h,v $
   7  * Revision 1.4  1999/08/04 10:10:08  calle
   8  * Bugfix: corrected /proc functions, added structure for new AVM cards.
   9  *
  10  * Revision 1.3  1999/07/23 08:41:47  calle
  11  * prepared for new AVM cards.
  12  *
  13  * Revision 1.2  1999/07/05 15:09:45  calle
  14  * - renamed "appl_release" to "appl_released".
  15  * - version und profile data now cleared on controller reset
  16  * - extended /proc interface, to allow driver and controller specific
  17  *   informations to include by driver hackers.
  18  *
  19  * Revision 1.1  1999/07/01 15:26:22  calle
  20  * complete new version (I love it):
  21  * + new hardware independed "capi_driver" interface that will make it easy to:
  22  *   - support other controllers with CAPI-2.0 (i.e. USB Controller)
  23  *   - write a CAPI-2.0 for the passive cards
  24  *   - support serial link CAPI-2.0 boxes.
  25  * + wrote "capi_driver" for all supported cards.
  26  * + "capi_driver" (supported cards) now have to be configured with
  27  *   make menuconfig, in the past all supported cards where included
  28  *   at once.
  29  * + new and better informations in /proc/capi/
  30  * + new ioctl to switch trace of capi messages per controller
  31  *   using "avmcapictrl trace [contr] on|off|...."
  32  * + complete testcircle with all supported cards and also the
  33  *   PCMCIA cards (now patch for pcmcia-cs-3.0.13 needed) done.
  34  *
  35  */
  36
  37 #ifndef _AVMCARD_H_
  38 #define _AVMCARD_H_
  39
  40 #define AVMB1_PORTLEN           0x1f
  41 #define AVM_MAXVERSION          8
  42 #define AVM_NAPPS               30
  43 #define AVM_NCCI_PER_CHANNEL    4
  44
  45 /*
  46  * Versions
  47  */
  48
  49 #define VER_DRIVER      0
  50 #define VER_CARDTYPE    1
  51 #define VER_HWID        2
  52 #define VER_SERIAL      3
  53 #define VER_OPTION      4
  54 #define VER_PROTO       5
  55 #define VER_PROFILE     6
  56 #define VER_CAPI        7
  57
  58 enum avmcardtype {
  59         avm_b1isa,
  60         avm_b1pci,
  61         avm_b1pcmcia,
  62         avm_m1,
  63         avm_m2,
  64         avm_t1isa,
  65         avm_t1pci,
  66         avm_c4
  67 };
  68
  69 typedef struct avmcard_dmainfo {
  70         __u32 recvlen;
  71         __u8  recvbuf[128+2048];
  72         struct sk_buff_head send_queue;
  73         __u8  sendbuf[128+2048];
  74 } avmcard_dmainfo;
  75
  76 typedef struct avmcard {
  77         char name[32];
  78         unsigned int port;
  79         unsigned irq;
  80         unsigned long membase;
  81         enum avmcardtype cardtype;
  82         int cardnr; /* for t1isa */
  83
  84         int versionlen;
  85         char versionbuf[1024];
  86         char *version[AVM_MAXVERSION];
  87
  88         char cardname[32];
  89
  90         char infobuf[128];      /* for function procinfo */
  91         char msgbuf[128];       /* capimsg msg part */
  92         char databuf[2048];     /* capimsg data part */
  93
  94         int interrupt;
  95
  96         void *mbase;
  97         __u32 csr;
  98         avmcard_dmainfo *dma;
  99
 100         struct capi_ctr *ctrl;
 101 } avmcard;
 102
 103 extern int b1_irq_table[16];
 104
 105 /*
 106  * LLI Messages to the ISDN-ControllerISDN Controller
 107  */
 108
 109 #define SEND_POLL               0x72    /*
 110                                            * after load <- RECEIVE_POLL
 111                                          */
 112 #define SEND_INIT               0x11    /*
 113                                            * first message <- RECEIVE_INIT
 114                                            * int32 NumApplications  int32
 115                                            * NumNCCIs int32 BoardNumber
 116                                          */
 117 #define SEND_REGISTER           0x12    /*
 118                                            * register an application int32
 119                                            * ApplIDId int32 NumMessages
 120                                            * int32 NumB3Connections int32
 121                                            * NumB3Blocks int32 B3Size
 122                                            *
 123                                            * AnzB3Connection != 0 &&
 124                                            * AnzB3Blocks >= 1 && B3Size >= 1
 125                                          */
 126 #define SEND_RELEASE            0x14    /*
 127                                            * deregister an application int32
 128                                            * ApplID
 129                                          */
 130 #define SEND_MESSAGE            0x15    /*
 131                                            * send capi-message int32 length
 132                                            * capi-data ...
 133                                          */
 134 #define SEND_DATA_B3_REQ        0x13    /*
 135                                            * send capi-data-message int32
 136                                            * MsgLength capi-data ... int32
 137                                            * B3Length data ....
 138                                          */
 139
 140 #define SEND_CONFIG             0x21    /*
 141                                          */
 142
 143 #define SEND_POLLACK            0x73    /* T1 Watchdog */
 144
 145 /*
 146  * LLI Messages from the ISDN-ControllerISDN Controller
 147  */
 148
 149 #define RECEIVE_POLL            0x32    /*
 150                                            * <- after SEND_POLL
 151                                          */
 152 #define RECEIVE_INIT            0x27    /*
 153                                            * <- after SEND_INIT int32 length
 154                                            * byte total length b1struct board
 155                                            * driver revision b1struct card
 156                                            * type b1struct reserved b1struct
 157                                            * serial number b1struct driver
 158                                            * capability b1struct d-channel
 159                                            * protocol b1struct CAPI-2.0
 160                                            * profile b1struct capi version
 161                                          */
 162 #define RECEIVE_MESSAGE         0x21    /*
 163                                            * <- after SEND_MESSAGE int32
 164                                            * AppllID int32 Length capi-data
 165                                            * ....
 166                                          */
 167 #define RECEIVE_DATA_B3_IND     0x22    /*
 168                                            * received data int32 AppllID
 169                                            * int32 Length capi-data ...
 170                                            * int32 B3Length data ...
 171                                          */
 172 #define RECEIVE_START           0x23    /*
 173                                            * Handshake
 174                                          */
 175 #define RECEIVE_STOP            0x24    /*
 176                                            * Handshake
 177                                          */
 178 #define RECEIVE_NEW_NCCI        0x25    /*
 179                                            * int32 AppllID int32 NCCI int32
 180                                            * WindowSize
 181                                          */
 182 #define RECEIVE_FREE_NCCI       0x26    /*
 183                                            * int32 AppllID int32 NCCI
 184                                          */
 185 #define RECEIVE_RELEASE         0x26    /*
 186                                            * int32 AppllID int32 0xffffffff
 187                                          */
 188 #define RECEIVE_TASK_READY      0x31    /*
 189                                            * int32 tasknr
 190                                            * int32 Length Taskname ...
 191                                          */
 192 #define RECEIVE_DEBUGMSG        0x71    /*
 193                                            * int32 Length message
 194                                            *
 195                                          */
 196 #define RECEIVE_POLLDWORD       0x75    /* t1pci in dword mode */
 197
 198 #define WRITE_REGISTER          0x00
 199 #define READ_REGISTER           0x01
 200
 201 /*
 202  * port offsets
 203  */
 204
 205 #define B1_READ                 0x00
 206 #define B1_WRITE                0x01
 207 #define B1_INSTAT               0x02
 208 #define B1_OUTSTAT              0x03
 209 #define B1_RESET                0x10
 210 #define B1_ANALYSE              0x04
 211
 212
 213 #define B1_STAT0(cardtype)  ((cardtype) == avm_m1 ? 0x81200000l : 0x80A00000l)
 214 #define B1_STAT1(cardtype)  (0x80E00000l)
 215
 216 /* ---------------------------------------------------------------- */
 217
 218 static inline unsigned char b1outp(unsigned int base,
 219                                    unsigned short offset,
 220                                    unsigned char value)
 221 {
 222         outb(value, base + offset);
 223         return inb(base + B1_ANALYSE);
 224 }
 225
 226
 227 static inline int b1_rx_full(unsigned int base)
 228 {
 229         return inb(base + B1_INSTAT) & 0x1;
 230 }
 231
 232 static inline unsigned char b1_get_byte(unsigned int base)
 233 {
 234         unsigned long stop = jiffies + 1 * HZ;  /* maximum wait time 1 sec */
 235         while (!b1_rx_full(base) && time_before(jiffies, stop));
 236         if (b1_rx_full(base))
 237                 return inb(base + B1_READ);
 238         printk(KERN_CRIT "b1lli(0x%x): rx not full after 1 second\n", base);
 239         return 0;
 240 }
 241
 242 static inline unsigned int b1_get_word(unsigned int base)
 243 {
 244         unsigned int val = 0;
 245         val |= b1_get_byte(base);
 246         val |= (b1_get_byte(base) << 8);
 247         val |= (b1_get_byte(base) << 16);
 248         val |= (b1_get_byte(base) << 24);
 249         return val;
 250 }
 251
 252 static inline int b1_tx_empty(unsigned int base)
 253 {
 254         return inb(base + B1_OUTSTAT) & 0x1;
 255 }
 256
 257 static inline void b1_put_byte(unsigned int base, unsigned char val)
 258 {
 259         while (!b1_tx_empty(base));
 260         b1outp(base, B1_WRITE, val);
 261 }
 262
 263 static inline int b1_save_put_byte(unsigned int base, unsigned char val)
 264 {
 265         unsigned long stop = jiffies + 2 * HZ;
 266         while (!b1_tx_empty(base) && time_before(jiffies,stop));
 267         if (!b1_tx_empty(base)) return -1;
 268         b1outp(base, B1_WRITE, val);
 269         return 0;
 270 }
 271
 272 static inline void b1_put_word(unsigned int base, unsigned int val)
 273 {
 274         b1_put_byte(base, val & 0xff);
 275         b1_put_byte(base, (val >> 8) & 0xff);
 276         b1_put_byte(base, (val >> 16) & 0xff);
 277         b1_put_byte(base, (val >> 24) & 0xff);
 278 }
 279
 280 static inline unsigned int b1_get_slice(unsigned int base,
 281                                         unsigned char *dp)
 282 {
 283         unsigned int len, i;
 284
 285         len = i = b1_get_word(base);
 286         while (i-- > 0) *dp++ = b1_get_byte(base);
 287         return len;
 288 }
 289
 290 static inline void b1_put_slice(unsigned int base,
 291                                 unsigned char *dp, unsigned int len)
 292 {
 293         unsigned i = len;
 294         b1_put_word(base, i);
 295         while (i-- > 0)
 296                 b1_put_byte(base, *dp++);
 297 }
 298
 299 static void b1_wr_reg(unsigned int base,
 300                       unsigned int reg,
 301                       unsigned int value)
 302 {
 303         b1_put_byte(base, WRITE_REGISTER);
 304         b1_put_word(base, reg);
 305         b1_put_word(base, value);
 306 }
 307
 308 static inline unsigned int b1_rd_reg(unsigned int base,
 309                                      unsigned int reg)
 310 {
 311         b1_put_byte(base, READ_REGISTER);
 312         b1_put_word(base, reg);
 313         return b1_get_word(base);
 314
 315 }
 316
 317 static inline void b1_reset(unsigned int base)
 318 {
 319         b1outp(base, B1_RESET, 0);
 320         udelay(55 * 2 * 1000);  /* 2 TIC's */
 321
 322         b1outp(base, B1_RESET, 1);
 323         udelay(55 * 2 * 1000);  /* 2 TIC's */
 324
 325         b1outp(base, B1_RESET, 0);
 326         udelay(55 * 2 * 1000);  /* 2 TIC's */
 327 }
 328
 329 static inline unsigned char b1_disable_irq(unsigned int base)
 330 {
 331         return b1outp(base, B1_INSTAT, 0x00);
 332 }
 333
 334 /* ---------------------------------------------------------------- */
 335
 336 static inline void b1_set_test_bit(unsigned int base,
 337                                    enum avmcardtype cardtype,
 338                                    int onoff)
 339 {
 340     b1_wr_reg(base, B1_STAT0(cardtype), onoff ? 0x21 : 0x20);
 341 }
 342
 343 static inline int b1_get_test_bit(unsigned int base,
 344                                   enum avmcardtype cardtype)
 345 {
 346     return (b1_rd_reg(base, B1_STAT0(cardtype)) & 0x01) != 0;
 347 }
 348
 349 /* ---------------------------------------------------------------- */
 350
 351 #define T1_FASTLINK             0x00
 352 #define T1_SLOWLINK             0x08
 353
 354 #define T1_READ                 B1_READ
 355 #define T1_WRITE                B1_WRITE
 356 #define T1_INSTAT               B1_INSTAT
 357 #define T1_OUTSTAT              B1_OUTSTAT
 358 #define T1_IRQENABLE            0x05
 359 #define T1_FIFOSTAT             0x06
 360 #define T1_RESETLINK            0x10
 361 #define T1_ANALYSE              0x11
 362 #define T1_IRQMASTER            0x12
 363 #define T1_IDENT                0x17
 364 #define T1_RESETBOARD           0x1f
 365
 366 #define T1F_IREADY              0x01
 367 #define T1F_IHALF               0x02
 368 #define T1F_IFULL               0x04
 369 #define T1F_IEMPTY              0x08
 370 #define T1F_IFLAGS              0xF0
 371
 372 #define T1F_OREADY              0x10
 373 #define T1F_OHALF               0x20
 374 #define T1F_OEMPTY              0x40
 375 #define T1F_OFULL               0x80
 376 #define T1F_OFLAGS              0xF0
 377
 378 /* there are HEMA cards with 1k and 4k FIFO out */
 379 #define FIFO_OUTBSIZE           256
 380 #define FIFO_INPBSIZE           512
 381
 382 #define HEMA_VERSION_ID         0
 383 #define HEMA_PAL_ID             0
 384
 385 static inline void t1outp(unsigned int base,
 386                           unsigned short offset,
 387                           unsigned char value)
 388 {
 389         outb(value, base + offset);
 390 }
 391
 392 static inline unsigned char t1inp(unsigned int base,
 393                                   unsigned short offset)
 394 {
 395         return inb(base + offset);
 396 }
 397
 398 static inline int t1_isfastlink(unsigned int base)
 399 {
 400         return (inb(base + T1_IDENT) & ~0x82) == 1;
 401 }
 402
 403 static inline unsigned char t1_fifostatus(unsigned int base)
 404 {
 405         return inb(base + T1_FIFOSTAT);
 406 }
 407
 408 static inline unsigned int t1_get_slice(unsigned int base,
 409                                         unsigned char *dp)
 410 {
 411         unsigned int len, i;
 412 #ifdef FASTLINK_DEBUG
 413         unsigned wcnt = 0, bcnt = 0;
 414 #endif
 415
 416         len = i = b1_get_word(base);
 417         if (t1_isfastlink(base)) {
 418                 int status;
 419                 while (i > 0) {
 420                         status = t1_fifostatus(base) & (T1F_IREADY|T1F_IHALF);
 421                         if (i >= FIFO_INPBSIZE) status |= T1F_IFULL;
 422
 423                         switch (status) {
 424                                 case T1F_IREADY|T1F_IHALF|T1F_IFULL:
 425                                         insb(base+B1_READ, dp, FIFO_INPBSIZE);
 426                                         dp += FIFO_INPBSIZE;
 427                                         i -= FIFO_INPBSIZE;
 428 #ifdef FASTLINK_DEBUG
 429                                         wcnt += FIFO_INPBSIZE;
 430 #endif
 431                                         break;
 432                                 case T1F_IREADY|T1F_IHALF:
 433                                         insb(base+B1_READ,dp, i);
 434 #ifdef FASTLINK_DEBUG
 435                                         wcnt += i;
 436 #endif
 437                                         dp += i;
 438                                         i = 0;
 439                                         if (i == 0)
 440                                                 break;
 441                                         /* fall through */
 442                                 default:
 443                                         *dp++ = b1_get_byte(base);
 444                                         i--;
 445 #ifdef FASTLINK_DEBUG
 446                                         bcnt++;
 447 #endif
 448                                         break;
 449                         }
 450             }
 451 #ifdef FASTLINK_DEBUG
 452             if (wcnt)
 453             printk(KERN_DEBUG "b1lli(0x%x): get_slice l=%d w=%d b=%d\n",
 454                                 base, len, wcnt, bcnt);
 455 #endif
 456         } else {
 457                 while (i-- > 0)
 458                         *dp++ = b1_get_byte(base);
 459         }
 460         return len;
 461 }
 462
 463 static inline void t1_put_slice(unsigned int base,
 464                                 unsigned char *dp, unsigned int len)
 465 {
 466         unsigned i = len;
 467         b1_put_word(base, i);
 468         if (t1_isfastlink(base)) {
 469                 int status;
 470                 while (i > 0) {
 471                         status = t1_fifostatus(base) & (T1F_OREADY|T1F_OHALF);
 472                         if (i >= FIFO_OUTBSIZE) status |= T1F_OEMPTY;
 473                         switch (status) {
 474                                 case T1F_OREADY|T1F_OHALF|T1F_OEMPTY:
 475                                         outsb(base+B1_WRITE, dp, FIFO_OUTBSIZE);
 476                                         dp += FIFO_OUTBSIZE;
 477                                         i -= FIFO_OUTBSIZE;
 478                                         break;
 479                                 case T1F_OREADY|T1F_OHALF:
 480                                         outsb(base+B1_WRITE, dp, i);
 481                                         dp += i;
 482                                         i = 0;
 483                                         break;
 484                                 default:
 485                                         b1_put_byte(base, *dp++);
 486                                         i--;
 487                                         break;
 488                         }
 489                 }
 490         } else {
 491                 while (i-- > 0)
 492                         b1_put_byte(base, *dp++);
 493         }
 494 }
 495
 496 static inline void t1_disable_irq(unsigned int base)
 497 {
 498       t1outp(base, T1_IRQMASTER, 0x00);
 499 }
 500
 501 static inline void t1_reset(unsigned int base)
 502 {
 503         /* reset T1 Controller */
 504         b1_reset(base);
 505         /* disable irq on HEMA */
 506         t1outp(base, B1_INSTAT, 0x00);
 507         t1outp(base, B1_OUTSTAT, 0x00);
 508         t1outp(base, T1_IRQMASTER, 0x00);
 509         /* reset HEMA board configuration */
 510         t1outp(base, T1_RESETBOARD, 0xf);
 511 }
 512
 513 static inline void b1_setinterrupt(unsigned int base, unsigned irq,
 514                                    enum avmcardtype cardtype)
 515 {
 516         switch (cardtype) {
 517            case avm_t1isa:
 518               t1outp(base, B1_INSTAT, 0x00);
 519               t1outp(base, B1_INSTAT, 0x02);
 520               t1outp(base, T1_IRQMASTER, 0x08);
 521               break;
 522            case avm_b1isa:
 523               b1outp(base, B1_INSTAT, 0x00);
 524               b1outp(base, B1_RESET, b1_irq_table[irq]);
 525               b1outp(base, B1_INSTAT, 0x02);
 526               break;
 527            default:
 528            case avm_m1:
 529            case avm_m2:
 530            case avm_b1pci:
 531               b1outp(base, B1_INSTAT, 0x00);
 532               b1outp(base, B1_RESET, 0xf0);
 533               b1outp(base, B1_INSTAT, 0x02);
 534               break;
 535            case avm_c4:
 536            case avm_t1pci:
 537               b1outp(base, B1_RESET, 0xf0);
 538               break;
 539          }
 540 }
 541
 542 int b1_detect(unsigned int base, enum avmcardtype cardtype);
 543 int b1_load_t4file(unsigned int base, capiloaddatapart * t4file);
 544 int b1_load_config(unsigned int base, capiloaddatapart * config);
 545 int b1_loaded(unsigned int base);
 546 int b1_load_firmware(struct capi_ctr *ctrl, capiloaddata *data);
 547 void b1_reset_ctr(struct capi_ctr *ctrl);
 548 void b1_register_appl(struct capi_ctr *ctrl, __u16 appl,
 549                                 capi_register_params *rp);
 550 void b1_release_appl(struct capi_ctr *ctrl, __u16 appl);
 551 void b1_send_message(struct capi_ctr *ctrl, struct sk_buff *skb);
 552 void b1_parse_version(avmcard *card);
 553 void b1_handle_interrupt(avmcard * card);
 554
 555 int b1ctl_read_proc(char *page, char **start, off_t off,
 556                         int count, int *eof, struct capi_ctr *ctrl);
 557
 558
 559 #endif /* _AVMCARD_H_ */