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* add p cc
[mascara-docs.git] / i386 / linux / linux-2.3.21 / drivers / net / declance.c
blob29104a423db9b0f5aaa1bdfec76ef2032588e0ad
1 /*
2 * Lance ethernet driver for the MIPS processor based
3 * DECstation family
4 *
5 *
6 * adopted from sunlance.c by Richard van den Berg
7 *
8 * additional sources:
9 * - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
10 * Revision 1.2
11 *
12 * History:
13 *
14 * v0.001: The kernel accepts the code and it shows the hardware address.
15 *
16 * v0.002: Removed most sparc stuff, left only some module and dma stuff.
17 *
18 * v0.003: Enhanced base address calculation from proposals by
19 * Harald Koerfgen and Thomas Riemer.
20 *
21 * v0.004: lance-regs is pointing at the right addresses, added prom
22 * check. First start of address mapping and DMA.
23 *
24 * v0.005: started to play around with LANCE-DMA. This driver will not work
25 * for non IOASIC lances. HK
26 *
27 * v0.006: added pointer arrays to lance_private and setup routine for them
28 * in dec_lance_init. HK
29 *
30 * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to access
31 * the init block. This looks like one (short) word at a time, but the smallest
32 * amount the IOASIC can transfer is a (long) word. So we have a 2-2 padding here.
33 * Changed lance_init_block accordingly. The 16-16 padding for the buffers
34 * seems to be correct. HK
35 *
36 * v0.008 - mods to make PMAX_LANCE work. 01/09/1999 triemer
37 */
38
39 #undef DEBUG_DRIVER
40
41 static char *version =
42 "declance.c: v0.008 by Linux Mips DECstation task force\n";
43
44 static char *lancestr = "LANCE";
45
46 /*
47 * card types
48 */
49 #define ASIC_LANCE 1
50 #define PMAD_LANCE 2
51 #define PMAX_LANCE 3
52
53 #include <linux/init.h>
54 #include <linux/kernel.h>
55 #include <linux/netdevice.h>
56
57 #include <asm/dec/interrupts.h>
58 #include <asm/dec/ioasic_ints.h>
59 #include <asm/dec/ioasic_addrs.h>
60 #include <asm/dec/machtype.h>
61 #include <asm/dec/tc.h>
62 #include <asm/dec/kn01.h>
63 #include <asm/addrspace.h>
64
65 #include <linux/config.h>
66 #include <linux/errno.h>
67 #include <linux/hdreg.h>
68 #include <linux/ioport.h>
69 #include <linux/sched.h>
70 #include <linux/mm.h>
71 #include <linux/stddef.h>
72 #include <linux/string.h>
73 #include <linux/unistd.h>
74 #include <linux/ptrace.h>
75 #include <linux/malloc.h>
76 #include <linux/user.h>
77 #include <linux/utsname.h>
78 #include <linux/a.out.h>
79 #include <linux/tty.h>
80 #include <linux/delay.h>
81 #include <asm/io.h>
82 #include <linux/etherdevice.h>
83
84 #ifndef CONFIG_TC
85 unsigned long system_base = 0;
86 unsigned long dmaptr;
87 #endif
88 static int type;
89
90 #define CRC_POLYNOMIAL_BE 0x04c11db7UL /* Ethernet CRC, big endian */
91 #define CRC_POLYNOMIAL_LE 0xedb88320UL /* Ethernet CRC, little endian */
92
93 #define LE_CSR0 0
94 #define LE_CSR1 1
95 #define LE_CSR2 2
96 #define LE_CSR3 3
97
98 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
99
100 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
101 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
102 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
103 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
104 #define LE_C0_MERR 0x0800 /* ME: Memory error */
105 #define LE_C0_RINT 0x0400 /* Received interrupt */
106 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
107 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
108 #define LE_C0_INTR 0x0080 /* Interrupt or error */
109 #define LE_C0_INEA 0x0040 /* Interrupt enable */
110 #define LE_C0_RXON 0x0020 /* Receiver on */
111 #define LE_C0_TXON 0x0010 /* Transmitter on */
112 #define LE_C0_TDMD 0x0008 /* Transmitter demand */
113 #define LE_C0_STOP 0x0004 /* Stop the card */
114 #define LE_C0_STRT 0x0002 /* Start the card */
115 #define LE_C0_INIT 0x0001 /* Init the card */
116
117 #define LE_C3_BSWP 0x4 /* SWAP */
118 #define LE_C3_ACON 0x2 /* ALE Control */
119 #define LE_C3_BCON 0x1 /* Byte control */
120
121 /* Receive message descriptor 1 */
122 #define LE_R1_OWN 0x80 /* Who owns the entry */
123 #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
124 #define LE_R1_FRA 0x20 /* FRA: Frame error */
125 #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
126 #define LE_R1_CRC 0x08 /* CRC error */
127 #define LE_R1_BUF 0x04 /* BUF: Buffer error */
128 #define LE_R1_SOP 0x02 /* Start of packet */
129 #define LE_R1_EOP 0x01 /* End of packet */
130 #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
131
132 #define LE_T1_OWN 0x80 /* Lance owns the packet */
133 #define LE_T1_ERR 0x40 /* Error summary */
134 #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
135 #define LE_T1_EONE 0x08 /* Error: one retry needed */
136 #define LE_T1_EDEF 0x04 /* Error: deferred */
137 #define LE_T1_SOP 0x02 /* Start of packet */
138 #define LE_T1_EOP 0x01 /* End of packet */
139 #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
140
141 #define LE_T3_BUF 0x8000 /* Buffer error */
142 #define LE_T3_UFL 0x4000 /* Error underflow */
143 #define LE_T3_LCOL 0x1000 /* Error late collision */
144 #define LE_T3_CLOS 0x0800 /* Error carrier loss */
145 #define LE_T3_RTY 0x0400 /* Error retry */
146 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
147
148 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
149
150 #ifndef LANCE_LOG_TX_BUFFERS
151 #define LANCE_LOG_TX_BUFFERS 4
152 #define LANCE_LOG_RX_BUFFERS 4
153 #endif
154
155 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
156 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
157
158 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
159 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
160
161 #define PKT_BUF_SZ 1536
162 #define RX_BUFF_SIZE PKT_BUF_SZ
163 #define TX_BUFF_SIZE PKT_BUF_SZ
164
165 #undef TEST_HITS
166 #define DEBUG_DRIVER 1
167
168 #define ZERO 0
169
170 /* The DS2000/3000 have a linear 64 KB buffer.
171
172 * The PMAD-AA has 128 kb buffer on-board.
173 *
174 * The IOASIC LANCE devices use a shared memory region. This region as seen
175 * from the CPU is (max) 128 KB long and has to be on an 128 KB boundary.
176 * The LANCE sees this as a 64 KB long continuous memory region.
177 *
178 * The LANCE's DMA address is used as an index in this buffer and DMA takes
179 * place in bursts of eight 16-Bit words which are packed into four 32-Bit words
180 * by the IOASIC. This leads to a strange padding: 16 bytes of valid data followed
181 * by a 16 byte gap :-(.
182 */
183
184 struct lance_rx_desc {
185 unsigned short rmd0; /* low address of packet */
186 short gap0;
187 unsigned char rmd1_hadr; /* high address of packet */
188 unsigned char rmd1_bits; /* descriptor bits */
189 short gap1;
190 short length; /* This length is 2s complement (negative)!
191 * Buffer length
192 */
193 short gap2;
194 unsigned short mblength; /* This is the actual number of bytes received */
195 short gap3;
196 };
197
198 struct lance_tx_desc {
199 unsigned short tmd0; /* low address of packet */
200 short gap0;
201 unsigned char tmd1_hadr; /* high address of packet */
202 unsigned char tmd1_bits; /* descriptor bits */
203 short gap1;
204 short length; /* Length is 2s complement (negative)! */
205 short gap2;
206 unsigned short misc;
207 short gap3;
208 };
209
210
211 /* First part of the LANCE initialization block, described in databook. */
212 struct lance_init_block {
213 unsigned short mode; /* Pre-set mode (reg. 15) */
214 short gap0;
215
216 unsigned char phys_addr[12]; /* Physical ethernet address
217 * only 0, 1, 4, 5, 8, 9 are valid
218 * 2, 3, 6, 7, 10, 11 are gaps
219 */
220 unsigned short filter[8]; /* Multicast filter.
221 * only 0, 2, 4, 6 are valid
222 * 1, 3, 5, 7 are gaps
223 */
224
225 /* Receive and transmit ring base, along with extra bits. */
226 unsigned short rx_ptr; /* receive descriptor addr */
227 short gap1;
228 unsigned short rx_len; /* receive len and high addr */
229 short gap2;
230 unsigned short tx_ptr; /* transmit descriptor addr */
231 short gap3;
232 unsigned short tx_len; /* transmit len and high addr */
233 short gap4;
234 char gap5[16];
235
236 /* The buffer descriptors */
237 struct lance_rx_desc brx_ring[RX_RING_SIZE];
238 struct lance_tx_desc btx_ring[TX_RING_SIZE];
239 };
240
241 #define BUF_OFFSET_CPU sizeof(struct lance_init_block)
242 #define BUF_OFFSET_LNC (sizeof(struct lance_init_block)>>1)
243
244 #define libdesc_offset(rt, elem) \
245 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
246
247 /*
248 * This works *only* for the ring descriptors
249 */
250 #define LANCE_ADDR(x) (PHYSADDR(x) >> 1)
251
252 struct lance_private {
253 char *name;
254 volatile struct lance_regs *ll;
255 volatile struct lance_init_block *init_block;
256 volatile unsigned long *dma_ptr_reg;
257
258 int rx_new, tx_new;
259 int rx_old, tx_old;
260
261 struct net_device_stats stats;
262
263 unsigned short busmaster_regval;
264
265 struct net_device *dev; /* Backpointer */
266 struct lance_private *next_module;
267
268 /* Pointers to the ring buffers as seen from the CPU */
269 char *rx_buf_ptr_cpu[RX_RING_SIZE];
270 char *tx_buf_ptr_cpu[TX_RING_SIZE];
271
272 /* Pointers to the ring buffers as seen from the LANCE */
273 char *rx_buf_ptr_lnc[RX_RING_SIZE];
274 char *tx_buf_ptr_lnc[TX_RING_SIZE];
275 };
276
277 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
278 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
279 lp->tx_old - lp->tx_new-1)
280
281 /* The lance control ports are at an absolute address, machine and tc-slot
282 * dependant.
283 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses,
284 * so we have to give the structure an extra member making rap pointing
285 * at the right address
286 */
287 struct lance_regs {
288 volatile unsigned short rdp; /* register data port */
289 unsigned short pad;
290 volatile unsigned short rap; /* register address port */
291 };
292
293 int dec_lance_debug = 2;
294
295 /*
296 #ifdef MODULE
297 static struct lance_private *root_lance_dev = NULL;
298 #endif
299 */
300
301 static inline void writereg(volatile unsigned short *regptr, short value)
302 {
303 *regptr = value;
304 }
305
306 /* Load the CSR registers */
307 static void load_csrs(struct lance_private *lp)
308 {
309 volatile struct lance_regs *ll = lp->ll;
310 int leptr;
311
312 /* The address space as seen from the LANCE
313 * begins at address 0. HK
314 */
315 leptr = 0;
316
317 writereg(&ll->rap, LE_CSR1);
318 writereg(&ll->rdp, (leptr & 0xFFFF));
319 writereg(&ll->rap, LE_CSR2);
320 writereg(&ll->rdp, leptr >> 16);
321 writereg(&ll->rap, LE_CSR3);
322 writereg(&ll->rdp, lp->busmaster_regval);
323
324 /* Point back to csr0 */
325 writereg(&ll->rap, LE_CSR0);
326 }
327
328 /*
329 * Our specialized copy routines
330 *
331 */
332 void cp_to_buf(void *to, const void *from, __kernel_size_t len)
333 {
334 unsigned short *tp, *fp, clen;
335 unsigned char *rtp, *rfp;
336
337 if (type == PMAX_LANCE) {
338 clen = len >> 1;
339 tp = (unsigned short *) to;
340 fp = (unsigned short *) from;
341
342 while (clen--) {
343 *tp++ = *fp++;
344 tp++;
345 }
346
347 clen = len & 1;
348 rtp = (unsigned char *) tp;
349 rfp = (unsigned char *) fp;
350 while (clen--) {
351 *rtp++ = *rfp++;
352 }
353 } else {
354 /*
355 * copy 16 Byte chunks
356 */
357 clen = len >> 4;
358 tp = (unsigned short *) to;
359 fp = (unsigned short *) from;
360 while (clen--) {
361 *tp++ = *fp++;
362 *tp++ = *fp++;
363 *tp++ = *fp++;
364 *tp++ = *fp++;
365 *tp++ = *fp++;
366 *tp++ = *fp++;
367 *tp++ = *fp++;
368 *tp++ = *fp++;
369 tp += 8;
370 }
371
372 /*
373 * do the rest, if any.
374 */
375 clen = len & 15;
376 rtp = (unsigned char *) tp;
377 rfp = (unsigned char *) fp;
378 while (clen--) {
379 *rtp++ = *rfp++;
380 }
381 }
382
383 }
384
385 void cp_from_buf(void *to, unsigned char *from, int len)
386 {
387 unsigned short *tp, *fp, clen;
388 unsigned char *rtp, *rfp;
389
390 if (type == PMAX_LANCE) {
391 clen = len >> 1;
392 tp = (unsigned short *) to;
393 fp = (unsigned short *) from;
394 while (clen--) {
395 *tp++ = *fp++;
396 fp++;
397 }
398
399 clen = len & 1;
400
401 rtp = (unsigned char *) tp;
402 rfp = (unsigned char *) fp;
403
404 while (clen--) {
405 *rtp++ = *rfp++;
406 }
407 } else {
408
409 /*
410 * copy 16 Byte chunks
411 */
412 clen = len >> 4;
413 tp = (unsigned short *) to;
414 fp = (unsigned short *) from;
415 while (clen--) {
416 *tp++ = *fp++;
417 *tp++ = *fp++;
418 *tp++ = *fp++;
419 *tp++ = *fp++;
420 *tp++ = *fp++;
421 *tp++ = *fp++;
422 *tp++ = *fp++;
423 *tp++ = *fp++;
424 fp += 8;
425 }
426
427 /*
428 * do the rest, if any.
429 */
430 clen = len & 15;
431 rtp = (unsigned char *) tp;
432 rfp = (unsigned char *) fp;
433 while (clen--) {
434 *rtp++ = *rfp++;
435 }
436
437
438 }
439
440 }
441
442 /* Setup the Lance Rx and Tx rings */
443 /* Sets dev->tbusy */
444 static void lance_init_ring(struct net_device *dev)
445 {
446 struct lance_private *lp = (struct lance_private *) dev->priv;
447 volatile struct lance_init_block *ib;
448 int leptr;
449 int i;
450
451 ib = (struct lance_init_block *) (dev->mem_start);
452
453 /* Lock out other processes while setting up hardware */
454 dev->tbusy = 1;
455 lp->rx_new = lp->tx_new = 0;
456 lp->rx_old = lp->tx_old = 0;
457
458 ib->mode = 0;
459
460 /* Copy the ethernet address to the lance init block.
461 * XXX bit 0 of the physical address registers has to be zero
462 */
463 ib->phys_addr[0] = dev->dev_addr[0];
464 ib->phys_addr[1] = dev->dev_addr[1];
465 ib->phys_addr[4] = dev->dev_addr[2];
466 ib->phys_addr[5] = dev->dev_addr[3];
467 ib->phys_addr[8] = dev->dev_addr[4];
468 ib->phys_addr[9] = dev->dev_addr[5];
469 /* Setup the initialization block */
470
471 /* Setup rx descriptor pointer */
472 leptr = LANCE_ADDR(libdesc_offset(brx_ring, 0));
473 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
474 ib->rx_ptr = leptr;
475 if (ZERO)
476 printk("RX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(brx_ring, 0));
477
478 /* Setup tx descriptor pointer */
479 leptr = LANCE_ADDR(libdesc_offset(btx_ring, 0));
480 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
481 ib->tx_ptr = leptr;
482 if (ZERO)
483 printk("TX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(btx_ring, 0));
484
485 /* Clear the multicast filter */
486 ib->filter[0] = 0;
487 ib->filter[2] = 0;
488 ib->filter[4] = 0;
489 ib->filter[6] = 0;
490 if (ZERO)
491 printk("TX rings:\n");
492
493 /* Setup the Tx ring entries */
494 for (i = 0; i < TX_RING_SIZE; i++) {
495 leptr = (int) lp->tx_buf_ptr_lnc[i];
496 ib->btx_ring[i].tmd0 = leptr;
497 ib->btx_ring[i].tmd1_hadr = leptr >> 16;
498 ib->btx_ring[i].tmd1_bits = 0;
499 ib->btx_ring[i].length = 0xf000; /* The ones required by tmd2 */
500 ib->btx_ring[i].misc = 0;
501 if (i < 3 && ZERO)
502 printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->tx_buf_ptr_cpu[i]);
503 }
504
505 /* Setup the Rx ring entries */
506 if (ZERO)
507 printk("RX rings:\n");
508 for (i = 0; i < RX_RING_SIZE; i++) {
509 leptr = (int) lp->rx_buf_ptr_lnc[i];
510 ib->brx_ring[i].rmd0 = leptr;
511 ib->brx_ring[i].rmd1_hadr = leptr >> 16;
512 ib->brx_ring[i].rmd1_bits = LE_R1_OWN;
513 ib->brx_ring[i].length = -RX_BUFF_SIZE | 0xf000;
514 ib->brx_ring[i].mblength = 0;
515 if (i < 3 && ZERO)
516 printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->rx_buf_ptr_cpu[i]);
517 }
518 }
519
520 static int init_restart_lance(struct lance_private *lp)
521 {
522 volatile struct lance_regs *ll = lp->ll;
523 int i;
524
525 writereg(&ll->rap, LE_CSR0);
526 writereg(&ll->rdp, LE_C0_INIT);
527
528 /* Wait for the lance to complete initialization */
529 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {
530 udelay(10);
531 }
532 if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
533 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
534 return -1;
535 }
536 if ((ll->rdp & LE_C0_ERR)) {
537 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
538 return -1;
539 }
540 writereg(&ll->rdp, LE_C0_IDON);
541 writereg(&ll->rdp, LE_C0_STRT);
542 writereg(&ll->rdp, LE_C0_INEA);
543
544 return 0;
545 }
546
547 static int lance_rx(struct net_device *dev)
548 {
549 struct lance_private *lp = (struct lance_private *) dev->priv;
550 volatile struct lance_init_block *ib;
551 volatile struct lance_rx_desc *rd = 0;
552 unsigned char bits;
553 int len = 0;
554 struct sk_buff *skb = 0;
555 ib = (struct lance_init_block *) (dev->mem_start);
556
557 #ifdef TEST_HITS
558 int i;
559
560 printk("[");
561 for (i = 0; i < RX_RING_SIZE; i++) {
562 if (i == lp->rx_new)
563 printk("%s",
564 ib->brx_ring[i].rmd1_bits & LE_R1_OWN ? "_" : "X");
565 else
566 printk("%s",
567 ib->brx_ring[i].rmd1_bits & LE_R1_OWN ? "." : "1");
568 }
569 printk("]");
570 #endif
571
572 for (rd = &ib->brx_ring[lp->rx_new];
573 !((bits = rd->rmd1_bits) & LE_R1_OWN);
574 rd = &ib->brx_ring[lp->rx_new]) {
575
576 /* We got an incomplete frame? */
577 if ((bits & LE_R1_POK) != LE_R1_POK) {
578 lp->stats.rx_over_errors++;
579 lp->stats.rx_errors++;
580 } else if (bits & LE_R1_ERR) {
581 /* Count only the end frame as a rx error,
582 * not the beginning
583 */
584 if (bits & LE_R1_BUF)
585 lp->stats.rx_fifo_errors++;
586 if (bits & LE_R1_CRC)
587 lp->stats.rx_crc_errors++;
588 if (bits & LE_R1_OFL)
589 lp->stats.rx_over_errors++;
590 if (bits & LE_R1_FRA)
591 lp->stats.rx_frame_errors++;
592 if (bits & LE_R1_EOP)
593 lp->stats.rx_errors++;
594 } else {
595 len = (rd->mblength & 0xfff) - 4;
596 skb = dev_alloc_skb(len + 2);
597
598 if (skb == 0) {
599 printk("%s: Memory squeeze, deferring packet.\n",
600 dev->name);
601 lp->stats.rx_dropped++;
602 rd->mblength = 0;
603 rd->rmd1_bits = LE_R1_OWN;
604 lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
605 return 0;
606 }
607 lp->stats.rx_bytes += len;
608
609 skb->dev = dev;
610 skb_reserve(skb, 2); /* 16 byte align */
611 skb_put(skb, len); /* make room */
612 cp_from_buf(skb->data,
613 (char *) lp->rx_buf_ptr_cpu[lp->rx_new],
614 len);
615 skb->protocol = eth_type_trans(skb, dev);
616 netif_rx(skb);
617 lp->stats.rx_packets++;
618 }
619
620 /* Return the packet to the pool */
621 rd->mblength = 0;
622 rd->length = -RX_BUFF_SIZE | 0xf000;
623 rd->rmd1_bits = LE_R1_OWN;
624 lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
625 }
626 return 0;
627 }
628
629 static int lance_tx(struct net_device *dev)
630 {
631 struct lance_private *lp = (struct lance_private *) dev->priv;
632 volatile struct lance_init_block *ib;
633 volatile struct lance_regs *ll = lp->ll;
634 volatile struct lance_tx_desc *td;
635 int i, j;
636 int status;
637 ib = (struct lance_init_block *) (dev->mem_start);
638 j = lp->tx_old;
639
640 for (i = j; i != lp->tx_new; i = j) {
641 td = &ib->btx_ring[i];
642 /* If we hit a packet not owned by us, stop */
643 if (td->tmd1_bits & LE_T1_OWN)
644 break;
645
646 if (td->tmd1_bits & LE_T1_ERR) {
647 status = td->misc;
648
649 lp->stats.tx_errors++;
650 if (status & LE_T3_RTY)
651 lp->stats.tx_aborted_errors++;
652 if (status & LE_T3_LCOL)
653 lp->stats.tx_window_errors++;
654
655 if (status & LE_T3_CLOS) {
656 lp->stats.tx_carrier_errors++;
657 printk("%s: Carrier Lost", dev->name);
658 /* Stop the lance */
659 writereg(&ll->rap, LE_CSR0);
660 writereg(&ll->rdp, LE_C0_STOP);
661 lance_init_ring(dev);
662 load_csrs(lp);
663 init_restart_lance(lp);
664 return 0;
665 }
666 /* Buffer errors and underflows turn off the
667 * transmitter, restart the adapter.
668 */
669 if (status & (LE_T3_BUF | LE_T3_UFL)) {
670 lp->stats.tx_fifo_errors++;
671
672 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
673 dev->name);
674 /* Stop the lance */
675 writereg(&ll->rap, LE_CSR0);
676 writereg(&ll->rdp, LE_C0_STOP);
677 lance_init_ring(dev);
678 load_csrs(lp);
679 init_restart_lance(lp);
680 return 0;
681 }
682 } else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
683 /*
684 * So we don't count the packet more than once.
685 */
686 td->tmd1_bits &= ~(LE_T1_POK);
687
688 /* One collision before packet was sent. */
689 if (td->tmd1_bits & LE_T1_EONE)
690 lp->stats.collisions++;
691
692 /* More than one collision, be optimistic. */
693 if (td->tmd1_bits & LE_T1_EMORE)
694 lp->stats.collisions += 2;
695
696 lp->stats.tx_packets++;
697 }
698 j = (j + 1) & TX_RING_MOD_MASK;
699 }
700 lp->tx_old = j;
701 return 0;
702 }
703
704 static void lance_interrupt(const int irq, void *dev_id, struct pt_regs *regs)
705 {
706 struct net_device *dev = (struct net_device *) dev_id;
707 struct lance_private *lp = (struct lance_private *) dev->priv;
708 volatile struct lance_regs *ll = lp->ll;
709 int csr0;
710
711 if (dev->interrupt)
712 printk("%s: again\n", dev->name);
713
714 dev->interrupt = 1;
715
716 writereg(&ll->rap, LE_CSR0);
717 csr0 = ll->rdp;
718
719 /* Acknowledge all the interrupt sources ASAP */
720 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));
721
722 if ((csr0 & LE_C0_ERR)) {
723 /* Clear the error condition */
724 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
725 LE_C0_CERR | LE_C0_MERR);
726 }
727 if (csr0 & LE_C0_RINT)
728 lance_rx(dev);
729
730 if (csr0 & LE_C0_TINT)
731 lance_tx(dev);
732
733 if ((TX_BUFFS_AVAIL >= 0) && dev->tbusy) {
734 dev->tbusy = 0;
735 mark_bh(NET_BH);
736 }
737 if (csr0 & LE_C0_BABL)
738 lp->stats.tx_errors++;
739
740 if (csr0 & LE_C0_MISS)
741 lp->stats.rx_errors++;
742
743 if (csr0 & LE_C0_MERR) {
744 volatile unsigned long int_stat = *(unsigned long *) (system_base + IOCTL + SIR);
745
746 printk("%s: Memory error, status %04x", dev->name, csr0);
747
748 if (int_stat & LANCE_DMA_MEMRDERR) {
749 printk("%s: DMA error\n", dev->name);
750 int_stat |= LANCE_DMA_MEMRDERR;
751 /*
752 * re-enable LANCE DMA
753 */
754 *(unsigned long *) (system_base + IOCTL + SSR) |= (1 << 16);
755 }
756 writereg(&ll->rdp, LE_C0_STOP);
757
758 lance_init_ring(dev);
759 load_csrs(lp);
760 init_restart_lance(lp);
761 dev->tbusy = 0;
762 }
763 writereg(&ll->rdp, LE_C0_INEA);
764 writereg(&ll->rdp, LE_C0_INEA);
765 dev->interrupt = 0;
766 }
767
768 struct net_device *last_dev = 0;
769
770 static int lance_open(struct net_device *dev)
771 {
772 struct lance_private *lp = (struct lance_private *) dev->priv;
773 volatile struct lance_regs *ll = lp->ll;
774 int status = 0;
775
776 last_dev = dev;
777
778 /* Associate IRQ with lance_interrupt */
779 if (request_irq(dev->irq, &lance_interrupt, 0, lp->name, dev)) {
780 printk("Lance: Can't get irq %d\n", dev->irq);
781 return -EAGAIN;
782 }
783 /* Stop the Lance */
784 writereg(&ll->rap, LE_CSR0);
785 writereg(&ll->rdp, LE_C0_STOP);
786
787 lance_init_ring(dev);
788 load_csrs(lp);
789
790 dev->tbusy = 0;
791 dev->interrupt = 0;
792 dev->start = 1;
793
794 status = init_restart_lance(lp);
795
796 /*
797 * if (!status)
798 * MOD_INC_USE_COUNT;
799 */
800
801 return status;
802 }
803
804 static int lance_close(struct net_device *dev)
805 {
806 struct lance_private *lp = (struct lance_private *) dev->priv;
807 volatile struct lance_regs *ll = lp->ll;
808
809 dev->start = 0;
810 dev->tbusy = 1;
811
812 /* Stop the card */
813 writereg(&ll->rap, LE_CSR0);
814 writereg(&ll->rdp, LE_C0_STOP);
815
816 free_irq(dev->irq, (void *) dev);
817 /*
818 MOD_DEC_USE_COUNT;
819 */
820 return 0;
821 }
822
823 static inline int lance_reset(struct net_device *dev)
824 {
825 struct lance_private *lp = (struct lance_private *) dev->priv;
826 volatile struct lance_regs *ll = lp->ll;
827 int status;
828
829 /* Stop the lance */
830 writereg(&ll->rap, LE_CSR0);
831 writereg(&ll->rdp, LE_C0_STOP);
832
833 lance_init_ring(dev);
834 load_csrs(lp);
835 dev->trans_start = jiffies;
836 dev->interrupt = 0;
837 dev->start = 1;
838 dev->tbusy = 0;
839 status = init_restart_lance(lp);
840 #ifdef DEBUG_DRIVER
841 printk("Lance restart=%d\n", status);
842 #endif
843 return status;
844 }
845
846 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
847 {
848 struct lance_private *lp = (struct lance_private *) dev->priv;
849 volatile struct lance_regs *ll = lp->ll;
850 volatile struct lance_init_block *ib;
851 unsigned long flags;
852 int entry, skblen, len;
853 int status = 0;
854 static int outs;
855 ib = (struct lance_init_block *) (dev->mem_start);
856
857 /* Transmitter timeout, serious problems */
858 if (dev->tbusy) {
859 int tickssofar = jiffies - dev->trans_start;
860
861 if (tickssofar < 100) {
862 status = -1;
863 } else {
864 printk("%s: transmit timed out, status %04x, reset\n",
865 dev->name, ll->rdp);
866 lance_reset(dev);
867 }
868 return status;
869 }
870 /* Block a timer-based transmit from overlapping. */
871 if (test_and_set_bit(0, (void *) &dev->tbusy) != 0) {
872 printk("Transmitter access conflict.\n");
873 return -1;
874 }
875 skblen = skb->len;
876 save_and_cli(flags);
877 if (!TX_BUFFS_AVAIL) {
878 restore_flags(flags);
879 return -1;
880 }
881 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
882
883 lp->stats.tx_bytes += len;
884
885 entry = lp->tx_new & TX_RING_MOD_MASK;
886 ib->btx_ring[entry].length = (-len);
887 ib->btx_ring[entry].misc = 0;
888
889 cp_to_buf((char *) lp->tx_buf_ptr_cpu[entry], skb->data, skblen);
890
891 /* Clear the slack of the packet, do I need this? */
892 /* For a firewall its a good idea - AC */
893 /*
894 if (len != skblen)
895 memset ((char *) &ib->tx_buf [entry][skblen], 0, (len - skblen) << 1);
896 */
897
898 /* Now, give the packet to the lance */
899 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
900 lp->tx_new = (lp->tx_new + 1) & TX_RING_MOD_MASK;
901
902 outs++;
903 /* Kick the lance: transmit now */
904 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);
905 dev->trans_start = jiffies;
906 dev_kfree_skb(skb);
907
908 if (TX_BUFFS_AVAIL)
909 dev->tbusy = 0;
910
911 restore_flags(flags);
912 return status;
913 }
914
915 static struct net_device_stats *lance_get_stats(struct net_device *dev)
916 {
917 struct lance_private *lp = (struct lance_private *) dev->priv;
918
919 return &lp->stats;
920 }
921
922 static void lance_load_multicast(struct net_device *dev)
923 {
924 volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
925 volatile u16 *mcast_table = (u16 *) & ib->filter;
926 struct dev_mc_list *dmi = dev->mc_list;
927 char *addrs;
928 int i, j, bit, byte;
929 u32 crc, poly = CRC_POLYNOMIAL_BE;
930
931 /* set all multicast bits */
932 if (dev->flags & IFF_ALLMULTI) {
933 ib->filter[0] = 0xffff;
934 ib->filter[2] = 0xffff;
935 ib->filter[4] = 0xffff;
936 ib->filter[6] = 0xffff;
937 return;
938 }
939 /* clear the multicast filter */
940 ib->filter[0] = 0;
941 ib->filter[2] = 0;
942 ib->filter[4] = 0;
943 ib->filter[6] = 0;
944
945 /* Add addresses */
946 for (i = 0; i < dev->mc_count; i++) {
947 addrs = dmi->dmi_addr;
948 dmi = dmi->next;
949
950 /* multicast address? */
951 if (!(*addrs & 1))
952 continue;
953
954 crc = 0xffffffff;
955 for (byte = 0; byte < 6; byte++)
956 for (bit = *addrs++, j = 0; j < 8; j++, bit >>= 1) {
957 int test;
958
959 test = ((bit ^ crc) & 0x01);
960 crc >>= 1;
961
962 if (test) {
963 crc = crc ^ poly;
964 }
965 }
966
967 crc = crc >> 26;
968 mcast_table[crc >> 3] |= 1 << (crc & 0xf);
969 }
970 return;
971 }
972
973 static void lance_set_multicast(struct net_device *dev)
974 {
975 struct lance_private *lp = (struct lance_private *) dev->priv;
976 volatile struct lance_init_block *ib;
977 volatile struct lance_regs *ll = lp->ll;
978
979 ib = (struct lance_init_block *) (dev->mem_start);
980
981 while (dev->tbusy)
982 schedule();
983 set_bit(0, (void *) &dev->tbusy);
984 while (lp->tx_old != lp->tx_new)
985 schedule();
986
987 writereg(&ll->rap, LE_CSR0);
988 writereg(&ll->rdp, LE_C0_STOP);
989
990 lance_init_ring(dev);
991
992 if (dev->flags & IFF_PROMISC) {
993 ib->mode |= LE_MO_PROM;
994 } else {
995 ib->mode &= ~LE_MO_PROM;
996 lance_load_multicast(dev);
997 }
998 load_csrs(lp);
999 init_restart_lance(lp);
1000 dev->tbusy = 0;
1001 }
1002
1003 static int __init dec_lance_init(struct net_device *dev, const int type)
1004 {
1005 static unsigned version_printed = 0;
1006 struct lance_private *lp;
1007 volatile struct lance_regs *ll;
1008 int i;
1009 unsigned long esar_base;
1010 unsigned char *esar;
1011
1012 #ifndef CONFIG_TC
1013 system_base = KN01_LANCE_BASE;
1014 #else
1015 int slot;
1016 #endif
1017
1018 if (dec_lance_debug && version_printed++ == 0)
1019 printk(version);
1020
1021 if (dev == NULL) {
1022 dev = init_etherdev(0, sizeof(struct lance_private) + 8);
1023 } else {
1024 dev->priv = kmalloc(sizeof(struct lance_private) + 8,
1025 GFP_KERNEL);
1026 if (dev->priv == NULL)
1027 return -ENOMEM;
1028 memset(dev->priv, 0, sizeof(struct lance_private) + 8);
1029
1030 }
1031
1032 /* Make certain the data structures used by the LANCE are aligned. */
1033 dev->priv = (void *) (((unsigned long) dev->priv + 7) & ~7);
1034 lp = (struct lance_private *) dev->priv;
1035
1036 switch (type) {
1037 #ifdef CONFIG_TC
1038 case ASIC_LANCE:
1039 dev->base_addr = system_base + LANCE;
1040
1041 /* buffer space for the on-board LANCE shared memory */
1042 /*
1043 * FIXME: ugly hack!
1044 */
1045 dev->mem_start = KSEG1ADDR(0x0020000);
1046 dev->mem_end = dev->mem_start + 0x00020000;
1047 dev->irq = ETHER;
1048 esar_base = system_base + ESAR;
1049
1050 /*
1051 * setup the pointer arrays, this sucks [tm] :-(
1052 */
1053 for (i = 0; i < RX_RING_SIZE; i++) {
1054 lp->rx_buf_ptr_cpu[i] = (char *) (dev->mem_start + BUF_OFFSET_CPU
1055 + 2 * i * RX_BUFF_SIZE);
1056 lp->rx_buf_ptr_lnc[i] = (char *) (BUF_OFFSET_LNC
1057 + i * RX_BUFF_SIZE);
1058 }
1059 for (i = 0; i < TX_RING_SIZE; i++) {
1060 lp->tx_buf_ptr_cpu[i] = (char *) (dev->mem_start + BUF_OFFSET_CPU
1061 + 2 * RX_RING_SIZE * RX_BUFF_SIZE
1062 + 2 * i * TX_BUFF_SIZE);
1063 lp->tx_buf_ptr_lnc[i] = (char *) (BUF_OFFSET_LNC
1064 + RX_RING_SIZE * RX_BUFF_SIZE
1065 + i * TX_BUFF_SIZE);
1066 }
1067
1068 /*
1069 * setup and enable IOASIC LANCE DMA
1070 */
1071 lp->dma_ptr_reg = (unsigned long *) (system_base + IOCTL + LANCE_DMA_P);
1072 *(lp->dma_ptr_reg) = PHYSADDR(dev->mem_start) << 3;
1073 *(unsigned long *) (system_base + IOCTL + SSR) |= (1 << 16);
1074
1075 break;
1076 case PMAD_LANCE:
1077 slot = search_tc_card("PMAD-AA");
1078 claim_tc_card(slot);
1079
1080 dev->mem_start = get_tc_base_addr(slot);
1081 dev->base_addr = dev->mem_start + 0x100000;
1082 dev->irq = get_tc_irq_nr(slot);
1083 esar_base = dev->mem_start + 0x1c0002;
1084 break;
1085 #endif
1086 case PMAX_LANCE:
1087 dev->irq = ETHER;
1088 dev->base_addr = KN01_LANCE_BASE;
1089 dev->mem_start = KN01_LANCE_BASE + 0x01000000;
1090 esar_base = KN01_RTC_BASE + 1;
1091 /*
1092 * setup the pointer arrays, this sucks [tm] :-(
1093 */
1094 for (i = 0; i < RX_RING_SIZE; i++) {
1095 lp->rx_buf_ptr_cpu[i] =
1096 (char *) (dev->mem_start + BUF_OFFSET_CPU
1097 + 2 * i * RX_BUFF_SIZE);
1098
1099 lp->rx_buf_ptr_lnc[i] =
1100 (char *) (BUF_OFFSET_LNC
1101 + i * RX_BUFF_SIZE);
1102
1103 }
1104 for (i = 0; i < TX_RING_SIZE; i++) {
1105 lp->tx_buf_ptr_cpu[i] =
1106 (char *) (dev->mem_start + BUF_OFFSET_CPU
1107 + 2 * RX_RING_SIZE * RX_BUFF_SIZE
1108 + 2 * i * TX_BUFF_SIZE);
1109 lp->tx_buf_ptr_lnc[i] = (char *) (BUF_OFFSET_LNC
1110 + RX_RING_SIZE * RX_BUFF_SIZE
1111 + i * TX_BUFF_SIZE);
1112
1113 }
1114 break;
1115 default:
1116 printk("declance_init called with unknown type\n");
1117 return -ENODEV;
1118 break;
1119 }
1120
1121 ll = (struct lance_regs *) dev->base_addr;
1122 esar = (unsigned char *) esar_base;
1123
1124 /* prom checks */
1125 /* First, check for test pattern */
1126 if (esar[0x60] != 0xff && esar[0x64] != 0x00 &&
1127 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) {
1128 printk("Ethernet station address prom not found!\n");
1129 return -ENODEV;
1130 }
1131 /* Check the prom contents */
1132 for (i = 0; i < 8; i++) {
1133 if (esar[i * 4] != esar[0x3c - i * 4] &&
1134 esar[i * 4] != esar[0x40 + i * 4] &&
1135 esar[0x3c - i * 4] != esar[0x40 + i * 4]) {
1136 printk("Something is wrong with the ethernet "
1137 "station address prom!\n");
1138 return -ENODEV;
1139 }
1140 }
1141
1142 /* Copy the ethernet address to the device structure, later to the
1143 * lance initialization block so the lance gets it every time it's
1144 * (re)initialized.
1145 */
1146 switch (type) {
1147 case ASIC_LANCE:
1148 printk("%s: IOASIC onboard LANCE, addr = ", dev->name);
1149 break;
1150 case PMAD_LANCE:
1151 printk("%s: PMAD-AA, addr = ", dev->name);
1152 break;
1153 case PMAX_LANCE:
1154 printk("%s: PMAX onboard LANCE, addr = ", dev->name);
1155 break;
1156 }
1157 for (i = 0; i < 6; i++) {
1158 dev->dev_addr[i] = esar[i * 4];
1159 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ',' : ':');
1160 }
1161
1162 printk(" irq = %d\n", dev->irq);
1163
1164 /* Fill the dev fields */
1165
1166 dev->open = lance_open;
1167 dev->stop = lance_close;
1168 dev->hard_start_xmit = lance_start_xmit;
1169 dev->get_stats = lance_get_stats;
1170 dev->set_multicast_list = lance_set_multicast;
1171 dev->dma = 0;
1172
1173 /* lp->ll is the location of the registers for lance card */
1174 lp->ll = ll;
1175
1176 lp->name = lancestr;
1177
1178 /* busmaster_regval (CSR3) should be zero according to the PMAD-AA
1179 * specification.
1180 */
1181 lp->busmaster_regval = 0;
1182 lp->dev = dev;
1183
1184 ether_setup(dev);
1185 /*
1186 #ifdef MODULE
1187 dev->ifindex = dev_new_index();
1188 lp->next_module = root_lance_dev;
1189 root_lance_dev = lp;
1190 #endif
1191 */
1192 return 0;
1193 }
1194
1195
1196 /* Find all the lance cards on the system and initialize them */
1197 int __init dec_lance_probe(struct net_device *dev)
1198 {
1199 static int called = 0;
1200
1201 #ifdef CONFIG_TC
1202 int slot = -1;
1203
1204 if (TURBOCHANNEL) {
1205 if (IOASIC && !called) {
1206 called = 1;
1207 type = ASIC_LANCE;
1208 } else {
1209 if ((slot = search_tc_card("PMAD-AA")) >= 0) {
1210 type = PMAD_LANCE;
1211 } else {
1212 return -ENODEV;
1213 }
1214 }
1215 } else {
1216 if (!called) {
1217 called = 1;
1218 type = PMAX_LANCE;
1219 } else {
1220 return -ENODEV;
1221 }
1222 }
1223 #else
1224 if (!called && !TURBOCHANNEL) {
1225 called = 1;
1226 type = PMAX_LANCE;
1227 } else {
1228 return -ENODEV;
1229 }
1230 #endif
1231
1232 return dec_lance_init(dev, type);
1233 }
1234
1235 /*
1236 #ifdef MODULE
1237
1238 int
1239 init_module(void)
1240 {
1241 root_lance_dev = NULL;
1242 return dec_lance_probe(NULL);
1243 }
1244
1245 void
1246 cleanup_module(void)
1247 {
1248 struct lance_private *lp;
1249
1250 while (root_lance_dev) {
1251 lp = root_lance_dev->next_module;
1252
1253 unregister_netdev(root_lance_dev->dev);
1254 kfree(root_lance_dev->dev);
1255 root_lance_dev = lp;
1256 }
1257 }
1258
1259 #endif -* MODULE */