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* add p cc
[mascara-docs.git] / i386 / linux / linux-2.3.21 / drivers / net / irda / w83977af_ir.c
blob0885e74a3037049d3d77856f56363b30e9aaffc0
1 /*********************************************************************
2 *
3 * Filename: w83977af_ir.c
4 * Version: 1.0
5 * Description: FIR driver for the Winbond W83977AF Super I/O chip
6 * Status: Experimental.
7 * Author: Paul VanderSpek
8 * Created at: Wed Nov 4 11:46:16 1998
9 * Modified at: Wed Aug 11 09:27:54 1999
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
11 *
12 * Copyright (c) 1998-1999 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998 Corel Computer Corp.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * Neither Paul VanderSpek nor Corel Computer Corp. admit liability
21 * nor provide warranty for any of this software. This material is
22 * provided "AS-IS" and at no charge.
23 *
24 * If you find bugs in this file, its very likely that the same bug
25 * will also be in pc87108.c since the implementations is quite
26 * similar.
27 *
28 * Notice that all functions that needs to access the chip in _any_
29 * way, must save BSR register on entry, and restore it on exit.
30 * It is _very_ important to follow this policy!
31 *
32 * __u8 bank;
33 *
34 * bank = inb( iobase+BSR);
35 *
36 * do_your_stuff_here();
37 *
38 * outb( bank, iobase+BSR);
39 *
40 ********************************************************************/
41
42 #include <linux/module.h>
43
44 #include <linux/kernel.h>
45 #include <linux/types.h>
46 #include <linux/skbuff.h>
47 #include <linux/netdevice.h>
48 #include <linux/ioport.h>
49 #include <linux/delay.h>
50 #include <linux/malloc.h>
51 #include <linux/init.h>
52
53 #include <asm/io.h>
54 #include <asm/dma.h>
55 #include <asm/byteorder.h>
56
57 #include <net/irda/irda.h>
58 #include <net/irda/irmod.h>
59 #include <net/irda/wrapper.h>
60 #include <net/irda/irda_device.h>
61 #include <net/irda/w83977af.h>
62 #include <net/irda/w83977af_ir.h>
63
64 #define CONFIG_NETWINDER /* Adjust to NetWinder differences */
65 #undef CONFIG_NETWINDER_TX_DMA_PROBLEMS /* Not needed */
66 #define CONFIG_NETWINDER_RX_DMA_PROBLEMS /* Must have this one! */
67 #undef CONFIG_USE_INTERNAL_TIMER /* Just cannot make that timer work */
68 #define CONFIG_USE_W977_PNP /* Currently needed */
69 #define PIO_MAX_SPEED 115200
70
71 static char *driver_name = "w83977af_ir";
72 static int qos_mtt_bits = 0x07; /* 1 ms or more */
73
74 #define CHIP_IO_EXTENT 8
75
76 static unsigned int io[] = { 0x180, ~0, ~0, ~0 };
77 static unsigned int irq[] = { 6, 0, 0, 0 };
78 static unsigned int dma[] =
79 { 1, 0, 0, 0 };
80
81 static struct w83977af_ir *dev_self[] = { NULL, NULL, NULL, NULL};
82
83 /* Some prototypes */
84 static int w83977af_open(int i, unsigned int iobase, unsigned int irq,
85 unsigned int dma);
86 static int w83977af_close(struct irda_device *idev);
87 static int w83977af_probe(int iobase, int irq, int dma);
88 static int w83977af_dma_receive(struct irda_device *idev);
89 static int w83977af_dma_receive_complete(struct irda_device *idev);
90 static int w83977af_hard_xmit(struct sk_buff *skb, struct net_device *dev);
91 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
92 static void w83977af_dma_write(struct irda_device *idev, int iobase);
93 static void w83977af_change_speed(struct irda_device *idev, __u32 speed);
94 static void w83977af_interrupt(int irq, void *dev_id, struct pt_regs *regs);
95 static void w83977af_wait_until_sent(struct irda_device *idev);
96 static int w83977af_is_receiving(struct irda_device *idev);
97
98 static int w83977af_net_init(struct net_device *dev);
99 static int w83977af_net_open(struct net_device *dev);
100 static int w83977af_net_close(struct net_device *dev);
101
102 /*
103 * Function w83977af_init ()
104 *
105 * Initialize chip. Just try to find out how many chips we are dealing with
106 * and where they are
107 */
108 int __init w83977af_init(void)
109 {
110 int i;
111
112 DEBUG(0, __FUNCTION__ "()\n");
113
114 for (i=0; (io[i] < 2000) && (i < 4); i++) {
115 int ioaddr = io[i];
116 if (check_region(ioaddr, CHIP_IO_EXTENT) < 0)
117 continue;
118 if (w83977af_open( i, io[i], irq[i], dma[i]) == 0)
119 return 0;
120 }
121 return -ENODEV;
122 }
123
124 /*
125 * Function w83977af_cleanup ()
126 *
127 * Close all configured chips
128 *
129 */
130 #ifdef MODULE
131 void w83977af_cleanup(void)
132 {
133 int i;
134
135 DEBUG(4, __FUNCTION__ "()\n");
136
137 for (i=0; i < 4; i++) {
138 if (dev_self[i])
139 w83977af_close(&(dev_self[i]->idev));
140 }
141 }
142 #endif /* MODULE */
143
144 /*
145 * Function w83977af_open (iobase, irq)
146 *
147 * Open driver instance
148 *
149 */
150 int w83977af_open( int i, unsigned int iobase, unsigned int irq,
151 unsigned int dma)
152 {
153 struct irda_device *idev;
154 struct w83977af_ir *self;
155 int ret;
156
157 DEBUG( 0, __FUNCTION__ "()\n");
158
159 if (w83977af_probe(iobase, irq, dma) == -1)
160 return -1;
161
162 /*
163 * Allocate new instance of the driver
164 */
165 self = kmalloc(sizeof(struct w83977af_ir), GFP_KERNEL);
166 if (self == NULL) {
167 printk( KERN_ERR "IrDA: Can't allocate memory for "
168 "IrDA control block!\n");
169 return -ENOMEM;
170 }
171 memset(self, 0, sizeof(struct w83977af_ir));
172
173 /* Need to store self somewhere */
174 dev_self[i] = self;
175
176 idev = &self->idev;
177
178 /* Initialize IO */
179 idev->io.iobase = iobase;
180 idev->io.irq = irq;
181 idev->io.io_ext = CHIP_IO_EXTENT;
182 idev->io.dma = dma;
183 idev->io.fifo_size = 32;
184
185 /* Lock the port that we need */
186 ret = check_region(idev->io.iobase, idev->io.io_ext);
187 if (ret < 0) {
188 DEBUG( 0, __FUNCTION__ "(), can't get iobase of 0x%03x\n",
189 idev->io.iobase);
190 /* w83977af_cleanup( self->idev); */
191 return -ENODEV;
192 }
193 request_region(idev->io.iobase, idev->io.io_ext, idev->name);
194
195 /* Initialize QoS for this device */
196 irda_init_max_qos_capabilies(&idev->qos);
197
198 /* The only value we must override it the baudrate */
199
200 /* FIXME: The HP HDLS-1100 does not support 1152000! */
201 idev->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
202 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
203
204 /* The HP HDLS-1100 needs 1 ms according to the specs */
205 idev->qos.min_turn_time.bits = qos_mtt_bits;
206 irda_qos_bits_to_value(&idev->qos);
207
208 idev->flags = IFF_FIR|IFF_MIR|IFF_SIR|IFF_DMA|IFF_PIO;
209
210 /* Specify which buffer allocation policy we need */
211 idev->rx_buff.flags = GFP_KERNEL | GFP_DMA;
212 idev->tx_buff.flags = GFP_KERNEL | GFP_DMA;
213
214 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
215 idev->rx_buff.truesize = 14384;
216 idev->tx_buff.truesize = 4000;
217
218 /* Initialize callbacks */
219 idev->change_speed = w83977af_change_speed;
220 idev->wait_until_sent = w83977af_wait_until_sent;
221 idev->is_receiving = w83977af_is_receiving;
222
223 /* Override the network functions we need to use */
224 idev->netdev.init = w83977af_net_init;
225 idev->netdev.hard_start_xmit = w83977af_hard_xmit;
226 idev->netdev.open = w83977af_net_open;
227 idev->netdev.stop = w83977af_net_close;
228
229 /* Open the IrDA device */
230 irda_device_open(idev, driver_name, self);
231
232 return 0;
233 }
234
235 /*
236 * Function w83977af_close (idev)
237 *
238 * Close driver instance
239 *
240 */
241 static int w83977af_close( struct irda_device *idev)
242 {
243 struct w83977af_ir *self;
244 int iobase;
245
246 DEBUG(0, __FUNCTION__ "()\n");
247
248 ASSERT(idev != NULL, return -1;);
249 ASSERT(idev->magic == IRDA_DEVICE_MAGIC, return -1;);
250
251 iobase = idev->io.iobase;
252 self = (struct w83977af_ir *) idev->priv;
253
254 #ifdef CONFIG_USE_W977_PNP
255 /* enter PnP configuration mode */
256 w977_efm_enter();
257
258 w977_select_device(W977_DEVICE_IR);
259
260 /* Deactivate device */
261 w977_write_reg(0x30, 0x00);
262
263 w977_efm_exit();
264 #endif /* CONFIG_USE_W977_PNP */
265 /* Release the PORT that this driver is using */
266 DEBUG(0 , __FUNCTION__ "(), Releasing Region %03x\n",
267 idev->io.iobase);
268 release_region(idev->io.iobase, idev->io.io_ext);
269
270 irda_device_close(idev);
271
272 kfree(self);
273
274 return 0;
275 }
276
277 /*
278 * Function w83977af_probe (iobase, irq, dma)
279 *
280 * Returns non-negative on success.
281 *
282 */
283 int w83977af_probe( int iobase, int irq, int dma)
284 {
285 int version;
286
287 DEBUG( 0, __FUNCTION__ "()\n");
288 #ifdef CONFIG_USE_W977_PNP
289 /* Enter PnP configuration mode */
290 w977_efm_enter();
291
292 w977_select_device(W977_DEVICE_IR);
293
294 /* Configure PnP port, IRQ, and DMA channel */
295 w977_write_reg(0x60, (iobase >> 8) & 0xff);
296 w977_write_reg(0x61, (iobase) & 0xff);
297
298 w977_write_reg(0x70, irq);
299 #ifdef CONFIG_NETWINDER
300 w977_write_reg(0x74, dma+1); /* Netwinder uses 1 higher than Linux */
301 #else
302 w977_write_reg(0x74, dma);
303 #endif
304 w977_write_reg(0x75, 0x04); /* Disable Tx DMA */
305
306 /* Set append hardware CRC, enable IR bank selection */
307 w977_write_reg(0xf0, APEDCRC|ENBNKSEL);
308
309 /* Activate device */
310 w977_write_reg(0x30, 0x01);
311
312 w977_efm_exit();
313 #endif
314 /* Disable Advanced mode */
315 switch_bank(iobase, SET2);
316 outb(iobase+2, 0x00);
317
318 /* Turn on UART (global) interrupts */
319 switch_bank(iobase, SET0);
320 outb(HCR_EN_IRQ, iobase+HCR);
321
322 /* Switch to advanced mode */
323 switch_bank(iobase, SET2);
324 outb(inb(iobase+ADCR1) | ADCR1_ADV_SL, iobase+ADCR1);
325
326 /* Set default IR-mode */
327 switch_bank(iobase, SET0);
328 outb(HCR_SIR, iobase+HCR);
329
330 /* Read the Advanced IR ID */
331 switch_bank(iobase, SET3);
332 version = inb(iobase+AUID);
333
334 /* Should be 0x1? */
335 if (0x10 != (version & 0xf0)) {
336 DEBUG( 0, __FUNCTION__ "(), Wrong chip version");
337 return -1;
338 }
339
340 /* Set FIFO size to 32 */
341 switch_bank(iobase, SET2);
342 outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2);
343
344 /* Set FIFO threshold to TX17, RX16 */
345 switch_bank(iobase, SET0);
346 outb(UFR_RXTL|UFR_TXTL|UFR_TXF_RST|UFR_RXF_RST|UFR_EN_FIFO,iobase+UFR);
347
348 /* Receiver frame length */
349 switch_bank(iobase, SET4);
350 outb(2048 & 0xff, iobase+6);
351 outb((2048 >> 8) & 0x1f, iobase+7);
352
353 /*
354 * Init HP HSDL-1100 transceiver.
355 *
356 * Set IRX_MSL since we have 2 * receive paths IRRX, and
357 * IRRXH. Clear IRSL0D since we want IRSL0 * to be a input pin used
358 * for IRRXH
359 *
360 * IRRX pin 37 connected to receiver
361 * IRTX pin 38 connected to transmitter
362 * FIRRX pin 39 connected to receiver (IRSL0)
363 * CIRRX pin 40 connected to pin 37
364 */
365 switch_bank(iobase, SET7);
366 outb(0x40, iobase+7);
367
368 DEBUG(0, "W83977AF (IR) driver loaded. Version: 0x%02x\n", version);
369
370 return 0;
371 }
372
373 /*
374 * Function w83977af_change_speed (idev, baud)
375 *
376 * Change the speed of the device
377 *
378 */
379 void w83977af_change_speed(struct irda_device *idev, __u32 speed)
380 {
381 int ir_mode = HCR_SIR;
382 int iobase;
383 __u8 set;
384
385 ASSERT(idev != NULL, return;);
386 ASSERT(idev->magic == IRDA_DEVICE_MAGIC, return;);
387
388 iobase = idev->io.iobase;
389
390 /* Update accounting for new speed */
391 idev->io.baudrate = speed;
392
393 /* Save current bank */
394 set = inb(iobase+SSR);
395
396 /* Disable interrupts */
397 switch_bank(iobase, SET0);
398 outb(0, iobase+ICR);
399
400 /* Select Set 2 */
401 switch_bank(iobase, SET2);
402 outb(0x00, iobase+ABHL);
403
404 switch (speed) {
405 case 9600: outb(0x0c, iobase+ABLL); break;
406 case 19200: outb(0x06, iobase+ABLL); break;
407 case 37600: outb(0x03, iobase+ABLL); break;
408 case 57600: outb(0x02, iobase+ABLL); break;
409 case 115200: outb(0x01, iobase+ABLL); break;
410 case 576000:
411 ir_mode = HCR_MIR_576;
412 DEBUG(0, __FUNCTION__ "(), handling baud of 576000\n");
413 break;
414 case 1152000:
415 ir_mode = HCR_MIR_1152;
416 DEBUG(0, __FUNCTION__ "(), handling baud of 1152000\n");
417 break;
418 case 4000000:
419 ir_mode = HCR_FIR;
420 DEBUG(0, __FUNCTION__ "(), handling baud of 4000000\n");
421 break;
422 default:
423 ir_mode = HCR_FIR;
424 DEBUG(0, __FUNCTION__ "(), unknown baud rate of %d\n", speed);
425 break;
426 }
427
428 /* Set speed mode */
429 switch_bank(iobase, SET0);
430 outb(ir_mode, iobase+HCR);
431
432 /* set FIFO size to 32 */
433 switch_bank(iobase, SET2);
434 outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2);
435
436 /* set FIFO threshold to TX17, RX16 */
437 switch_bank(iobase, SET0);
438
439 outb(0x00, iobase+UFR); /* Reset */
440 outb(UFR_EN_FIFO, iobase+UFR); /* First we must enable FIFO */
441 outb(0xa7, iobase+UFR);
442
443 idev->netdev.tbusy = 0;
444
445 /* Enable some interrupts so we can receive frames */
446 switch_bank(iobase, SET0);
447 if (speed > PIO_MAX_SPEED) {
448 outb(ICR_EFSFI, iobase+ICR);
449 w83977af_dma_receive(idev);
450 } else
451 outb(ICR_ERBRI, iobase+ICR);
452
453 /* Restore SSR */
454 outb(set, iobase+SSR);
455 }
456
457 /*
458 * Function w83977af_hard_xmit (skb, dev)
459 *
460 * Sets up a DMA transfer to send the current frame.
461 *
462 */
463 int w83977af_hard_xmit(struct sk_buff *skb, struct net_device *dev)
464 {
465 struct irda_device *idev;
466 int iobase;
467 __u8 set;
468 int mtt;
469
470 idev = (struct irda_device *) dev->priv;
471
472 ASSERT(idev != NULL, return 0;);
473 ASSERT(idev->magic == IRDA_DEVICE_MAGIC, return 0;);
474
475 iobase = idev->io.iobase;
476
477 DEBUG(4, __FUNCTION__ "(%ld), skb->len=%d\n", jiffies, (int) skb->len);
478
479 /* Lock transmit buffer */
480 if (irda_lock((void *) &dev->tbusy) == FALSE)
481 return -EBUSY;
482
483 /* Save current set */
484 set = inb(iobase+SSR);
485
486 /* Decide if we should use PIO or DMA transfer */
487 if (idev->io.baudrate > PIO_MAX_SPEED) {
488 idev->tx_buff.data = idev->tx_buff.head;
489 memcpy(idev->tx_buff.data, skb->data, skb->len);
490 idev->tx_buff.len = skb->len;
491
492 mtt = irda_get_mtt(skb);
493 #ifdef CONFIG_USE_INTERNAL_TIMER
494 if (mtt > 50) {
495 /* Adjust for timer resolution */
496 mtt /= 1000+1;
497
498 /* Setup timer */
499 switch_bank(iobase, SET4);
500 outb(mtt & 0xff, iobase+TMRL);
501 outb((mtt >> 8) & 0x0f, iobase+TMRH);
502
503 /* Start timer */
504 outb(IR_MSL_EN_TMR, iobase+IR_MSL);
505 idev->io.direction = IO_XMIT;
506
507 /* Enable timer interrupt */
508 switch_bank(iobase, SET0);
509 outb(ICR_ETMRI, iobase+ICR);
510 } else {
511 #endif
512 DEBUG(4,__FUNCTION__ "(%ld), mtt=%d\n", jiffies, mtt);
513 if (mtt)
514 udelay(mtt);
515
516 /* Enable DMA interrupt */
517 switch_bank(iobase, SET0);
518 outb(ICR_EDMAI, iobase+ICR);
519 w83977af_dma_write(idev, iobase);
520 #ifdef CONFIG_USE_INTERNAL_TIMER
521 }
522 #endif
523 } else {
524 idev->tx_buff.data = idev->tx_buff.head;
525 idev->tx_buff.len = async_wrap_skb(skb, idev->tx_buff.data,
526 idev->tx_buff.truesize);
527
528 /* Add interrupt on tx low level (will fire immediately) */
529 switch_bank(iobase, SET0);
530 outb(ICR_ETXTHI, iobase+ICR);
531 }
532 dev_kfree_skb(skb);
533
534 /* Restore set register */
535 outb(set, iobase+SSR);
536
537 return 0;
538 }
539
540 /*
541 * Function w83977af_dma_write (idev, iobase)
542 *
543 * Send frame using DMA
544 *
545 */
546 static void w83977af_dma_write(struct irda_device *idev, int iobase)
547 {
548 __u8 set;
549 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
550 unsigned long flags;
551 __u8 hcr;
552 #endif
553 DEBUG(4, __FUNCTION__ "(), len=%d\n", idev->tx_buff.len);
554
555 /* Save current set */
556 set = inb(iobase+SSR);
557
558 /* Disable DMA */
559 switch_bank(iobase, SET0);
560 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
561
562 /* Choose transmit DMA channel */
563 switch_bank(iobase, SET2);
564 outb(ADCR1_D_CHSW|/*ADCR1_DMA_F|*/ADCR1_ADV_SL, iobase+ADCR1);
565 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
566 save_flags(flags);
567 cli();
568
569 disable_dma(idev->io.dma);
570 clear_dma_ff(idev->io.dma);
571 set_dma_mode(idev->io.dma, DMA_MODE_READ);
572 set_dma_addr(idev->io.dma, virt_to_bus(idev->tx_buff.data));
573 set_dma_count(idev->io.dma, idev->tx_buff.len);
574 #else
575 setup_dma(idev->io.dma, idev->tx_buff.data, idev->tx_buff.len,
576 DMA_MODE_WRITE);
577 #endif
578 idev->io.direction = IO_XMIT;
579
580 /* Enable DMA */
581 switch_bank(iobase, SET0);
582 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
583 hcr = inb(iobase+HCR);
584 outb(hcr | HCR_EN_DMA, iobase+HCR);
585 enable_dma(idev->io.dma);
586 restore_flags(flags);
587 #else
588 outb(inb(iobase+HCR) | HCR_EN_DMA | HCR_TX_WT, iobase+HCR);
589 #endif
590
591 /* Restore set register */
592 outb(set, iobase+SSR);
593 }
594
595 /*
596 * Function w83977af_pio_write (iobase, buf, len, fifo_size)
597 *
598 *
599 *
600 */
601 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
602 {
603 int actual = 0;
604 __u8 set;
605
606 DEBUG(4, __FUNCTION__ "()\n");
607
608 /* Save current bank */
609 set = inb(iobase+SSR);
610
611 switch_bank(iobase, SET0);
612 if (!(inb_p(iobase+USR) & USR_TSRE)) {
613 DEBUG(4, __FUNCTION__ "(), warning, FIFO not empty yet!\n");
614
615 fifo_size -= 17;
616 DEBUG(4, __FUNCTION__ "%d bytes left in tx fifo\n", fifo_size);
617 }
618
619 /* Fill FIFO with current frame */
620 while ((fifo_size-- > 0) && (actual < len)) {
621 /* Transmit next byte */
622 outb(buf[actual++], iobase+TBR);
623 }
624
625 DEBUG(4, __FUNCTION__ "(), fifo_size %d ; %d sent of %d\n",
626 fifo_size, actual, len);
627
628 /* Restore bank */
629 outb(set, iobase+SSR);
630
631 return actual;
632 }
633
634 /*
635 * Function w83977af_dma_xmit_complete (idev)
636 *
637 * The transfer of a frame in finished. So do the necessary things
638 *
639 *
640 */
641 void w83977af_dma_xmit_complete(struct irda_device *idev)
642 {
643 int iobase;
644 __u8 set;
645
646 DEBUG(4, __FUNCTION__ "(%ld)\n", jiffies);
647
648 ASSERT(idev != NULL, return;);
649 ASSERT(idev->magic == IRDA_DEVICE_MAGIC, return;);
650
651 iobase = idev->io.iobase;
652
653 /* Save current set */
654 set = inb(iobase+SSR);
655
656 /* Disable DMA */
657 switch_bank(iobase, SET0);
658 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
659
660 /* Check for underrrun! */
661 if (inb(iobase+AUDR) & AUDR_UNDR) {
662 DEBUG(0, __FUNCTION__ "(), Transmit underrun!\n");
663
664 idev->stats.tx_errors++;
665 idev->stats.tx_fifo_errors++;
666
667 /* Clear bit, by writing 1 to it */
668 outb(AUDR_UNDR, iobase+AUDR);
669 } else
670 idev->stats.tx_packets++;
671
672 /* Unlock tx_buff and request another frame */
673 idev->netdev.tbusy = 0; /* Unlock */
674 idev->media_busy = FALSE;
675
676 /* Tell the network layer, that we want more frames */
677 mark_bh(NET_BH);
678
679 /* Restore set */
680 outb(set, iobase+SSR);
681 }
682
683 /*
684 * Function w83977af_dma_receive (idev)
685 *
686 * Get ready for receiving a frame. The device will initiate a DMA
687 * if it starts to receive a frame.
688 *
689 */
690 int w83977af_dma_receive(struct irda_device *idev)
691 {
692 struct w83977af_ir *self;
693 int iobase;
694 __u8 set;
695 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
696 unsigned long flags;
697 __u8 hcr;
698 #endif
699
700 ASSERT(idev != NULL, return -1;);
701 ASSERT(idev->magic == IRDA_DEVICE_MAGIC, return -1;);
702
703 DEBUG(4, __FUNCTION__ "\n");
704
705 self = idev->priv;
706 iobase= idev->io.iobase;
707
708 /* Save current set */
709 set = inb(iobase+SSR);
710
711 /* Disable DMA */
712 switch_bank(iobase, SET0);
713 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
714
715 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
716 switch_bank(iobase, SET2);
717 outb((inb(iobase+ADCR1) & ~ADCR1_D_CHSW)/*|ADCR1_DMA_F*/|ADCR1_ADV_SL,
718 iobase+ADCR1);
719
720 idev->io.direction = IO_RECV;
721 idev->rx_buff.data = idev->rx_buff.head;
722
723 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
724 save_flags(flags);
725 cli();
726
727 disable_dma(idev->io.dma);
728 clear_dma_ff(idev->io.dma);
729 set_dma_mode(idev->io.dma, DMA_MODE_READ);
730 set_dma_addr(idev->io.dma, virt_to_bus(idev->rx_buff.data));
731 set_dma_count(idev->io.dma, idev->rx_buff.truesize);
732 #else
733 setup_dma(idev->io.dma, idev->rx_buff.data, idev->rx_buff.truesize,
734 DMA_MODE_READ);
735 #endif
736 /*
737 * Reset Rx FIFO. This will also flush the ST_FIFO, it's very
738 * important that we don't reset the Tx FIFO since it might not
739 * be finished transmitting yet
740 */
741 switch_bank(iobase, SET0);
742 outb(UFR_RXTL|UFR_TXTL|UFR_RXF_RST|UFR_EN_FIFO, iobase+UFR);
743 self->st_fifo.len = self->st_fifo.tail = self->st_fifo.head = 0;
744
745 /* Enable DMA */
746 switch_bank(iobase, SET0);
747 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
748 hcr = inb(iobase+HCR);
749 outb(hcr | HCR_EN_DMA, iobase+HCR);
750 enable_dma(idev->io.dma);
751 restore_flags(flags);
752 #else
753 outb(inb(iobase+HCR) | HCR_EN_DMA, iobase+HCR);
754 #endif
755 /* Restore set */
756 outb(set, iobase+SSR);
757
758 return 0;
759 }
760
761 /*
762 * Function w83977af_receive_complete (idev)
763 *
764 * Finished with receiving a frame
765 *
766 */
767 int w83977af_dma_receive_complete(struct irda_device *idev)
768 {
769 struct sk_buff *skb;
770 struct w83977af_ir *self;
771 struct st_fifo *st_fifo;
772 int len;
773 int iobase;
774 __u8 set;
775 __u8 status;
776
777 DEBUG(4, __FUNCTION__ "\n");
778
779 self = idev->priv;
780 st_fifo = &self->st_fifo;
781
782 iobase = idev->io.iobase;
783
784 /* Save current set */
785 set = inb(iobase+SSR);
786
787 iobase = idev->io.iobase;
788
789 /* Read status FIFO */
790 switch_bank(iobase, SET5);
791 while ((status = inb(iobase+FS_FO)) & FS_FO_FSFDR) {
792 st_fifo->entries[st_fifo->tail].status = status;
793
794 st_fifo->entries[st_fifo->tail].len = inb(iobase+RFLFL);
795 st_fifo->entries[st_fifo->tail].len |= inb(iobase+RFLFH) << 8;
796
797 st_fifo->tail++;
798 st_fifo->len++;
799 }
800
801 while (st_fifo->len) {
802 /* Get first entry */
803 status = st_fifo->entries[st_fifo->head].status;
804 len = st_fifo->entries[st_fifo->head].len;
805 st_fifo->head++;
806 st_fifo->len--;
807
808 /* Check for errors */
809 if (status & FS_FO_ERR_MSK) {
810 if (status & FS_FO_LST_FR) {
811 /* Add number of lost frames to stats */
812 idev->stats.rx_errors += len;
813 } else {
814 /* Skip frame */
815 idev->stats.rx_errors++;
816
817 idev->rx_buff.data += len;
818
819 if (status & FS_FO_MX_LEX)
820 idev->stats.rx_length_errors++;
821
822 if (status & FS_FO_PHY_ERR)
823 idev->stats.rx_frame_errors++;
824
825 if (status & FS_FO_CRC_ERR)
826 idev->stats.rx_crc_errors++;
827 }
828 /* The errors below can be reported in both cases */
829 if (status & FS_FO_RX_OV)
830 idev->stats.rx_fifo_errors++;
831
832 if (status & FS_FO_FSF_OV)
833 idev->stats.rx_fifo_errors++;
834
835 } else {
836 /* Check if we have transfered all data to memory */
837 switch_bank(iobase, SET0);
838 if (inb(iobase+USR) & USR_RDR) {
839 #ifdef CONFIG_USE_INTERNAL_TIMER
840 /* Put this entry back in fifo */
841 st_fifo->head--;
842 st_fifo->len++;
843 st_fifo->entries[st_fifo->head].status = status;
844 st_fifo->entries[st_fifo->head].len = len;
845
846 /* Restore set register */
847 outb(set, iobase+SSR);
848
849 return FALSE; /* I'll be back! */
850 #else
851 udelay(80); /* Should be enough!? */
852 #endif
853 }
854
855 skb = dev_alloc_skb(len+1);
856 if (skb == NULL) {
857 printk(KERN_INFO __FUNCTION__
858 "(), memory squeeze, dropping frame.\n");
859 /* Restore set register */
860 outb(set, iobase+SSR);
861
862 return FALSE;
863 }
864
865 /* Align to 20 bytes */
866 skb_reserve(skb, 1);
867
868 /* Copy frame without CRC */
869 if (idev->io.baudrate < 4000000) {
870 skb_put(skb, len-2);
871 memcpy(skb->data, idev->rx_buff.data, len-2);
872 } else {
873 skb_put(skb, len-4);
874 memcpy(skb->data, idev->rx_buff.data, len-4);
875 }
876
877 /* Move to next frame */
878 idev->rx_buff.data += len;
879 idev->stats.rx_packets++;
880
881 skb->dev = &idev->netdev;
882 skb->mac.raw = skb->data;
883 skb->protocol = htons(ETH_P_IRDA);
884 netif_rx(skb);
885 }
886 }
887 /* Restore set register */
888 outb(set, iobase+SSR);
889
890 return TRUE;
891 }
892
893 /*
894 * Function pc87108_pio_receive (idev)
895 *
896 * Receive all data in receiver FIFO
897 *
898 */
899 static void w83977af_pio_receive(struct irda_device *idev)
900 {
901 __u8 byte = 0x00;
902 int iobase;
903
904 DEBUG(4, __FUNCTION__ "()\n");
905
906 ASSERT(idev != NULL, return;);
907 ASSERT(idev->magic == IRDA_DEVICE_MAGIC, return;);
908
909 iobase = idev->io.iobase;
910
911 /* Receive all characters in Rx FIFO */
912 do {
913 byte = inb(iobase+RBR);
914 async_unwrap_char(idev, byte);
915 } while (inb(iobase+USR) & USR_RDR); /* Data available */
916 }
917
918 /*
919 * Function w83977af_sir_interrupt (idev, eir)
920 *
921 * Handle SIR interrupt
922 *
923 */
924 static __u8 w83977af_sir_interrupt(struct irda_device *idev, int isr)
925 {
926 int actual;
927 __u8 new_icr = 0;
928 __u8 set;
929 int iobase;
930
931 DEBUG(4, __FUNCTION__ "(), isr=%#x\n", isr);
932
933 iobase = idev->io.iobase;
934 /* Transmit FIFO low on data */
935 if (isr & ISR_TXTH_I) {
936 /* Write data left in transmit buffer */
937 actual = w83977af_pio_write(idev->io.iobase,
938 idev->tx_buff.data,
939 idev->tx_buff.len,
940 idev->io.fifo_size);
941
942 idev->tx_buff.data += actual;
943 idev->tx_buff.len -= actual;
944
945 idev->io.direction = IO_XMIT;
946
947 /* Check if finished */
948 if (idev->tx_buff.len > 0) {
949 new_icr |= ICR_ETXTHI;
950 } else {
951 set = inb(iobase+SSR);
952 switch_bank(iobase, SET0);
953 outb(AUDR_SFEND, iobase+AUDR);
954 outb(set, iobase+SSR);
955
956 idev->netdev.tbusy = 0; /* Unlock */
957 idev->stats.tx_packets++;
958
959 /* Schedule network layer */
960 mark_bh(NET_BH);
961
962 new_icr |= ICR_ETBREI;
963 }
964 }
965 /* Check if transmission has completed */
966 if (isr & ISR_TXEMP_I) {
967
968 /* Turn around and get ready to receive some data */
969 idev->io.direction = IO_RECV;
970 new_icr |= ICR_ERBRI;
971 }
972
973 /* Rx FIFO threshold or timeout */
974 if (isr & ISR_RXTH_I) {
975 w83977af_pio_receive(idev);
976
977 /* Keep receiving */
978 new_icr |= ICR_ERBRI;
979 }
980 return new_icr;
981 }
982
983 /*
984 * Function pc87108_fir_interrupt (idev, eir)
985 *
986 * Handle MIR/FIR interrupt
987 *
988 */
989 static __u8 w83977af_fir_interrupt(struct irda_device *idev, int isr)
990 {
991 __u8 new_icr = 0;
992 __u8 set;
993 int iobase;
994
995 iobase = idev->io.iobase;
996 set = inb(iobase+SSR);
997
998 /* End of frame detected in FIFO */
999 if (isr & (ISR_FEND_I|ISR_FSF_I)) {
1000 if (w83977af_dma_receive_complete(idev)) {
1001
1002 /* Wait for next status FIFO interrupt */
1003 new_icr |= ICR_EFSFI;
1004 } else {
1005 /* DMA not finished yet */
1006
1007 /* Set timer value, resolution 1 ms */
1008 switch_bank(iobase, SET4);
1009 outb(0x01, iobase+TMRL); /* 1 ms */
1010 outb(0x00, iobase+TMRH);
1011
1012 /* Start timer */
1013 outb(IR_MSL_EN_TMR, iobase+IR_MSL);
1014
1015 new_icr |= ICR_ETMRI;
1016 }
1017 }
1018 /* Timer finished */
1019 if (isr & ISR_TMR_I) {
1020 /* Disable timer */
1021 switch_bank(iobase, SET4);
1022 outb(0, iobase+IR_MSL);
1023
1024 /* Clear timer event */
1025 /* switch_bank(iobase, SET0); */
1026 /* outb(ASCR_CTE, iobase+ASCR); */
1027
1028 /* Check if this is a TX timer interrupt */
1029 if (idev->io.direction == IO_XMIT) {
1030 w83977af_dma_write(idev, iobase);
1031
1032 new_icr |= ICR_EDMAI;
1033 } else {
1034 /* Check if DMA has now finished */
1035 w83977af_dma_receive_complete(idev);
1036
1037 new_icr |= ICR_EFSFI;
1038 }
1039 }
1040 /* Finished with DMA */
1041 if (isr & ISR_DMA_I) {
1042 w83977af_dma_xmit_complete(idev);
1043
1044 /* Check if there are more frames to be transmitted */
1045 /* if (irda_device_txqueue_empty(idev)) { */
1046
1047 /* Prepare for receive
1048 *
1049 * ** Netwinder Tx DMA likes that we do this anyway **
1050 */
1051 w83977af_dma_receive(idev);
1052 new_icr = ICR_EFSFI;
1053 /* } */
1054 }
1055
1056 /* Restore set */
1057 outb(set, iobase+SSR);
1058
1059 return new_icr;
1060 }
1061
1062 /*
1063 * Function pc87108_interrupt (irq, dev_id, regs)
1064 *
1065 * An interrupt from the chip has arrived. Time to do some work
1066 *
1067 */
1068 static void w83977af_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1069 {
1070 __u8 set, icr, isr;
1071 int iobase;
1072
1073 struct irda_device *idev = (struct irda_device *) dev_id;
1074
1075 if (idev == NULL) {
1076 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1077 driver_name, irq);
1078 return;
1079 }
1080
1081 idev->netdev.interrupt = 1;
1082
1083 iobase = idev->io.iobase;
1084
1085 /* Save current bank */
1086 set = inb(iobase+SSR);
1087 switch_bank(iobase, SET0);
1088
1089 icr = inb(iobase+ICR);
1090 isr = inb(iobase+ISR) & icr; /* Mask out the interesting ones */
1091
1092 outb(0, iobase+ICR); /* Disable interrupts */
1093
1094 if (isr) {
1095 /* Dispatch interrupt handler for the current speed */
1096 if (idev->io.baudrate > PIO_MAX_SPEED )
1097 icr = w83977af_fir_interrupt(idev, isr);
1098 else
1099 icr = w83977af_sir_interrupt(idev, isr);
1100 }
1101
1102 outb(icr, iobase+ICR); /* Restore (new) interrupts */
1103 outb(set, iobase+SSR); /* Restore bank register */
1104
1105 idev->netdev.interrupt = 0;
1106 }
1107
1108 /*
1109 * Function w83977af_wait_until_sent (idev)
1110 *
1111 * This function should put the current thread to sleep until all data
1112 * have been sent, so it is safe to f.eks. change the speed.
1113 */
1114 static void w83977af_wait_until_sent(struct irda_device *idev)
1115 {
1116 current->state = TASK_INTERRUPTIBLE;
1117 schedule_timeout(60*HZ/1000);
1118 }
1119
1120 /*
1121 * Function w83977af_is_receiving (idev)
1122 *
1123 * Return TRUE is we are currently receiving a frame
1124 *
1125 */
1126 static int w83977af_is_receiving(struct irda_device *idev)
1127 {
1128 int status = FALSE;
1129 int iobase;
1130 __u8 set;
1131
1132 ASSERT(idev != NULL, return FALSE;);
1133 ASSERT(idev->magic == IRDA_DEVICE_MAGIC, return FALSE;);
1134
1135 if (idev->io.baudrate > 115200) {
1136 iobase = idev->io.iobase;
1137
1138 /* Check if rx FIFO is not empty */
1139 set = inb(iobase+SSR);
1140 switch_bank(iobase, SET2);
1141 if ((inb(iobase+RXFDTH) & 0x3f) != 0) {
1142 /* We are receiving something */
1143 status = TRUE;
1144 }
1145 outb(set, iobase+SSR);
1146 } else
1147 status = (idev->rx_buff.state != OUTSIDE_FRAME);
1148
1149 return status;
1150 }
1151
1152 /*
1153 * Function w83977af_net_init (dev)
1154 *
1155 *
1156 *
1157 */
1158 static int w83977af_net_init(struct net_device *dev)
1159 {
1160 DEBUG(0, __FUNCTION__ "()\n");
1161
1162 /* Set up to be a normal IrDA network device driver */
1163 irda_device_setup(dev);
1164
1165 /* Insert overrides below this line! */
1166
1167 return 0;
1168 }
1169
1170
1171 /*
1172 * Function w83977af_net_open (dev)
1173 *
1174 * Start the device
1175 *
1176 */
1177 static int w83977af_net_open(struct net_device *dev)
1178 {
1179 struct irda_device *idev;
1180 int iobase;
1181 __u8 set;
1182
1183 DEBUG(0, __FUNCTION__ "()\n");
1184
1185 ASSERT(dev != NULL, return -1;);
1186 idev = (struct irda_device *) dev->priv;
1187
1188 ASSERT(idev != NULL, return 0;);
1189 ASSERT(idev->magic == IRDA_DEVICE_MAGIC, return 0;);
1190
1191 iobase = idev->io.iobase;
1192
1193 if (request_irq(idev->io.irq, w83977af_interrupt, 0, idev->name,
1194 (void *) idev)) {
1195 return -EAGAIN;
1196 }
1197 /*
1198 * Always allocate the DMA channel after the IRQ,
1199 * and clean up on failure.
1200 */
1201 if (request_dma(idev->io.dma, idev->name)) {
1202 free_irq(idev->io.irq, idev);
1203 return -EAGAIN;
1204 }
1205
1206 /* Save current set */
1207 set = inb(iobase+SSR);
1208
1209 /* Enable some interrupts so we can receive frames again */
1210 switch_bank(iobase, SET0);
1211 if (idev->io.baudrate > 115200) {
1212 outb(ICR_EFSFI, iobase+ICR);
1213 w83977af_dma_receive(idev);
1214 } else
1215 outb(ICR_ERBRI, iobase+ICR);
1216
1217 /* Restore bank register */
1218 outb(set, iobase+SSR);
1219
1220 /* Ready to play! */
1221 irda_device_net_open(dev);
1222
1223 MOD_INC_USE_COUNT;
1224
1225 return 0;
1226 }
1227
1228 /*
1229 * Function w83977af_net_close (dev)
1230 *
1231 * Stop the device
1232 *
1233 */
1234 static int w83977af_net_close(struct net_device *dev)
1235 {
1236 struct irda_device *idev;
1237 int iobase;
1238 __u8 set;
1239
1240 DEBUG(0, __FUNCTION__ "()\n");
1241
1242 ASSERT(dev != NULL, return -1;);
1243
1244 idev = (struct irda_device *) dev->priv;
1245
1246 ASSERT(idev != NULL, return 0;);
1247 ASSERT(idev->magic == IRDA_DEVICE_MAGIC, return 0;);
1248
1249 iobase = idev->io.iobase;
1250
1251 /* Stop device */
1252 irda_device_net_close(dev);
1253
1254 disable_dma(idev->io.dma);
1255
1256 /* Save current set */
1257 set = inb(iobase+SSR);
1258
1259 /* Disable interrupts */
1260 switch_bank(iobase, SET0);
1261 outb(0, iobase+ICR);
1262
1263 free_irq(idev->io.irq, idev);
1264 free_dma(idev->io.dma);
1265
1266 /* Restore bank register */
1267 outb(set, iobase+SSR);
1268
1269 MOD_DEC_USE_COUNT;
1270
1271 return 0;
1272 }
1273
1274 #ifdef MODULE
1275
1276 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
1277 MODULE_DESCRIPTION("Winbond W83977AF IrDA Device Driver");
1278
1279 MODULE_PARM(qos_mtt_bits, "i");
1280
1281 /*
1282 * Function init_module (void)
1283 *
1284 *
1285 *
1286 */
1287 int init_module(void)
1288 {
1289 return w83977af_init();
1290 }
1291
1292 /*
1293 * Function cleanup_module (void)
1294 *
1295 *
1296 *
1297 */
1298 void cleanup_module(void)
1299 {
1300 w83977af_cleanup();
1301 }
1302 #endif /* MODULE */