i386/linux/linux-2.3.21/drivers/net/myri_sbus.h

   1 /* myri_sbus.h: Defines for MyriCOM MyriNET SBUS card driver.
   2  *
   3  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   4  */
   5
   6 #ifndef _MYRI_SBUS_H
   7 #define _MYRI_SBUS_H
   8
   9 struct lanai_regs {
  10         volatile unsigned int   ipf0;           /* Context zero state registers.*/
  11         volatile unsigned int   cur0;
  12         volatile unsigned int   prev0;
  13         volatile unsigned int   data0;
  14         volatile unsigned int   dpf0;
  15         volatile unsigned int   ipf1;           /* Context one state registers. */
  16         volatile unsigned int   cur1;
  17         volatile unsigned int   prev1;
  18         volatile unsigned int   data1;
  19         volatile unsigned int   dpf1;
  20         volatile unsigned int   istat;          /* Interrupt status.            */
  21         volatile unsigned int   eimask;         /* External IRQ mask.           */
  22         volatile unsigned int   itimer;         /* IRQ timer.                   */
  23         volatile unsigned int   rtc;            /* Real Time Clock              */
  24         volatile unsigned int   csum;           /* Checksum.                    */
  25         volatile unsigned int   dma_xaddr;      /* SBUS DMA external address.   */
  26         volatile unsigned int   dma_laddr;      /* SBUS DMA local address.      */
  27         volatile unsigned int   dma_ctr;        /* SBUS DMA counter.            */
  28         volatile unsigned int   rx_dmaptr;      /* Receive DMA pointer.         */
  29         volatile unsigned int   rx_dmalim;      /* Receive DMA limit.           */
  30         volatile unsigned int   tx_dmaptr;      /* Transmit DMA pointer.        */
  31         volatile unsigned int   tx_dmalim;      /* Transmit DMA limit.          */
  32         volatile unsigned int   tx_dmalimt;     /* Transmit DMA limit w/tail.   */
  33         unsigned int    _unused0;
  34         volatile unsigned char  rbyte;          /* Receive byte.                */
  35         unsigned char   _unused1[3];
  36         volatile unsigned short rhalf;          /* Receive half-word.           */
  37         unsigned char   _unused2[2];
  38         volatile unsigned int   rword;          /* Receive word.                */
  39         volatile unsigned int   salign;         /* Send align.                  */
  40         volatile unsigned int   ss_sendbyte;    /* SingleSend send-byte.        */
  41         volatile unsigned int   ss_sendhalf;    /* SingleSend send-halfword.    */
  42         volatile unsigned int   ss_sendword;    /* SingleSend send-word.        */
  43         volatile unsigned int   ss_sendt;       /* SingleSend special.          */
  44         volatile unsigned int   dma_dir;        /* DMA direction.               */
  45         volatile unsigned int   dma_stat;       /* DMA status.                  */
  46         volatile unsigned int   timeo;          /* Timeout register.            */
  47         volatile unsigned int   myrinet;        /* XXX MAGIC myricom thing      */
  48         volatile unsigned int   hwdebug;        /* Hardware debugging reg.      */
  49         volatile unsigned int   leds;           /* LED control.                 */
  50         volatile unsigned int   vers;           /* Version register.            */
  51         volatile unsigned int   link_on;        /* Link activation reg.         */
  52         unsigned int _unused3[0x17];
  53         volatile unsigned int   cval;           /* Clock value register.        */
  54 };
  55
  56 /* Interrupt status bits. */
  57 #define ISTAT_DEBUG     0x80000000
  58 #define ISTAT_HOST      0x40000000
  59 #define ISTAT_LAN7      0x00800000
  60 #define ISTAT_LAN6      0x00400000
  61 #define ISTAT_LAN5      0x00200000
  62 #define ISTAT_LAN4      0x00100000
  63 #define ISTAT_LAN3      0x00080000
  64 #define ISTAT_LAN2      0x00040000
  65 #define ISTAT_LAN1      0x00020000
  66 #define ISTAT_LAN0      0x00010000
  67 #define ISTAT_WRDY      0x00008000
  68 #define ISTAT_HRDY      0x00004000
  69 #define ISTAT_SRDY      0x00002000
  70 #define ISTAT_LINK      0x00001000
  71 #define ISTAT_FRES      0x00000800
  72 #define ISTAT_NRES      0x00000800
  73 #define ISTAT_WAKE      0x00000400
  74 #define ISTAT_OB2       0x00000200
  75 #define ISTAT_OB1       0x00000100
  76 #define ISTAT_TAIL      0x00000080
  77 #define ISTAT_WDOG      0x00000040
  78 #define ISTAT_TIME      0x00000020
  79 #define ISTAT_DMA       0x00000010
  80 #define ISTAT_SEND      0x00000008
  81 #define ISTAT_BUF       0x00000004
  82 #define ISTAT_RECV      0x00000002
  83 #define ISTAT_BRDY      0x00000001
  84
  85 struct myri_regs {
  86         volatile unsigned int   reset_off;
  87         volatile unsigned int   reset_on;
  88         volatile unsigned int   irq_off;
  89         volatile unsigned int   irq_on;
  90         volatile unsigned int   wakeup_off;
  91         volatile unsigned int   wakeup_on;
  92         volatile unsigned int   irq_read;
  93         unsigned int _unused[0xfff9];
  94         volatile unsigned short local_mem[0x10800];
  95 };
  96
  97 /* Shared memory interrupt mask. */
  98 #define SHMEM_IMASK_RX          0x00000002
  99 #define SHMEM_IMASK_TX          0x00000001
 100
 101 /* Just to make things readable. */
 102 #define KERNEL_CHANNEL          0
 103
 104 /* The size of this must be >= 129 bytes. */
 105 struct myri_eeprom {
 106         unsigned int            cval;
 107         unsigned short          cpuvers;
 108         unsigned char           id[6];
 109         unsigned int            ramsz;
 110         unsigned char           fvers[32];
 111         unsigned char           mvers[16];
 112         unsigned short          dlval;
 113         unsigned short          brd_type;
 114         unsigned short          bus_type;
 115         unsigned short          prod_code;
 116         unsigned int            serial_num;
 117         unsigned short          _reserved[24];
 118         unsigned int            _unused[2];
 119 };
 120
 121 /* EEPROM bus types, only SBUS is valid in this driver. */
 122 #define BUS_TYPE_SBUS           1
 123
 124 /* EEPROM CPU revisions. */
 125 #define CPUVERS_2_3             0x0203
 126 #define CPUVERS_3_0             0x0300
 127 #define CPUVERS_3_1             0x0301
 128 #define CPUVERS_3_2             0x0302
 129 #define CPUVERS_4_0             0x0400
 130 #define CPUVERS_4_1             0x0401
 131 #define CPUVERS_4_2             0x0402
 132 #define CPUVERS_5_0             0x0500
 133
 134 struct myri_control {
 135         volatile unsigned short ctrl;
 136         volatile unsigned short irqlvl;
 137 };
 138
 139 /* Global control register defines. */
 140 #define CONTROL_ROFF            0x8000  /* Reset OFF.           */
 141 #define CONTROL_RON             0x4000  /* Reset ON.            */
 142 #define CONTROL_EIRQ            0x2000  /* Enable IRQ's.        */
 143 #define CONTROL_DIRQ            0x1000  /* Disable IRQ's.       */
 144 #define CONTROL_WON             0x0800  /* Wake-up ON.          */
 145
 146 #define MYRI_SCATTER_ENTRIES    8
 147 #define MYRI_GATHER_ENTRIES     16
 148
 149 struct myri_sglist {
 150         unsigned int addr;
 151         unsigned int len;
 152 };
 153
 154 struct myri_rxd {
 155         struct myri_sglist myri_scatters[MYRI_SCATTER_ENTRIES]; /* DMA scatter list.*/
 156         unsigned int csum;                              /* HW computed checksum.    */
 157         unsigned int ctx;
 158         unsigned int num_sg;                            /* Total scatter entries.   */
 159 };
 160
 161 struct myri_txd {
 162         struct myri_sglist myri_gathers[MYRI_GATHER_ENTRIES]; /* DMA scatter list.  */
 163         unsigned int num_sg;                            /* Total scatter entries.   */
 164         unsigned short addr[4];                         /* XXX address              */
 165         unsigned int chan;
 166         unsigned int len;                               /* Total length of packet.  */
 167         unsigned int csum_off;                          /* Where data to csum is.   */
 168         unsigned int csum_field;                        /* Where csum goes in pkt.  */
 169 };
 170
 171 #define MYRINET_MTU        8432
 172 #define RX_ALLOC_SIZE      8448
 173 #define MYRI_PAD_LEN       2
 174 #define RX_COPY_THRESHOLD  256
 175
 176 /* These numbers are cast in stone, new firmware is needed if
 177  * you want to change them.
 178  */
 179 #define TX_RING_MAXSIZE    16
 180 #define RX_RING_MAXSIZE    16
 181
 182 #define TX_RING_SIZE       16
 183 #define RX_RING_SIZE       16
 184
 185 /* GRRR... */
 186 static __inline__ int NEXT_RX(int num)
 187 {
 188         if(++num > RX_RING_SIZE)
 189                 num = 0;
 190         return num;
 191 }
 192
 193 static __inline__ int PREV_RX(int num)
 194 {
 195         if(--num < 0)
 196                 num = RX_RING_SIZE;
 197         return num;
 198 }
 199
 200 #define NEXT_TX(num)    (((num) + 1) & (TX_RING_SIZE - 1))
 201 #define PREV_TX(num)    (((num) - 1) & (TX_RING_SIZE - 1))
 202
 203 #define TX_BUFFS_AVAIL(head, tail)              \
 204         ((head) <= (tail) ?                     \
 205          (head) + (TX_RING_SIZE - 1) - (tail) : \
 206          (head) - (tail) - 1)
 207
 208 struct sendq {
 209         unsigned int    tail;
 210         unsigned int    head;
 211         unsigned int    hdebug;
 212         unsigned int    mdebug;
 213         struct myri_txd myri_txd[TX_RING_MAXSIZE];
 214 };
 215
 216 struct recvq {
 217         unsigned int    head;
 218         unsigned int    tail;
 219         unsigned int    hdebug;
 220         unsigned int    mdebug;
 221         struct myri_rxd myri_rxd[RX_RING_MAXSIZE + 1];
 222 };
 223
 224 #define MYRI_MLIST_SIZE 8
 225
 226 struct mclist {
 227         unsigned int maxlen;
 228         unsigned int len;
 229         unsigned int cache;
 230         struct pair {
 231                 unsigned char addr[8];
 232                 unsigned int  val;
 233         } mc_pairs[MYRI_MLIST_SIZE];
 234         unsigned char bcast_addr[8];
 235 };
 236
 237 struct myri_channel {
 238         unsigned int    state;          /* State of the channel.        */
 239         unsigned int    busy;           /* Channel is busy.             */
 240         struct sendq    sendq;          /* Device tx queue.             */
 241         struct recvq    recvq;          /* Device rx queue.             */
 242         struct recvq    recvqa;         /* Device rx queue acked.       */
 243         unsigned int    rbytes;         /* Receive bytes.               */
 244         unsigned int    sbytes;         /* Send bytes.                  */
 245         unsigned int    rmsgs;          /* Receive messages.            */
 246         unsigned int    smsgs;          /* Send messages.               */
 247         struct mclist   mclist;         /* Device multicast list.       */
 248 };
 249
 250 /* Values for per-channel state. */
 251 #define STATE_WFH       0               /* Waiting for HOST.            */
 252 #define STATE_WFN       1               /* Waiting for NET.             */
 253 #define STATE_READY     2               /* Ready.                       */
 254
 255 struct myri_shmem {
 256         unsigned char   addr[8];        /* Board's address.             */
 257         unsigned int    nchan;          /* Number of channels.          */
 258         unsigned int    burst;          /* SBUS dma burst enable.       */
 259         unsigned int    shakedown;      /* DarkkkkStarrr Crashesss...   */
 260         unsigned int    send;           /* Send wanted.                 */
 261         unsigned int    imask;          /* Interrupt enable mask.       */
 262         unsigned int    mlevel;         /* Map level.                   */
 263         unsigned int    debug[4];       /* Misc. debug areas.           */
 264         struct myri_channel channel;    /* Only one channel on a host.  */
 265 };
 266
 267 struct myri_eth {
 268         /* These are frequently accessed, keep together
 269          * to obtain good cache hit rates.
 270          */
 271         struct myri_shmem               *shmem;         /* Shared data structures.    */
 272         struct myri_control             *cregs;         /* Control register space.    */
 273         struct recvq                    *rqack;         /* Where we ack rx's.         */
 274         struct recvq                    *rq;            /* Where we put buffers.      */
 275         struct sendq                    *sq;            /* Where we stuff tx's.       */
 276         struct net_device                       *dev;           /* Linux/NET dev struct.      */
 277         int                             tx_old;         /* To speed up tx cleaning.   */
 278         struct lanai_regs               *lregs;         /* Quick ptr to LANAI regs.   */
 279         struct sk_buff         *rx_skbs[RX_RING_SIZE+1];/* RX skb's                   */
 280         struct sk_buff         *tx_skbs[TX_RING_SIZE];  /* TX skb's                   */
 281         struct net_device_stats         enet_stats;     /* Interface stats.           */
 282
 283         /* These are less frequently accessed. */
 284         struct myri_regs                *regs;          /* MyriCOM register space.    */
 285         unsigned short                  *lanai;         /* View 2 of register space.  */
 286         unsigned int                    *lanai3;        /* View 3 of register space.  */
 287         unsigned int                    myri_bursts;    /* SBUS bursts.               */
 288         struct myri_eeprom              eeprom;         /* Local copy of EEPROM.      */
 289         unsigned int                    reg_size;       /* Size of register space.    */
 290         unsigned int                    shmem_base;     /* Offset to shared ram.      */
 291         struct linux_sbus_device        *myri_sbus_dev; /* Our SBUS device struct.    */
 292         struct myri_eth                 *next_module;   /* Next in adapter chain.     */
 293 };
 294
 295 /* We use this to acquire receive skb's that we can DMA directly into. */
 296 #define ALIGNED_RX_SKB_ADDR(addr) \
 297         ((((unsigned long)(addr) + (64 - 1)) & ~(64 - 1)) - (unsigned long)(addr))
 298 static inline struct sk_buff *myri_alloc_skb(unsigned int length, int gfp_flags)
 299 {
 300         struct sk_buff *skb;
 301
 302         skb = alloc_skb(length + 64, gfp_flags);
 303         if(skb) {
 304                 int offset = ALIGNED_RX_SKB_ADDR(skb->data);
 305
 306                 if(offset)
 307                         skb_reserve(skb, offset);
 308         }
 309         return skb;
 310 }
 311
 312 #endif /* !(_MYRI_SBUS_H) */