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* add p cc
[mascara-docs.git] / i386 / linux / linux-2.3.21 / drivers / net / rtl8139.c
blob5d0b9c65948ab04f5b7e1c0393f4d1afb16f3c88
1 /* rtl8139.c: A RealTek RTL8129/8139 Fast Ethernet driver for Linux. */
2 /*
3 Written 1997-1999 by Donald Becker.
4
5 This software may be used and distributed according to the terms
6 of the GNU Public License, incorporated herein by reference.
7 All other rights reserved.
8
9 This driver is for boards based on the RTL8129 and RTL8139 PCI ethernet
10 chips.
11
12 The author may be reached as becker@CESDIS.gsfc.nasa.gov, or C/O
13 Center of Excellence in Space Data and Information Sciences
14 Code 930.5, Goddard Space Flight Center, Greenbelt MD 20771
15
16 Support and updates available at
17 http://cesdis.gsfc.nasa.gov/linux/drivers/rtl8139.html
18
19 Twister-tuning table provided by Kinston <shangh@realtek.com.tw>.
20 */
21
22 static const char *version =
23 "rtl8139.c:v1.07 5/6/99 Donald Becker http://cesdis.gsfc.nasa.gov/linux/drivers/rtl8139.html\n";
24
25 /* A few user-configurable values. */
26 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
27 static int max_interrupt_work = 20;
28 #define rtl8129_debug debug
29 static int rtl8129_debug = 1;
30
31 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
32 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
33 static int multicast_filter_limit = 32;
34
35 /* Used to pass the full-duplex flag, etc. */
36 #define MAX_UNITS 8 /* More are supported, limit only on options */
37 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
38 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
39
40 /* Size of the in-memory receive ring. */
41 #define RX_BUF_LEN_IDX 3 /* 0==8K, 1==16K, 2==32K, 3==64K */
42 #define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX)
43 /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */
44 #define TX_BUF_SIZE 1536
45
46 /* PCI Tuning Parameters
47 Threshold is bytes transferred to chip before transmission starts. */
48 #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
49
50 /* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024. */
51 #define RX_FIFO_THRESH 4 /* Rx buffer level before first PCI xfer. */
52 #define RX_DMA_BURST 4 /* Maximum PCI burst, '4' is 256 bytes */
53 #define TX_DMA_BURST 4 /* Calculate as 16<<val. */
54
55 /* Operational parameters that usually are not changed. */
56 /* Time in jiffies before concluding the transmitter is hung. */
57 #define TX_TIMEOUT (4*HZ)
58
59 #include <linux/module.h>
60 #include <linux/version.h>
61 #include <linux/kernel.h>
62 #include <linux/sched.h>
63 #include <linux/string.h>
64 #include <linux/timer.h>
65 #include <linux/errno.h>
66 #include <linux/ioport.h>
67 #include <linux/malloc.h>
68 #include <linux/interrupt.h>
69 #include <linux/pci.h>
70 #include <linux/netdevice.h>
71 #include <linux/etherdevice.h>
72 #include <linux/skbuff.h>
73 #include <asm/processor.h> /* Processor type for cache alignment. */
74 #include <asm/bitops.h>
75 #include <asm/io.h>
76
77 /* Kernel compatibility defines, some common to David Hind's PCMCIA package.
78 This is only in the support-all-kernels source code. */
79
80 #define RUN_AT(x) (jiffies + (x))
81
82 #include <linux/delay.h>
83
84 #if LINUX_VERSION_CODE < 0x20123
85 #define test_and_set_bit(val, addr) set_bit(val, addr)
86 #endif
87 #if LINUX_VERSION_CODE <= 0x20139
88 #define net_device_stats enet_statistics
89 #else
90 #define NETSTATS_VER2
91 #endif
92 #if LINUX_VERSION_CODE < 0x20155 || defined(CARDBUS)
93 /* Grrrr, the PCI code changed, but did not consider CardBus... */
94 #include <linux/bios32.h>
95 #define PCI_SUPPORT_VER1
96 #else
97 #define PCI_SUPPORT_VER2
98 #endif
99 #if LINUX_VERSION_CODE < 0x20159
100 #define dev_free_skb(skb) dev_kfree_skb(skb, FREE_WRITE);
101 #else
102 #define dev_free_skb(skb) dev_kfree_skb(skb);
103 #endif
104
105 /* The I/O extent. */
106 #define RTL8129_TOTAL_SIZE 0x80
107
108 /*
109 Theory of Operation
110
111 I. Board Compatibility
112
113 This device driver is designed for the RealTek RTL8129, the RealTek Fast
114 Ethernet controllers for PCI. This chip is used on a few clone boards.
115
116
117 II. Board-specific settings
118
119 PCI bus devices are configured by the system at boot time, so no jumpers
120 need to be set on the board. The system BIOS will assign the
121 PCI INTA signal to a (preferably otherwise unused) system IRQ line.
122 Note: Kernel versions earlier than 1.3.73 do not support shared PCI
123 interrupt lines.
124
125 III. Driver operation
126
127 IIIa. Rx Ring buffers
128
129 The receive unit uses a single linear ring buffer rather than the more
130 common (and more efficient) descriptor-based architecture. Incoming frames
131 are sequentially stored into the Rx region, and the host copies them into
132 skbuffs.
133
134 Comment: While it is theoretically possible to process many frames in place,
135 any delay in Rx processing would cause us to drop frames. More importantly,
136 the Linux protocol stack is not designed to operate in this manner.
137
138 IIIb. Tx operation
139
140 The RTL8129 uses a fixed set of four Tx descriptors in register space.
141 In a stunningly bad design choice, Tx frames must be 32 bit aligned. Linux
142 aligns the IP header on word boundaries, and 14 byte ethernet header means
143 that almost all frames will need to be copied to an alignment buffer.
144
145 IVb. References
146
147 http://www.realtek.com.tw/cn/cn.html
148 http://cesdis.gsfc.nasa.gov/linux/misc/NWay.html
149
150 IVc. Errata
151
152 */
153 \f
154
155 /* This table drives the PCI probe routines. It's mostly boilerplate in all
156 of the drivers, and will likely be provided by some future kernel.
157 Note the matching code -- the first table entry matchs all 56** cards but
158 second only the 1234 card.
159 */
160 enum pci_flags_bit {
161 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
162 PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
163 };
164 struct pci_id_info {
165 const char *name;
166 u16 vendor_id, device_id, device_id_mask, flags;
167 int io_size;
168 struct net_device *(*probe1)(int pci_bus, int pci_devfn, struct net_device *dev,
169 long ioaddr, int irq, int chip_idx, int fnd_cnt);
170 };
171
172 static struct net_device * rtl8129_probe1(int pci_bus, int pci_devfn,
173 struct net_device *dev, long ioaddr,
174 int irq, int chp_idx, int fnd_cnt);
175
176 static struct pci_id_info pci_tbl[] =
177 {{ "RealTek RTL8129 Fast Ethernet",
178 0x10ec, 0x8129, 0xffff, PCI_USES_IO|PCI_USES_MASTER, 0x80, rtl8129_probe1},
179 { "RealTek RTL8139 Fast Ethernet",
180 0x10ec, 0x8139, 0xffff, PCI_USES_IO|PCI_USES_MASTER, 0x80, rtl8129_probe1},
181 { "SMC1211TX EZCard 10/100 (RealTek RTL8139)",
182 0x1113, 0x1211, 0xffff, PCI_USES_IO|PCI_USES_MASTER, 0x80, rtl8129_probe1},
183 { "Accton MPX5030 (RealTek RTL8139)",
184 0x1113, 0x1211, 0xffff, PCI_USES_IO|PCI_USES_MASTER, 0x80, rtl8129_probe1},
185 {0,}, /* 0 terminated list. */
186 };
187
188 /* The capability table matches the chip table above. */
189 enum {HAS_MII_XCVR=0x01, HAS_CHIP_XCVR=0x02, HAS_LNK_CHNG=0x04};
190 static int rtl_cap_tbl[] = {
191 HAS_MII_XCVR, HAS_CHIP_XCVR|HAS_LNK_CHNG, HAS_CHIP_XCVR|HAS_LNK_CHNG,
192 };
193
194
195 /* The rest of these values should never change. */
196 #define NUM_TX_DESC 4 /* Number of Tx descriptor registers. */
197
198 /* Symbolic offsets to registers. */
199 enum RTL8129_registers {
200 MAC0=0, /* Ethernet hardware address. */
201 MAR0=8, /* Multicast filter. */
202 TxStatus0=0x10, /* Transmit status (Four 32bit registers). */
203 TxAddr0=0x20, /* Tx descriptors (also four 32bit). */
204 RxBuf=0x30, RxEarlyCnt=0x34, RxEarlyStatus=0x36,
205 ChipCmd=0x37, RxBufPtr=0x38, RxBufAddr=0x3A,
206 IntrMask=0x3C, IntrStatus=0x3E,
207 TxConfig=0x40, RxConfig=0x44,
208 Timer=0x48, /* A general-purpose counter. */
209 RxMissed=0x4C, /* 24 bits valid, write clears. */
210 Cfg9346=0x50, Config0=0x51, Config1=0x52,
211 FlashReg=0x54, GPPinData=0x58, GPPinDir=0x59, MII_SMI=0x5A, HltClk=0x5B,
212 MultiIntr=0x5C, TxSummary=0x60,
213 MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68,
214 NWayExpansion=0x6A,
215 /* Undocumented registers, but required for proper operation. */
216 FIFOTMS=0x70, /* FIFO Test Mode Select */
217 CSCR=0x74, /* Chip Status and Configuration Register. */
218 PARA78=0x78, PARA7c=0x7c, /* Magic transceiver parameter register. */
219 };
220
221 enum ChipCmdBits {
222 CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };
223
224 /* Interrupt register bits, using my own meaningful names. */
225 enum IntrStatusBits {
226 PCIErr=0x8000, PCSTimeout=0x4000,
227 RxFIFOOver=0x40, RxUnderrun=0x20, RxOverflow=0x10,
228 TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,
229 };
230 enum TxStatusBits {
231 TxHostOwns=0x2000, TxUnderrun=0x4000, TxStatOK=0x8000,
232 TxOutOfWindow=0x20000000, TxAborted=0x40000000, TxCarrierLost=0x80000000,
233 };
234 enum RxStatusBits {
235 RxMulticast=0x8000, RxPhysical=0x4000, RxBroadcast=0x2000,
236 RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004,
237 RxBadAlign=0x0002, RxStatusOK=0x0001,
238 };
239
240 /* Twister tuning parameters from RealTek.
241 Completely undocumented, but required to tune bad links. */
242 enum CSCRBits {
243 CSCR_LinkOKBit=0x0400, CSCR_LinkChangeBit=0x0800,
244 CSCR_LinkStatusBits=0x0f000, CSCR_LinkDownOffCmd=0x003c0,
245 CSCR_LinkDownCmd=0x0f3c0,
246 };
247 unsigned long param[4][4]={
248 {0x0cb39de43,0x0cb39ce43,0x0fb38de03,0x0cb38de43},
249 {0x0cb39de43,0x0cb39ce43,0x0cb39ce83,0x0cb39ce83},
250 {0x0cb39de43,0x0cb39ce43,0x0cb39ce83,0x0cb39ce83},
251 {0x0bb39de43,0x0bb39ce43,0x0bb39ce83,0x0bb39ce83}
252 };
253
254 struct rtl8129_private {
255 char devname[8]; /* Used only for kernel debugging. */
256 const char *product_name;
257 struct net_device *next_module;
258 int chip_id;
259 int chip_revision;
260 unsigned char pci_bus, pci_devfn;
261 #if LINUX_VERSION_CODE > 0x20139
262 struct net_device_stats stats;
263 #else
264 struct enet_statistics stats;
265 #endif
266 struct timer_list timer; /* Media selection timer. */
267 unsigned int cur_rx; /* Index into the Rx buffer of next Rx pkt. */
268 unsigned int cur_tx, dirty_tx, tx_flag;
269 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
270 struct sk_buff* tx_skbuff[NUM_TX_DESC];
271 unsigned char *tx_buf[NUM_TX_DESC]; /* Tx bounce buffers */
272 unsigned char *rx_ring;
273 unsigned char *tx_bufs; /* Tx bounce buffer region. */
274 char phys[4]; /* MII device addresses. */
275 char twistie, twist_cnt; /* Twister tune state. */
276 unsigned int tx_full:1; /* The Tx queue is full. */
277 unsigned int full_duplex:1; /* Full-duplex operation requested. */
278 unsigned int duplex_lock:1;
279 unsigned int default_port:4; /* Last dev->if_port value. */
280 unsigned int media2:4; /* Secondary monitored media port. */
281 unsigned int medialock:1; /* Don't sense media type. */
282 unsigned int mediasense:1; /* Media sensing in progress. */
283 };
284
285 #ifdef MODULE
286 #if LINUX_VERSION_CODE > 0x20115
287 MODULE_AUTHOR("Donald Becker <becker@cesdis.gsfc.nasa.gov>");
288 MODULE_DESCRIPTION("RealTek RTL8129/8139 Fast Ethernet driver");
289 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
290 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
291 MODULE_PARM(multicast_filter_limit, "i");
292 MODULE_PARM(max_interrupt_work, "i");
293 MODULE_PARM(debug, "i");
294 #endif
295 #endif
296
297 static int rtl8129_open(struct net_device *dev);
298 static int read_eeprom(long ioaddr, int location);
299 static int mdio_read(struct net_device *dev, int phy_id, int location);
300 static void mdio_write(struct net_device *dev, int phy_id, int location, int val);
301 static void rtl8129_timer(unsigned long data);
302 static void rtl8129_tx_timeout(struct net_device *dev);
303 static void rtl8129_init_ring(struct net_device *dev);
304 static int rtl8129_start_xmit(struct sk_buff *skb, struct net_device *dev);
305 static int rtl8129_rx(struct net_device *dev);
306 static void rtl8129_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
307 static int rtl8129_close(struct net_device *dev);
308 static int mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
309 static struct enet_statistics *rtl8129_get_stats(struct net_device *dev);
310 static inline u32 ether_crc(int length, unsigned char *data);
311 static void set_rx_mode(struct net_device *dev);
312 \f
313
314 /* A list of all installed RTL8129 devices, for removing the driver module. */
315 static struct net_device *root_rtl8129_dev = NULL;
316
317 /* Ideally we would detect all network cards in slot order. That would
318 be best done a central PCI probe dispatch, which wouldn't work
319 well when dynamically adding drivers. So instead we detect just the
320 Rtl81*9 cards in slot order. */
321
322 int rtl8139_probe(struct net_device *dev)
323 {
324 int cards_found = 0;
325 int pci_index = 0;
326 unsigned char pci_bus, pci_device_fn;
327
328 if ( ! pcibios_present())
329 return -ENODEV;
330
331 for (; pci_index < 0xff; pci_index++) {
332 u16 vendor, device, pci_command, new_command;
333 int chip_idx, irq;
334 long ioaddr;
335
336 if (pcibios_find_class (PCI_CLASS_NETWORK_ETHERNET << 8, pci_index,
337 &pci_bus, &pci_device_fn)
338 != PCIBIOS_SUCCESSFUL)
339 break;
340 pcibios_read_config_word(pci_bus, pci_device_fn,
341 PCI_VENDOR_ID, &vendor);
342 pcibios_read_config_word(pci_bus, pci_device_fn,
343 PCI_DEVICE_ID, &device);
344
345 for (chip_idx = 0; pci_tbl[chip_idx].vendor_id; chip_idx++)
346 if (vendor == pci_tbl[chip_idx].vendor_id
347 && (device & pci_tbl[chip_idx].device_id_mask) ==
348 pci_tbl[chip_idx].device_id)
349 break;
350 if (pci_tbl[chip_idx].vendor_id == 0) /* Compiled out! */
351 continue;
352
353 {
354 #if defined(PCI_SUPPORT_VER2)
355 struct pci_dev *pdev = pci_find_slot(pci_bus, pci_device_fn);
356 ioaddr = pdev->resource[0].start;
357 irq = pdev->irq;
358 #else
359 u32 pci_ioaddr;
360 u8 pci_irq_line;
361 pcibios_read_config_byte(pci_bus, pci_device_fn,
362 PCI_INTERRUPT_LINE, &pci_irq_line);
363 pcibios_read_config_dword(pci_bus, pci_device_fn,
364 PCI_BASE_ADDRESS_0, &pci_ioaddr);
365 ioaddr = pci_ioaddr & ~3;
366 irq = pci_irq_line;
367 #endif
368 }
369
370 if ((pci_tbl[chip_idx].flags & PCI_USES_IO) &&
371 check_region(ioaddr, pci_tbl[chip_idx].io_size))
372 continue;
373
374 /* Activate the card: fix for brain-damaged Win98 BIOSes. */
375 pcibios_read_config_word(pci_bus, pci_device_fn,
376 PCI_COMMAND, &pci_command);
377 new_command = pci_command | (pci_tbl[chip_idx].flags & 7);
378 if (pci_command != new_command) {
379 printk(KERN_INFO " The PCI BIOS has not enabled the"
380 " device at %d/%d! Updating PCI command %4.4x->%4.4x.\n",
381 pci_bus, pci_device_fn, pci_command, new_command);
382 pcibios_write_config_word(pci_bus, pci_device_fn,
383 PCI_COMMAND, new_command);
384 }
385
386 dev = pci_tbl[chip_idx].probe1(pci_bus, pci_device_fn, dev, ioaddr,
387 irq, chip_idx, cards_found);
388
389 if (dev && (pci_tbl[chip_idx].flags & PCI_COMMAND_MASTER)) {
390 u8 pci_latency;
391 pcibios_read_config_byte(pci_bus, pci_device_fn,
392 PCI_LATENCY_TIMER, &pci_latency);
393 if (pci_latency < 32) {
394 printk(KERN_NOTICE " PCI latency timer (CFLT) is "
395 "unreasonably low at %d. Setting to 64 clocks.\n",
396 pci_latency);
397 pcibios_write_config_byte(pci_bus, pci_device_fn,
398 PCI_LATENCY_TIMER, 64);
399 }
400 }
401 dev = 0;
402 cards_found++;
403 }
404
405 return cards_found ? 0 : -ENODEV;
406 }
407
408 static struct net_device *rtl8129_probe1(int pci_bus, int pci_devfn,
409 struct net_device *dev, long ioaddr,
410 int irq, int chip_idx, int found_cnt)
411 {
412 static int did_version = 0; /* Already printed version info. */
413 struct rtl8129_private *tp;
414 int i, option = found_cnt < MAX_UNITS ? options[found_cnt] : 0;
415
416 if (rtl8129_debug > 0 && did_version++ == 0)
417 printk(KERN_INFO "%s", version);
418
419 dev = init_etherdev(dev, 0);
420
421 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ",
422 dev->name, pci_tbl[chip_idx].name, ioaddr, irq);
423
424 /* Bring the chip out of low-power mode. */
425 outb(0x00, ioaddr + Config1);
426
427 if (read_eeprom(ioaddr, 0) != 0xffff) {
428 for (i = 0; i < 3; i++) {
429 ((u16 *)(dev->dev_addr))[i] =
430 le16_to_cpu(read_eeprom(ioaddr, i + 7));
431 }
432 } else {
433 for (i = 0; i < 6; i++)
434 dev->dev_addr[i] = inb(ioaddr + MAC0 + i);
435 }
436 for (i = 0; i < 5; i++)
437 printk("%2.2x:", dev->dev_addr[i]);
438 printk("%2.2x.\n", dev->dev_addr[i]);
439
440 /* We do a request_region() to register /proc/ioports info. */
441 request_region(ioaddr, pci_tbl[chip_idx].io_size, dev->name);
442
443 dev->base_addr = ioaddr;
444 dev->irq = irq;
445
446 /* Some data structures must be quadword aligned. */
447 tp = kmalloc(sizeof(*tp), GFP_KERNEL | GFP_DMA);
448 memset(tp, 0, sizeof(*tp));
449 dev->priv = tp;
450
451 tp->next_module = root_rtl8129_dev;
452 root_rtl8129_dev = dev;
453
454 tp->chip_id = chip_idx;
455 tp->pci_bus = pci_bus;
456 tp->pci_devfn = pci_devfn;
457
458 /* Find the connected MII xcvrs.
459 Doing this in open() would allow detecting external xcvrs later, but
460 takes too much time. */
461 if (rtl_cap_tbl[chip_idx] & HAS_MII_XCVR) {
462 int phy, phy_idx;
463 for (phy = 0, phy_idx = 0; phy < 32 && phy_idx < sizeof(tp->phys);
464 phy++) {
465 int mii_status = mdio_read(dev, phy, 1);
466 if (mii_status != 0xffff && mii_status != 0x0000) {
467 tp->phys[phy_idx++] = phy;
468 printk(KERN_INFO "%s: MII transceiver found at address %d.\n",
469 dev->name, phy);
470 }
471 }
472 if (phy_idx == 0) {
473 printk(KERN_INFO "%s: No MII transceivers found! Assuming SYM "
474 "transceiver.\n",
475 dev->name);
476 tp->phys[0] = -1;
477 }
478 } else
479 tp->phys[0] = 32;
480
481 /* Put the chip into low-power mode. */
482 outb(0xC0, ioaddr + Cfg9346);
483 outb(0x03, ioaddr + Config1);
484 outb('H', ioaddr + HltClk); /* 'R' would leave the clock running. */
485
486 /* The lower four bits are the media type. */
487 if (option > 0) {
488 tp->full_duplex = (option & 0x200) ? 1 : 0;
489 tp->default_port = option & 15;
490 if (tp->default_port)
491 tp->medialock = 1;
492 }
493
494 if (found_cnt < MAX_UNITS && full_duplex[found_cnt] > 0)
495 tp->full_duplex = full_duplex[found_cnt];
496
497 if (tp->full_duplex) {
498 printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name);
499 mdio_write(dev, tp->phys[0], 4, 0x141);
500 tp->duplex_lock = 1;
501 }
502
503 /* The Rtl8129-specific entries in the device structure. */
504 dev->open = &rtl8129_open;
505 dev->hard_start_xmit = &rtl8129_start_xmit;
506 dev->stop = &rtl8129_close;
507 dev->get_stats = &rtl8129_get_stats;
508 dev->set_multicast_list = &set_rx_mode;
509 dev->do_ioctl = &mii_ioctl;
510
511 return dev;
512 }
513 \f
514 /* Serial EEPROM section. */
515
516 /* EEPROM_Ctrl bits. */
517 #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */
518 #define EE_CS 0x08 /* EEPROM chip select. */
519 #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */
520 #define EE_WRITE_0 0x00
521 #define EE_WRITE_1 0x02
522 #define EE_DATA_READ 0x01 /* EEPROM chip data out. */
523 #define EE_ENB (0x80 | EE_CS)
524
525 /* Delay between EEPROM clock transitions.
526 No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
527 */
528
529 #define eeprom_delay() inl(ee_addr)
530
531 /* The EEPROM commands include the alway-set leading bit. */
532 #define EE_WRITE_CMD (5 << 6)
533 #define EE_READ_CMD (6 << 6)
534 #define EE_ERASE_CMD (7 << 6)
535
536 static int read_eeprom(long ioaddr, int location)
537 {
538 int i;
539 unsigned retval = 0;
540 long ee_addr = ioaddr + Cfg9346;
541 int read_cmd = location | EE_READ_CMD;
542
543 outb(EE_ENB & ~EE_CS, ee_addr);
544 outb(EE_ENB, ee_addr);
545
546 /* Shift the read command bits out. */
547 for (i = 10; i >= 0; i--) {
548 int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
549 outb(EE_ENB | dataval, ee_addr);
550 eeprom_delay();
551 outb(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
552 eeprom_delay();
553 }
554 outb(EE_ENB, ee_addr);
555 eeprom_delay();
556
557 for (i = 16; i > 0; i--) {
558 outb(EE_ENB | EE_SHIFT_CLK, ee_addr);
559 eeprom_delay();
560 retval = (retval << 1) | ((inb(ee_addr) & EE_DATA_READ) ? 1 : 0);
561 outb(EE_ENB, ee_addr);
562 eeprom_delay();
563 }
564
565 /* Terminate the EEPROM access. */
566 outb(~EE_CS, ee_addr);
567 return retval;
568 }
569
570 /* MII serial management: mostly bogus for now. */
571 /* Read and write the MII management registers using software-generated
572 serial MDIO protocol.
573 The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
574 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
575 "overclocking" issues. */
576 #define MDIO_DIR 0x80
577 #define MDIO_DATA_OUT 0x04
578 #define MDIO_DATA_IN 0x02
579 #define MDIO_CLK 0x01
580 #define MDIO_WRITE0 (MDIO_DIR)
581 #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT)
582
583 #define mdio_delay() inb(mdio_addr)
584
585 static char mii_2_8139_map[8] = {MII_BMCR, MII_BMSR, 0, 0, NWayAdvert,
586 NWayLPAR, NWayExpansion, 0 };
587
588 /* Syncronize the MII management interface by shifting 32 one bits out. */
589 static void mdio_sync(long mdio_addr)
590 {
591 int i;
592
593 for (i = 32; i >= 0; i--) {
594 outb(MDIO_WRITE1, mdio_addr);
595 mdio_delay();
596 outb(MDIO_WRITE1 | MDIO_CLK, mdio_addr);
597 mdio_delay();
598 }
599 return;
600 }
601 static int mdio_read(struct net_device *dev, int phy_id, int location)
602 {
603 long mdio_addr = dev->base_addr + MII_SMI;
604 int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
605 int retval = 0;
606 int i;
607
608 if (phy_id > 31) { /* Really a 8139. Use internal registers. */
609 return location < 8 && mii_2_8139_map[location] ?
610 inw(dev->base_addr + mii_2_8139_map[location]) : 0;
611 }
612 mdio_sync(mdio_addr);
613 /* Shift the read command bits out. */
614 for (i = 15; i >= 0; i--) {
615 int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0;
616
617 outb(MDIO_DIR | dataval, mdio_addr);
618 mdio_delay();
619 outb(MDIO_DIR | dataval | MDIO_CLK, mdio_addr);
620 mdio_delay();
621 }
622
623 /* Read the two transition, 16 data, and wire-idle bits. */
624 for (i = 19; i > 0; i--) {
625 outb(0, mdio_addr);
626 mdio_delay();
627 retval = (retval << 1) | ((inb(mdio_addr) & MDIO_DATA_IN) ? 1 : 0);
628 outb(MDIO_CLK, mdio_addr);
629 mdio_delay();
630 }
631 return (retval>>1) & 0xffff;
632 }
633
634 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
635 {
636 long mdio_addr = dev->base_addr + MII_SMI;
637 int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location<<18) | value;
638 int i;
639
640 if (phy_id > 31) { /* Really a 8139. Use internal registers. */
641 if (location < 8 && mii_2_8139_map[location])
642 outw(value, dev->base_addr + mii_2_8139_map[location]);
643 return;
644 }
645 mdio_sync(mdio_addr);
646
647 /* Shift the command bits out. */
648 for (i = 31; i >= 0; i--) {
649 int dataval = (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
650 outb(dataval, mdio_addr);
651 mdio_delay();
652 outb(dataval | MDIO_CLK, mdio_addr);
653 mdio_delay();
654 }
655 /* Clear out extra bits. */
656 for (i = 2; i > 0; i--) {
657 outb(0, mdio_addr);
658 mdio_delay();
659 outb(MDIO_CLK, mdio_addr);
660 mdio_delay();
661 }
662 return;
663 }
664
665 \f
666 static int
667 rtl8129_open(struct net_device *dev)
668 {
669 struct rtl8129_private *tp = (struct rtl8129_private *)dev->priv;
670 long ioaddr = dev->base_addr;
671 int i;
672
673 /* Soft reset the chip. */
674 outb(CmdReset, ioaddr + ChipCmd);
675
676 if (request_irq(dev->irq, &rtl8129_interrupt, SA_SHIRQ, dev->name, dev)) {
677 return -EAGAIN;
678 }
679
680 MOD_INC_USE_COUNT;
681
682 tp->tx_bufs = kmalloc(TX_BUF_SIZE * NUM_TX_DESC, GFP_KERNEL);
683 tp->rx_ring = kmalloc(RX_BUF_LEN + 16, GFP_KERNEL);
684 if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
685 free_irq(dev->irq, dev);
686 if (tp->tx_bufs)
687 kfree(tp->tx_bufs);
688 if (rtl8129_debug > 0)
689 printk(KERN_ERR "%s: Couldn't allocate a %d byte receive ring.\n",
690 dev->name, RX_BUF_LEN);
691 return -ENOMEM;
692 }
693 rtl8129_init_ring(dev);
694
695 /* Check that the chip has finished the reset. */
696 for (i = 1000; i > 0; i--)
697 if ((inb(ioaddr + ChipCmd) & CmdReset) == 0)
698 break;
699
700 for (i = 0; i < 6; i++)
701 outb(dev->dev_addr[i], ioaddr + MAC0 + i);
702
703 /* Must enable Tx/Rx before setting transfer thresholds! */
704 outb(CmdRxEnb | CmdTxEnb, ioaddr + ChipCmd);
705 outl((RX_FIFO_THRESH << 13) | (RX_BUF_LEN_IDX << 11) | (RX_DMA_BURST<<8),
706 ioaddr + RxConfig);
707 outl((TX_DMA_BURST<<8)|0x03000000, ioaddr + TxConfig);
708 tp->tx_flag = (TX_FIFO_THRESH<<11) & 0x003f0000;
709
710 tp->full_duplex = tp->duplex_lock;
711 if (tp->phys[0] >= 0 || (rtl_cap_tbl[tp->chip_id] & HAS_MII_XCVR)) {
712 u16 mii_reg5 = mdio_read(dev, tp->phys[0], 5);
713 if (mii_reg5 == 0xffff)
714 ; /* Not there */
715 else if ((mii_reg5 & 0x0100) == 0x0100
716 || (mii_reg5 & 0x00C0) == 0x0040)
717 tp->full_duplex = 1;
718 if (rtl8129_debug > 1)
719 printk(KERN_INFO"%s: Setting %s%s-duplex based on"
720 " auto-negotiated partner ability %4.4x.\n", dev->name,
721 mii_reg5 == 0 ? "" :
722 (mii_reg5 & 0x0180) ? "100mbps " : "10mbps ",
723 tp->full_duplex ? "full" : "half", mii_reg5);
724 }
725
726 outb(0xC0, ioaddr + Cfg9346);
727 outb(tp->full_duplex ? 0x60 : 0x20, ioaddr + Config1);
728 outb(0x00, ioaddr + Cfg9346);
729
730 outl(virt_to_bus(tp->rx_ring), ioaddr + RxBuf);
731
732 /* Start the chip's Tx and Rx process. */
733 outl(0, ioaddr + RxMissed);
734 set_rx_mode(dev);
735
736 outb(CmdRxEnb | CmdTxEnb, ioaddr + ChipCmd);
737
738 dev->tbusy = 0;
739 dev->interrupt = 0;
740 dev->start = 1;
741
742 /* Enable all known interrupts by setting the interrupt mask. */
743 outw(PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver
744 | TxErr | TxOK | RxErr | RxOK, ioaddr + IntrMask);
745
746 if (rtl8129_debug > 1)
747 printk(KERN_DEBUG"%s: rtl8129_open() ioaddr %#lx IRQ %d"
748 " GP Pins %2.2x %s-duplex.\n",
749 dev->name, ioaddr, dev->irq, inb(ioaddr + GPPinData),
750 tp->full_duplex ? "full" : "half");
751
752 /* Set the timer to switch to check for link beat and perhaps switch
753 to an alternate media type. */
754 init_timer(&tp->timer);
755 tp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
756 tp->timer.data = (unsigned long)dev;
757 tp->timer.function = &rtl8129_timer;
758 add_timer(&tp->timer);
759
760 return 0;
761 }
762
763 static void rtl8129_timer(unsigned long data)
764 {
765 struct net_device *dev = (struct net_device *)data;
766 struct rtl8129_private *tp = (struct rtl8129_private *)dev->priv;
767 long ioaddr = dev->base_addr;
768 int next_tick = 60*HZ;
769 int mii_reg5 = mdio_read(dev, tp->phys[0], 5);
770
771 if (! tp->duplex_lock && mii_reg5 != 0xffff) {
772 int duplex = (mii_reg5&0x0100) || (mii_reg5 & 0x01C0) == 0x0040;
773 if (tp->full_duplex != duplex) {
774 tp->full_duplex = duplex;
775 printk(KERN_INFO "%s: Setting %s-duplex based on MII #%d link"
776 " partner ability of %4.4x.\n", dev->name,
777 tp->full_duplex ? "full" : "half", tp->phys[0], mii_reg5);
778 outb(0xC0, ioaddr + Cfg9346);
779 outb(tp->full_duplex ? 0x60 : 0x20, ioaddr + Config1);
780 outb(0x00, ioaddr + Cfg9346);
781 }
782 }
783 /* Check for bogusness. */
784 if (inw(ioaddr + IntrStatus) & (TxOK | RxOK)) {
785 int status = inw(ioaddr + IntrStatus);
786 if (status & (TxOK | RxOK)) { /* Double check */
787 printk(KERN_ERR "%s: RTL8139 Interrupt line blocked, status %x.\n",
788 dev->name, status);
789 rtl8129_interrupt(dev->irq, dev, 0);
790 }
791 }
792 if (dev->tbusy && jiffies - dev->trans_start >= 2*TX_TIMEOUT)
793 rtl8129_tx_timeout(dev);
794
795 #if 0
796 if (tp->twistie) {
797 unsigned int CSCRval = inw(ioaddr + CSCR); /* Read link status. */
798 if (tp->twistie == 1) {
799 if (CSCRval & CSCR_LinkOKBit) {
800 outw(CSCR_LinkDownOffCmd, ioaddr + CSCR);
801 tp->twistie = 2;
802 next_tick = HZ/10;
803 } else {
804 outw(CSCR_LinkDownCmd, ioaddr + CSCR);
805 outl(FIFOTMS_default,ioaddr + FIFOTMS);
806 outl(PARA78_default ,ioaddr + PARA78);
807 outl(PARA7c_default ,ioaddr + PARA7c);
808 tp->twistie = 0;
809 }
810 } else if (tp->twistie == 2) {
811 int linkcase = (CSCRval & CSCR_LinkStatusBits) >> 12;
812 int row;
813 if (linkcase >= 0x7000) row = 3;
814 else if (linkcase >= 0x3000) row = 2;
815 else if (linkcase >= 0x1000) row = 1;
816 else row = 0;
817 tp->twistie == row + 3;
818 outw(0,ioaddr+FIFOTMS);
819 outl(param[row][0], ioaddr+PARA7c);
820 tp->twist_cnt = 1;
821 } else {
822 outl(param[tp->twistie-3][tp->twist_cnt], ioaddr+PARA7c);
823 if (++tp->twist_cnt < 4) {
824 next_tick = HZ/10;
825 } else if (tp->twistie-3 == 3) {
826 if ((CSCRval & CSCR_LinkStatusBits) != 0x7000) {
827 outl(PARA7c_xxx, ioaddr+PARA7c);
828 next_tick = HZ/10; /* 100ms. */
829 outl(FIFOTMS_default, ioaddr+FIFOTMS);
830 outl(PARA78_default, ioaddr+PARA78);
831 outl(PARA7c_default, ioaddr+PARA7c);
832 tp->twistie == 3 + 3;
833 outw(0,ioaddr+FIFOTMS);
834 outl(param[3][0], ioaddr+PARA7c);
835 tp->twist_cnt = 1;
836 }
837 }
838 }
839 }
840 #endif
841
842 if (rtl8129_debug > 2) {
843 if (rtl_cap_tbl[tp->chip_id] & HAS_MII_XCVR)
844 printk(KERN_DEBUG"%s: Media selection tick, GP pins %2.2x.\n",
845 dev->name, inb(ioaddr + GPPinData));
846 else
847 printk(KERN_DEBUG"%s: Media selection tick, Link partner %4.4x.\n",
848 dev->name, inw(ioaddr + NWayLPAR));
849 printk(KERN_DEBUG"%s: Other registers are IntMask %4.4x IntStatus %4.4x"
850 " RxStatus %4.4x.\n",
851 dev->name, inw(ioaddr + IntrMask), inw(ioaddr + IntrStatus),
852 inl(ioaddr + RxEarlyStatus));
853 printk(KERN_DEBUG"%s: Chip config %2.2x %2.2x.\n",
854 dev->name, inb(ioaddr + Config0), inb(ioaddr + Config1));
855 }
856
857 tp->timer.expires = RUN_AT(next_tick);
858 add_timer(&tp->timer);
859 }
860
861 static void rtl8129_tx_timeout(struct net_device *dev)
862 {
863 struct rtl8129_private *tp = (struct rtl8129_private *)dev->priv;
864 long ioaddr = dev->base_addr;
865 int mii_reg, i;
866
867 if (rtl8129_debug > 0)
868 printk(KERN_WARNING "%s: Transmit timeout, status %2.2x %4.4x "
869 "media %2.2x.\n",
870 dev->name, inb(ioaddr + ChipCmd), inw(ioaddr + IntrStatus),
871 inb(ioaddr + GPPinData));
872
873 /* Disable interrupts by clearing the interrupt mask. */
874 outw(0x0000, ioaddr + IntrMask);
875 /* Emit info to figure out what went wrong. */
876 printk("%s: Tx queue start entry %d dirty entry %d.\n",
877 dev->name, tp->cur_tx, tp->dirty_tx);
878 for (i = 0; i < NUM_TX_DESC; i++)
879 printk(KERN_DEBUG"%s: Tx descriptor %d is %8.8x.%s\n",
880 dev->name, i, inl(ioaddr + TxStatus0 + i*4),
881 i == tp->dirty_tx % NUM_TX_DESC ? " (queue head)" : "");
882 printk(KERN_DEBUG"%s: MII #%d registers are:", dev->name, tp->phys[0]);
883 for (mii_reg = 0; mii_reg < 8; mii_reg++)
884 printk(" %4.4x", mdio_read(dev, tp->phys[0], mii_reg));
885 printk(".\n");
886
887 /* Soft reset the chip. */
888 outb(CmdReset, ioaddr + ChipCmd);
889 /* Check that the chip has finished the reset. */
890 for (i = 1000; i > 0; i--)
891 if ((inb(ioaddr + ChipCmd) & CmdReset) == 0)
892 break;
893 for (i = 0; i < 6; i++)
894 outb(dev->dev_addr[i], ioaddr + MAC0 + i);
895
896 outb(0x00, ioaddr + Cfg9346);
897 tp->cur_rx = 0;
898 /* Must enable Tx/Rx before setting transfer thresholds! */
899 outb(CmdRxEnb | CmdTxEnb, ioaddr + ChipCmd);
900 outl((RX_FIFO_THRESH << 13) | (RX_BUF_LEN_IDX << 11) | (RX_DMA_BURST<<8),
901 ioaddr + RxConfig);
902 outl((TX_DMA_BURST<<8), ioaddr + TxConfig);
903 set_rx_mode(dev);
904 { /* Save the unsent Tx packets. */
905 struct sk_buff *saved_skb[NUM_TX_DESC], *skb;
906 int j;
907 for (j = 0; tp->cur_tx - tp->dirty_tx > 0 ; j++, tp->dirty_tx++)
908 saved_skb[j] = tp->tx_skbuff[tp->dirty_tx % NUM_TX_DESC];
909 tp->dirty_tx = tp->cur_tx = 0;
910
911 for (i = 0; i < j; i++) {
912 skb = tp->tx_skbuff[i] = saved_skb[i];
913 if ((long)skb->data & 3) { /* Must use alignment buffer. */
914 memcpy(tp->tx_buf[i], skb->data, skb->len);
915 outl(virt_to_bus(tp->tx_buf[i]), ioaddr + TxAddr0 + i*4);
916 } else
917 outl(virt_to_bus(skb->data), ioaddr + TxAddr0 + i*4);
918 /* Note: the chip doesn't have auto-pad! */
919 outl(tp->tx_flag | (skb->len >= ETH_ZLEN ? skb->len : ETH_ZLEN),
920 ioaddr + TxStatus0 + i*4);
921 }
922 tp->cur_tx = i;
923 while (i < NUM_TX_DESC)
924 tp->tx_skbuff[i++] = 0;
925 if (tp->cur_tx - tp->dirty_tx < NUM_TX_DESC) {/* Typical path */
926 dev->tbusy = 0;
927 tp->tx_full = 0;
928 } else {
929 tp->tx_full = 1;
930 }
931 }
932
933 dev->trans_start = jiffies;
934 tp->stats.tx_errors++;
935 /* Enable all known interrupts by setting the interrupt mask. */
936 outw(PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver
937 | TxErr | TxOK | RxErr | RxOK, ioaddr + IntrMask);
938 return;
939 }
940
941
942 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
943 static void
944 rtl8129_init_ring(struct net_device *dev)
945 {
946 struct rtl8129_private *tp = (struct rtl8129_private *)dev->priv;
947 int i;
948
949 tp->tx_full = 0;
950 tp->cur_rx = 0;
951 tp->dirty_tx = tp->cur_tx = 0;
952
953 for (i = 0; i < NUM_TX_DESC; i++) {
954 tp->tx_skbuff[i] = 0;
955 tp->tx_buf[i] = &tp->tx_bufs[i*TX_BUF_SIZE];
956 }
957 }
958
959 static int
960 rtl8129_start_xmit(struct sk_buff *skb, struct net_device *dev)
961 {
962 struct rtl8129_private *tp = (struct rtl8129_private *)dev->priv;
963 long ioaddr = dev->base_addr;
964 int entry;
965
966 /* Block a timer-based transmit from overlapping. This could better be
967 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
968 if (test_and_set_bit(0, (void*)&dev->tbusy) != 0) {
969 if (jiffies - dev->trans_start >= TX_TIMEOUT)
970 rtl8129_tx_timeout(dev);
971 return 1;
972 }
973
974 /* Calculate the next Tx descriptor entry. */
975 entry = tp->cur_tx % NUM_TX_DESC;
976
977 tp->tx_skbuff[entry] = skb;
978 if ((long)skb->data & 3) { /* Must use alignment buffer. */
979 memcpy(tp->tx_buf[entry], skb->data, skb->len);
980 outl(virt_to_bus(tp->tx_buf[entry]), ioaddr + TxAddr0 + entry*4);
981 } else
982 outl(virt_to_bus(skb->data), ioaddr + TxAddr0 + entry*4);
983 /* Note: the chip doesn't have auto-pad! */
984 outl(tp->tx_flag | (skb->len >= ETH_ZLEN ? skb->len : ETH_ZLEN),
985 ioaddr + TxStatus0 + entry*4);
986
987 if (++tp->cur_tx - tp->dirty_tx < NUM_TX_DESC) { /* Typical path */
988 clear_bit(0, (void*)&dev->tbusy);
989 } else {
990 tp->tx_full = 1;
991 }
992
993 dev->trans_start = jiffies;
994 if (rtl8129_debug > 4)
995 printk(KERN_DEBUG"%s: Queued Tx packet at %p size %d to slot %d.\n",
996 dev->name, skb->data, (int)skb->len, entry);
997
998 return 0;
999 }
1000
1001 /* The interrupt handler does all of the Rx thread work and cleans up
1002 after the Tx thread. */
1003 static void rtl8129_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1004 {
1005 struct net_device *dev = (struct net_device *)dev_instance;
1006 struct rtl8129_private *tp = (struct rtl8129_private *)dev->priv;
1007 int boguscnt = max_interrupt_work;
1008 int status, link_changed = 0;
1009 long ioaddr = dev->base_addr;
1010
1011 #if defined(__i386__)
1012 /* A lock to prevent simultaneous entry bug on Intel SMP machines. */
1013 if (test_and_set_bit(0, (void*)&dev->interrupt)) {
1014 printk(KERN_ERR"%s: SMP simultaneous entry of an interrupt handler.\n",
1015 dev->name);
1016 dev->interrupt = 0; /* Avoid halting machine. */
1017 return;
1018 }
1019 #else
1020 if (dev->interrupt) {
1021 printk(KERN_ERR "%s: Re-entering the interrupt handler.\n", dev->name);
1022 return;
1023 }
1024 dev->interrupt = 1;
1025 #endif
1026
1027 do {
1028 status = inw(ioaddr + IntrStatus);
1029 /* Acknowledge all of the current interrupt sources ASAP, but
1030 an first get an additional status bit from CSCR. */
1031 if ((status & RxUnderrun) && inw(ioaddr+CSCR) & CSCR_LinkChangeBit)
1032 link_changed = 1;
1033 outw(status, ioaddr + IntrStatus);
1034
1035 if (rtl8129_debug > 4)
1036 printk(KERN_DEBUG"%s: interrupt status=%#4.4x new intstat=%#4.4x.\n",
1037 dev->name, status, inw(ioaddr + IntrStatus));
1038
1039 if ((status & (PCIErr|PCSTimeout|RxUnderrun|RxOverflow|RxFIFOOver
1040 |TxErr|TxOK|RxErr|RxOK)) == 0)
1041 break;
1042
1043 if (status & (RxOK|RxUnderrun|RxOverflow|RxFIFOOver))/* Rx interrupt */
1044 rtl8129_rx(dev);
1045
1046 if (status & (TxOK | TxErr)) {
1047 unsigned int dirty_tx = tp->dirty_tx;
1048
1049 while (tp->cur_tx - dirty_tx > 0) {
1050 int entry = dirty_tx % NUM_TX_DESC;
1051 int txstatus = inl(ioaddr + TxStatus0 + entry*4);
1052
1053 if ( ! (txstatus & (TxStatOK | TxUnderrun | TxAborted)))
1054 break; /* It still hasn't been Txed */
1055
1056 /* Note: TxCarrierLost is always asserted at 100mbps. */
1057 if (txstatus & (TxOutOfWindow | TxAborted)) {
1058 /* There was an major error, log it. */
1059 if (rtl8129_debug > 1)
1060 printk(KERN_NOTICE"%s: Transmit error, Tx status %8.8x.\n",
1061 dev->name, txstatus);
1062 tp->stats.tx_errors++;
1063 if (txstatus&TxAborted) {
1064 tp->stats.tx_aborted_errors++;
1065 outl((TX_DMA_BURST<<8)|0x03000001, ioaddr + TxConfig);
1066 }
1067 if (txstatus&TxCarrierLost) tp->stats.tx_carrier_errors++;
1068 if (txstatus&TxOutOfWindow) tp->stats.tx_window_errors++;
1069 #ifdef ETHER_STATS
1070 if ((txstatus & 0x0f000000) == 0x0f000000)
1071 tp->stats.collisions16++;
1072 #endif
1073 } else {
1074 if (txstatus & TxUnderrun) {
1075 /* Add 64 to the Tx FIFO threshold. */
1076 if (tp->tx_flag < 0x00300000)
1077 tp->tx_flag += 0x00020000;
1078 tp->stats.tx_fifo_errors++;
1079 }
1080 tp->stats.collisions += (txstatus >> 24) & 15;
1081 #if LINUX_VERSION_CODE > 0x20119
1082 tp->stats.tx_bytes += txstatus & 0x7ff;
1083 #endif
1084 tp->stats.tx_packets++;
1085 }
1086
1087 /* Free the original skb. */
1088 dev_free_skb(tp->tx_skbuff[entry]);
1089 tp->tx_skbuff[entry] = 0;
1090 if (tp->tx_full) {
1091 /* The ring is no longer full, clear tbusy. */
1092 tp->tx_full = 0;
1093 clear_bit(0, (void*)&dev->tbusy);
1094 mark_bh(NET_BH);
1095 }
1096 dirty_tx++;
1097 }
1098
1099 #ifndef final_version
1100 if (tp->cur_tx - dirty_tx > NUM_TX_DESC) {
1101 printk(KERN_ERR"%s: Out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
1102 dev->name, dirty_tx, tp->cur_tx, tp->tx_full);
1103 dirty_tx += NUM_TX_DESC;
1104 }
1105 #endif
1106 tp->dirty_tx = dirty_tx;
1107 }
1108
1109 /* Check uncommon events with one test. */
1110 if (status & (PCIErr|PCSTimeout |RxUnderrun|RxOverflow|RxFIFOOver
1111 |TxErr|RxErr)) {
1112 if (rtl8129_debug > 2)
1113 printk(KERN_NOTICE"%s: Abnormal interrupt, status %8.8x.\n",
1114 dev->name, status);
1115
1116 if (status == 0xffffffff)
1117 break;
1118 /* Update the error count. */
1119 tp->stats.rx_missed_errors += inl(ioaddr + RxMissed);
1120 outl(0, ioaddr + RxMissed);
1121
1122 if ((status & RxUnderrun) && link_changed &&
1123 (rtl_cap_tbl[tp->chip_id] & HAS_LNK_CHNG)) {
1124 /* Really link-change on new chips. */
1125 int lpar = inw(ioaddr + NWayLPAR);
1126 int duplex = (lpar&0x0100)||(lpar & 0x01C0) == 0x0040;
1127 if (tp->full_duplex != duplex) {
1128 tp->full_duplex = duplex;
1129 outb(0xC0, ioaddr + Cfg9346);
1130 outb(tp->full_duplex ? 0x60 : 0x20, ioaddr + Config1);
1131 outb(0x00, ioaddr + Cfg9346);
1132 }
1133 status &= ~RxUnderrun;
1134 }
1135 if (status & (RxUnderrun | RxOverflow | RxErr | RxFIFOOver))
1136 tp->stats.rx_errors++;
1137
1138 if (status & (PCSTimeout)) tp->stats.rx_length_errors++;
1139 if (status & (RxUnderrun|RxFIFOOver)) tp->stats.rx_fifo_errors++;
1140 if (status & RxOverflow) {
1141 tp->stats.rx_over_errors++;
1142 tp->cur_rx = inw(ioaddr + RxBufAddr) % RX_BUF_LEN;
1143 outw(tp->cur_rx - 16, ioaddr + RxBufPtr);
1144 }
1145 if (status & PCIErr) {
1146 u32 pci_cmd_status;
1147 pcibios_read_config_dword(tp->pci_bus, tp->pci_devfn,
1148 PCI_COMMAND, &pci_cmd_status);
1149
1150 printk(KERN_ERR "%s: PCI Bus error %4.4x.\n",
1151 dev->name, pci_cmd_status);
1152 }
1153 }
1154 if (--boguscnt < 0) {
1155 printk(KERN_WARNING"%s: Too much work at interrupt, "
1156 "IntrStatus=0x%4.4x.\n",
1157 dev->name, status);
1158 /* Clear all interrupt sources. */
1159 outw(0xffff, ioaddr + IntrStatus);
1160 break;
1161 }
1162 } while (1);
1163
1164 if (rtl8129_debug > 3)
1165 printk(KERN_DEBUG"%s: exiting interrupt, intr_status=%#4.4x.\n",
1166 dev->name, inl(ioaddr + IntrStatus));
1167
1168 #if defined(__i386__)
1169 clear_bit(0, (void*)&dev->interrupt);
1170 #else
1171 dev->interrupt = 0;
1172 #endif
1173 return;
1174 }
1175
1176 /* The data sheet doesn't describe the Rx ring at all, so I'm guessing at the
1177 field alignments and semantics. */
1178 static int rtl8129_rx(struct net_device *dev)
1179 {
1180 struct rtl8129_private *tp = (struct rtl8129_private *)dev->priv;
1181 long ioaddr = dev->base_addr;
1182 unsigned char *rx_ring = tp->rx_ring;
1183 u16 cur_rx = tp->cur_rx;
1184
1185 if (rtl8129_debug > 4)
1186 printk(KERN_DEBUG"%s: In rtl8129_rx(), current %4.4x BufAddr %4.4x,"
1187 " free to %4.4x, Cmd %2.2x.\n",
1188 dev->name, cur_rx, inw(ioaddr + RxBufAddr),
1189 inw(ioaddr + RxBufPtr), inb(ioaddr + ChipCmd));
1190
1191 while ((inb(ioaddr + ChipCmd) & 1) == 0) {
1192 int ring_offset = cur_rx % RX_BUF_LEN;
1193 u32 rx_status = le32_to_cpu(*(u32*)(rx_ring + ring_offset));
1194 int rx_size = rx_status >> 16;
1195
1196 if (rtl8129_debug > 4) {
1197 int i;
1198 printk(KERN_DEBUG"%s: rtl8129_rx() status %4.4x, size %4.4x, cur %4.4x.\n",
1199 dev->name, rx_status, rx_size, cur_rx);
1200 printk(KERN_DEBUG"%s: Frame contents ", dev->name);
1201 for (i = 0; i < 70; i++)
1202 printk(" %2.2x", le32_to_cpu(rx_ring[ring_offset + i]));
1203 printk(".\n");
1204 }
1205 if (rx_status & RxTooLong) {
1206 if (rtl8129_debug > 0)
1207 printk(KERN_NOTICE"%s: Oversized Ethernet frame, status %4.4x!\n",
1208 dev->name, rx_status);
1209 tp->stats.rx_length_errors++;
1210 } else if (rx_status &
1211 (RxBadSymbol|RxRunt|RxTooLong|RxCRCErr|RxBadAlign)) {
1212 if (rtl8129_debug > 1)
1213 printk(KERN_DEBUG"%s: Ethernet frame had errors,"
1214 " status %4.4x.\n", dev->name, rx_status);
1215 tp->stats.rx_errors++;
1216 if (rx_status & (RxBadSymbol|RxBadAlign))
1217 tp->stats.rx_frame_errors++;
1218 if (rx_status & (RxRunt|RxTooLong)) tp->stats.rx_length_errors++;
1219 if (rx_status & RxCRCErr) tp->stats.rx_crc_errors++;
1220 /* Reset the receiver, based on RealTek recommendation. (Bug?) */
1221 tp->cur_rx = 0;
1222 outb(CmdTxEnb, ioaddr + ChipCmd);
1223 outb(CmdRxEnb | CmdTxEnb, ioaddr + ChipCmd);
1224 outl((RX_FIFO_THRESH << 13) | (RX_BUF_LEN_IDX << 11) |
1225 (RX_DMA_BURST<<8), ioaddr + RxConfig);
1226 } else {
1227 /* Malloc up new buffer, compatible with net-2e. */
1228 /* Omit the four octet CRC from the length. */
1229 struct sk_buff *skb;
1230
1231 skb = dev_alloc_skb(rx_size + 2);
1232 if (skb == NULL) {
1233 printk(KERN_WARNING"%s: Memory squeeze, deferring packet.\n",
1234 dev->name);
1235 /* We should check that some rx space is free.
1236 If not, free one and mark stats->rx_dropped++. */
1237 tp->stats.rx_dropped++;
1238 break;
1239 }
1240 skb->dev = dev;
1241 skb_reserve(skb, 2); /* 16 byte align the IP fields. */
1242 if (ring_offset+rx_size+4 > RX_BUF_LEN) {
1243 int semi_count = RX_BUF_LEN - ring_offset - 4;
1244 memcpy(skb_put(skb, semi_count), &rx_ring[ring_offset + 4],
1245 semi_count);
1246 memcpy(skb_put(skb, rx_size-semi_count), rx_ring,
1247 rx_size-semi_count);
1248 if (rtl8129_debug > 4) {
1249 int i;
1250 printk(KERN_DEBUG"%s: Frame wrap @%d",
1251 dev->name, semi_count);
1252 for (i = 0; i < 16; i++)
1253 printk(" %2.2x", le32_to_cpu(rx_ring[i]));
1254 printk(".\n");
1255 memset(rx_ring, 0xcc, 16);
1256 }
1257 } else {
1258 #if 1 /* USE_IP_COPYSUM */
1259 eth_copy_and_sum(skb, &rx_ring[ring_offset + 4],
1260 rx_size, 0);
1261 skb_put(skb, rx_size);
1262 #else
1263 memcpy(skb_put(skb, rx_size), &rx_ring[ring_offset + 4],
1264 rx_size);
1265 #endif
1266 }
1267 skb->protocol = eth_type_trans(skb, dev);
1268 netif_rx(skb);
1269 #if LINUX_VERSION_CODE > 0x20119
1270 tp->stats.rx_bytes += rx_size;
1271 #endif
1272 tp->stats.rx_packets++;
1273 }
1274
1275 cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
1276 outw(cur_rx - 16, ioaddr + RxBufPtr);
1277 }
1278 if (rtl8129_debug > 4)
1279 printk(KERN_DEBUG"%s: Done rtl8129_rx(), current %4.4x BufAddr %4.4x,"
1280 " free to %4.4x, Cmd %2.2x.\n",
1281 dev->name, cur_rx, inw(ioaddr + RxBufAddr),
1282 inw(ioaddr + RxBufPtr), inb(ioaddr + ChipCmd));
1283 tp->cur_rx = cur_rx;
1284 return 0;
1285 }
1286
1287 static int
1288 rtl8129_close(struct net_device *dev)
1289 {
1290 long ioaddr = dev->base_addr;
1291 struct rtl8129_private *tp = (struct rtl8129_private *)dev->priv;
1292 int i;
1293
1294 dev->start = 0;
1295 dev->tbusy = 1;
1296
1297 if (rtl8129_debug > 1)
1298 printk(KERN_DEBUG"%s: Shutting down ethercard, status was 0x%4.4x.\n",
1299 dev->name, inw(ioaddr + IntrStatus));
1300
1301 /* Disable interrupts by clearing the interrupt mask. */
1302 outw(0x0000, ioaddr + IntrMask);
1303
1304 /* Stop the chip's Tx and Rx DMA processes. */
1305 outb(0x00, ioaddr + ChipCmd);
1306
1307 /* Update the error counts. */
1308 tp->stats.rx_missed_errors += inl(ioaddr + RxMissed);
1309 outl(0, ioaddr + RxMissed);
1310
1311 del_timer(&tp->timer);
1312
1313 free_irq(dev->irq, dev);
1314
1315 for (i = 0; i < NUM_TX_DESC; i++) {
1316 if (tp->tx_skbuff[i])
1317 dev_free_skb(tp->tx_skbuff[i]);
1318 tp->tx_skbuff[i] = 0;
1319 }
1320 kfree(tp->rx_ring);
1321 kfree(tp->tx_bufs);
1322
1323 /* Green! Put the chip in low-power mode. */
1324 outb(0xC0, ioaddr + Cfg9346);
1325 outb(0x03, ioaddr + Config1);
1326 outb('H', ioaddr + HltClk); /* 'R' would leave the clock running. */
1327
1328 MOD_DEC_USE_COUNT;
1329
1330 return 0;
1331 }
1332
1333 static int mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1334 {
1335 struct rtl8129_private *tp = (struct rtl8129_private *)dev->priv;
1336 u16 *data = (u16 *)&rq->ifr_data;
1337
1338 switch(cmd) {
1339 case SIOCDEVPRIVATE: /* Get the address of the PHY in use. */
1340 data[0] = tp->phys[0] & 0x3f;
1341 /* Fall Through */
1342 case SIOCDEVPRIVATE+1: /* Read the specified MII register. */
1343 data[3] = mdio_read(dev, data[0], data[1] & 0x1f);
1344 return 0;
1345 case SIOCDEVPRIVATE+2: /* Write the specified MII register */
1346 if (!capable(CAP_NET_ADMIN))
1347 return -EPERM;
1348 mdio_write(dev, data[0], data[1] & 0x1f, data[2]);
1349 return 0;
1350 default:
1351 return -EOPNOTSUPP;
1352 }
1353 }
1354
1355 static struct enet_statistics *
1356 rtl8129_get_stats(struct net_device *dev)
1357 {
1358 struct rtl8129_private *tp = (struct rtl8129_private *)dev->priv;
1359 long ioaddr = dev->base_addr;
1360
1361 if (dev->start) {
1362 tp->stats.rx_missed_errors += inl(ioaddr + RxMissed);
1363 outl(0, ioaddr + RxMissed);
1364 }
1365
1366 return &tp->stats;
1367 }
1368
1369 /* Set or clear the multicast filter for this adaptor.
1370 This routine is not state sensitive and need not be SMP locked. */
1371
1372 static unsigned const ethernet_polynomial = 0x04c11db7U;
1373 static inline u32 ether_crc(int length, unsigned char *data)
1374 {
1375 int crc = -1;
1376
1377 while (--length >= 0) {
1378 unsigned char current_octet = *data++;
1379 int bit;
1380 for (bit = 0; bit < 8; bit++, current_octet >>= 1)
1381 crc = (crc << 1) ^
1382 ((crc < 0) ^ (current_octet & 1) ? ethernet_polynomial : 0);
1383 }
1384 return crc;
1385 }
1386
1387 /* Bits in RxConfig. */
1388 enum rx_mode_bits {
1389 AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08,
1390 AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,
1391 };
1392
1393 static void set_rx_mode(struct net_device *dev)
1394 {
1395 long ioaddr = dev->base_addr;
1396 u32 mc_filter[2]; /* Multicast hash filter */
1397 int i, rx_mode;
1398
1399 if (rtl8129_debug > 3)
1400 printk(KERN_DEBUG"%s: set_rx_mode(%4.4x) done -- Rx config %8.8x.\n",
1401 dev->name, dev->flags, inl(ioaddr + RxConfig));
1402
1403 /* Note: do not reorder, GCC is clever about common statements. */
1404 if (dev->flags & IFF_PROMISC) {
1405 /* Unconditionally log net taps. */
1406 printk(KERN_NOTICE"%s: Promiscuous mode enabled.\n", dev->name);
1407 rx_mode = AcceptBroadcast|AcceptMulticast|AcceptMyPhys|AcceptAllPhys;
1408 mc_filter[1] = mc_filter[0] = 0xffffffff;
1409 } else if ((dev->mc_count > multicast_filter_limit)
1410 || (dev->flags & IFF_ALLMULTI)) {
1411 /* Too many to filter perfectly -- accept all multicasts. */
1412 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
1413 mc_filter[1] = mc_filter[0] = 0xffffffff;
1414 } else {
1415 struct dev_mc_list *mclist;
1416 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
1417 mc_filter[1] = mc_filter[0] = 0;
1418 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1419 i++, mclist = mclist->next)
1420 set_bit(ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26, mc_filter);
1421 }
1422 /* We can safely update without stopping the chip. */
1423 outb(rx_mode, ioaddr + RxConfig);
1424 outl(mc_filter[0], ioaddr + MAR0 + 0);
1425 outl(mc_filter[1], ioaddr + MAR0 + 4);
1426 return;
1427 }
1428 \f
1429 #ifdef MODULE
1430 int init_module(void)
1431 {
1432 return rtl8139_probe(0);
1433 }
1434
1435 void
1436 cleanup_module(void)
1437 {
1438 struct net_device *next_dev;
1439
1440 /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
1441 while (root_rtl8129_dev) {
1442 struct rtl8129_private *tp =
1443 (struct rtl8129_private *)root_rtl8129_dev->priv;
1444 next_dev = tp->next_module;
1445 unregister_netdev(root_rtl8129_dev);
1446 release_region(root_rtl8129_dev->base_addr,
1447 pci_tbl[tp->chip_id].io_size);
1448 kfree(tp);
1449 kfree(root_rtl8129_dev);
1450 root_rtl8129_dev = next_dev;
1451 }
1452 }
1453
1454 #endif /* MODULE */
1455 \f
1456 /*
1457 * Local variables:
1458 * compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -c rtl8139.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
1459 * SMP-compile-command: "gcc -D__SMP__ -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -c rtl8139.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
1460 * c-indent-level: 4
1461 * c-basic-offset: 4
1462 * tab-width: 4
1463 * End:
1464 */