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* add p cc
[mascara-docs.git] / i386 / linux / linux-2.3.21 / drivers / net / sunhme.c
blob77e04b9df27c79b0269bd4ffbf828b1a84e9e2b6
1 /* sunhme.c: Sparc HME/BigMac 10/100baseT half/full duplex auto switching,
2 * auto carrier detecting ethernet driver. Also known as the
3 * "Happy Meal Ethernet" found on SunSwift SBUS cards.
4 *
5 * Copyright (C) 1996, 1998 David S. Miller (davem@caipfs.rutgers.edu)
6 */
7
8 static char *version =
9 "sunhme.c:v1.10 27/Jan/99 David S. Miller (davem@caipfs.rutgers.edu)\n";
10
11 #include <linux/module.h>
12
13 #include <linux/config.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/types.h>
17 #include <linux/fcntl.h>
18 #include <linux/interrupt.h>
19 #include <linux/ptrace.h>
20 #include <linux/ioport.h>
21 #include <linux/in.h>
22 #include <linux/malloc.h>
23 #include <linux/string.h>
24 #include <linux/delay.h>
25 #include <linux/init.h>
26 #include <asm/system.h>
27 #include <asm/bitops.h>
28 #include <asm/io.h>
29 #include <asm/dma.h>
30 #include <linux/errno.h>
31 #include <asm/byteorder.h>
32
33 #include <asm/idprom.h>
34 #include <asm/sbus.h>
35 #include <asm/openprom.h>
36 #include <asm/oplib.h>
37 #include <asm/auxio.h>
38 #include <asm/pgtable.h>
39 #include <asm/irq.h>
40 #ifndef __sparc_v9__
41 #include <asm/io-unit.h>
42 #endif
43 #include <asm/ethtool.h>
44 #include <asm/uaccess.h>
45
46 #include <linux/netdevice.h>
47 #include <linux/etherdevice.h>
48 #include <linux/skbuff.h>
49
50 #ifdef CONFIG_PCI
51 #include <linux/pci.h>
52 #include <asm/pbm.h>
53 #endif
54
55 #include "sunhme.h"
56
57 #ifdef MODULE
58 static struct happy_meal *root_happy_dev = NULL;
59 #endif
60
61 static struct quattro *qfe_sbus_list = NULL;
62 #ifdef CONFIG_PCI
63 static struct quattro *qfe_pci_list = NULL;
64 #endif
65
66 #undef HMEDEBUG
67 #undef SXDEBUG
68 #undef RXDEBUG
69 #undef TXDEBUG
70 #undef TXLOGGING
71
72 #ifdef TXLOGGING
73 struct hme_tx_logent {
74 unsigned int tstamp;
75 int tx_new, tx_old;
76 unsigned int action;
77 #define TXLOG_ACTION_IRQ 0x01
78 #define TXLOG_ACTION_TXMIT 0x02
79 #define TXLOG_ACTION_TBUSY 0x04
80 #define TXLOG_ACTION_NBUFS 0x08
81 unsigned int status;
82 };
83 #define TX_LOG_LEN 128
84 static struct hme_tx_logent tx_log[TX_LOG_LEN];
85 static int txlog_cur_entry = 0;
86 static __inline__ void tx_add_log(struct happy_meal *hp, unsigned int a, unsigned int s)
87 {
88 struct hme_tx_logent *tlp;
89 unsigned long flags;
90
91 save_and_cli(flags);
92 tlp = &tx_log[txlog_cur_entry];
93 tlp->tstamp = (unsigned int)jiffies;
94 tlp->tx_new = hp->tx_new;
95 tlp->tx_old = hp->tx_old;
96 tlp->action = a;
97 tlp->status = s;
98 txlog_cur_entry = (txlog_cur_entry + 1) & (TX_LOG_LEN - 1);
99 restore_flags(flags);
100 }
101 static __inline__ void tx_dump_log(void)
102 {
103 int i, this;
104
105 this = txlog_cur_entry;
106 for(i = 0; i < TX_LOG_LEN; i++) {
107 printk("TXLOG[%d]: j[%08x] tx[N(%d)O(%d)] action[%08x] stat[%08x]\n", i,
108 tx_log[this].tstamp,
109 tx_log[this].tx_new, tx_log[this].tx_old,
110 tx_log[this].action, tx_log[this].status);
111 this = (this + 1) & (TX_LOG_LEN - 1);
112 }
113 }
114 static __inline__ void tx_dump_ring(struct happy_meal *hp)
115 {
116 struct hmeal_init_block *hb = hp->happy_block;
117 struct happy_meal_txd *tp = &hb->happy_meal_txd[0];
118 int i;
119
120 for(i = 0; i < TX_RING_SIZE; i+=4) {
121 printk("TXD[%d..%d]: [%08x:%08x] [%08x:%08x] [%08x:%08x] [%08x:%08x]\n",
122 i, i + 4,
123 le32_to_cpu(tp[i].tx_flags), le32_to_cpu(tp[i].tx_addr),
124 le32_to_cpu(tp[i + 1].tx_flags), le32_to_cpu(tp[i + 1].tx_addr),
125 le32_to_cpu(tp[i + 2].tx_flags), le32_to_cpu(tp[i + 2].tx_addr),
126 le32_to_cpu(tp[i + 3].tx_flags), le32_to_cpu(tp[i + 3].tx_addr));
127 }
128 }
129 #else
130 #define tx_add_log(hp, a, s) do { } while(0)
131 #define tx_dump_log() do { } while(0)
132 #define tx_dump_ring(hp) do { } while(0)
133 #endif
134
135 #ifdef HMEDEBUG
136 #define HMD(x) printk x
137 #else
138 #define HMD(x)
139 #endif
140
141 /* #define AUTO_SWITCH_DEBUG */
142
143 #ifdef AUTO_SWITCH_DEBUG
144 #define ASD(x) printk x
145 #else
146 #define ASD(x)
147 #endif
148
149 #define DEFAULT_IPG0 16 /* For lance-mode only */
150 #define DEFAULT_IPG1 8 /* For all modes */
151 #define DEFAULT_IPG2 4 /* For all modes */
152 #define DEFAULT_JAMSIZE 4 /* Toe jam */
153
154 /* Oh yes, the MIF BitBang is mighty fun to program. BitBucket is more like it. */
155 #define BB_PUT_BIT(hp, tregs, bit) \
156 do { hme_write32(hp, &(tregs)->bb_data, (bit)); \
157 hme_write32(hp, &(tregs)->bb_clock, 0); \
158 hme_write32(hp, &(tregs)->bb_clock, 1); \
159 } while(0)
160
161 #define BB_GET_BIT(hp, tregs, internal) \
162 ({ \
163 hme_write32(hp, &(tregs)->bb_clock, 0); \
164 hme_write32(hp, &(tregs)->bb_clock, 1); \
165 if(internal) \
166 hme_read32(hp, &(tregs)->cfg) & TCV_CFG_MDIO0; \
167 else \
168 hme_read32(hp, &(tregs)->cfg) & TCV_CFG_MDIO1; \
169 })
170
171 #define BB_GET_BIT2(hp, tregs, internal) \
172 ({ \
173 int retval; \
174 hme_write32(hp, &(tregs)->bb_clock, 0); \
175 udelay(1); \
176 if(internal) \
177 retval = hme_read32(hp, &(tregs)->cfg) & TCV_CFG_MDIO0; \
178 else \
179 retval = hme_read32(hp, &(tregs)->cfg) & TCV_CFG_MDIO1; \
180 hme_write32(hp, &(tregs)->bb_clock, 1); \
181 retval; \
182 })
183
184 #define TCVR_FAILURE 0x80000000 /* Impossible MIF read value */
185
186 static inline int happy_meal_bb_read(struct happy_meal *hp,
187 struct hmeal_tcvregs *tregs, int reg)
188 {
189 volatile int unused;
190 unsigned long tmp;
191 int retval = 0;
192 int i;
193
194 ASD(("happy_meal_bb_read: reg=%d ", reg));
195
196 /* Enable the MIF BitBang outputs. */
197 hme_write32(hp, &tregs->bb_oenab, 1);
198
199 /* Force BitBang into the idle state. */
200 for(i = 0; i < 32; i++)
201 BB_PUT_BIT(hp, tregs, 1);
202
203 /* Give it the read sequence. */
204 BB_PUT_BIT(hp, tregs, 0);
205 BB_PUT_BIT(hp, tregs, 1);
206 BB_PUT_BIT(hp, tregs, 1);
207 BB_PUT_BIT(hp, tregs, 0);
208
209 /* Give it the PHY address. */
210 tmp = hp->paddr & 0xff;
211 for(i = 4; i >= 0; i--)
212 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
213
214 /* Tell it what register we want to read. */
215 tmp = (reg & 0xff);
216 for(i = 4; i >= 0; i--)
217 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
218
219 /* Close down the MIF BitBang outputs. */
220 hme_write32(hp, &tregs->bb_oenab, 0);
221
222 /* Now read in the value. */
223 unused = BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
224 for(i = 15; i >= 0; i--)
225 retval |= BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
226 unused = BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
227 unused = BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
228 unused = BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
229 ASD(("value=%x\n", retval));
230 return retval;
231 }
232
233 static inline void happy_meal_bb_write(struct happy_meal *hp,
234 struct hmeal_tcvregs *tregs, int reg,
235 unsigned short value)
236 {
237 unsigned long tmp;
238 int i;
239
240 ASD(("happy_meal_bb_write: reg=%d value=%x\n", reg, value));
241
242 /* Enable the MIF BitBang outputs. */
243 hme_write32(hp, &tregs->bb_oenab, 1);
244
245 /* Force BitBang into the idle state. */
246 for(i = 0; i < 32; i++)
247 BB_PUT_BIT(hp, tregs, 1);
248
249 /* Give it write sequence. */
250 BB_PUT_BIT(hp, tregs, 0);
251 BB_PUT_BIT(hp, tregs, 1);
252 BB_PUT_BIT(hp, tregs, 0);
253 BB_PUT_BIT(hp, tregs, 1);
254
255 /* Give it the PHY address. */
256 tmp = (hp->paddr & 0xff);
257 for(i = 4; i >= 0; i--)
258 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
259
260 /* Tell it what register we will be writing. */
261 tmp = (reg & 0xff);
262 for(i = 4; i >= 0; i--)
263 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
264
265 /* Tell it to become ready for the bits. */
266 BB_PUT_BIT(hp, tregs, 1);
267 BB_PUT_BIT(hp, tregs, 0);
268
269 for(i = 15; i >= 0; i--)
270 BB_PUT_BIT(hp, tregs, ((value >> i) & 1));
271
272 /* Close down the MIF BitBang outputs. */
273 hme_write32(hp, &tregs->bb_oenab, 0);
274 }
275
276 #define TCVR_READ_TRIES 16
277
278 static inline int happy_meal_tcvr_read(struct happy_meal *hp,
279 struct hmeal_tcvregs *tregs, int reg)
280 {
281 int tries = TCVR_READ_TRIES;
282 int retval;
283
284 ASD(("happy_meal_tcvr_read: reg=0x%02x ", reg));
285 if(hp->tcvr_type == none) {
286 ASD(("no transceiver, value=TCVR_FAILURE\n"));
287 return TCVR_FAILURE;
288 }
289
290 if(!(hp->happy_flags & HFLAG_FENABLE)) {
291 ASD(("doing bit bang\n"));
292 return happy_meal_bb_read(hp, tregs, reg);
293 }
294
295 hme_write32(hp, &tregs->frame,
296 (FRAME_READ | (hp->paddr << 23) | ((reg & 0xff) << 18)));
297 while(!(hme_read32(hp, &tregs->frame) & 0x10000) && --tries)
298 udelay(20);
299 if(!tries) {
300 printk("happy meal: Aieee, transceiver MIF read bolixed\n");
301 return TCVR_FAILURE;
302 }
303 retval = hme_read32(hp, &tregs->frame) & 0xffff;
304 ASD(("value=%04x\n", retval));
305 return retval;
306 }
307
308 #define TCVR_WRITE_TRIES 16
309
310 static inline void happy_meal_tcvr_write(struct happy_meal *hp,
311 struct hmeal_tcvregs *tregs, int reg,
312 unsigned short value)
313 {
314 int tries = TCVR_WRITE_TRIES;
315
316 ASD(("happy_meal_tcvr_write: reg=0x%02x value=%04x\n", reg, value));
317
318 /* Welcome to Sun Microsystems, can I take your order please? */
319 if(!hp->happy_flags & HFLAG_FENABLE)
320 return happy_meal_bb_write(hp, tregs, reg, value);
321
322 /* Would you like fries with that? */
323 hme_write32(hp, &tregs->frame,
324 (FRAME_WRITE | (hp->paddr << 23) |
325 ((reg & 0xff) << 18) | (value & 0xffff)));
326 while(!(hme_read32(hp, &tregs->frame) & 0x10000) && --tries)
327 udelay(20);
328
329 /* Anything else? */
330 if(!tries)
331 printk("happy meal: Aieee, transceiver MIF write bolixed\n");
332
333 /* Fifty-two cents is your change, have a nice day. */
334 }
335
336 /* Auto negotiation. The scheme is very simple. We have a timer routine
337 * that keeps watching the auto negotiation process as it progresses.
338 * The DP83840 is first told to start doing it's thing, we set up the time
339 * and place the timer state machine in it's initial state.
340 *
341 * Here the timer peeks at the DP83840 status registers at each click to see
342 * if the auto negotiation has completed, we assume here that the DP83840 PHY
343 * will time out at some point and just tell us what (didn't) happen. For
344 * complete coverage we only allow so many of the ticks at this level to run,
345 * when this has expired we print a warning message and try another strategy.
346 * This "other" strategy is to force the interface into various speed/duplex
347 * configurations and we stop when we see a link-up condition before the
348 * maximum number of "peek" ticks have occurred.
349 *
350 * Once a valid link status has been detected we configure the BigMAC and
351 * the rest of the Happy Meal to speak the most efficient protocol we could
352 * get a clean link for. The priority for link configurations, highest first
353 * is:
354 * 100 Base-T Full Duplex
355 * 100 Base-T Half Duplex
356 * 10 Base-T Full Duplex
357 * 10 Base-T Half Duplex
358 *
359 * We start a new timer now, after a successful auto negotiation status has
360 * been detected. This timer just waits for the link-up bit to get set in
361 * the BMCR of the DP83840. When this occurs we print a kernel log message
362 * describing the link type in use and the fact that it is up.
363 *
364 * If a fatal error of some sort is signalled and detected in the interrupt
365 * service routine, and the chip is reset, or the link is ifconfig'd down
366 * and then back up, this entire process repeats itself all over again.
367 */
368 static int try_next_permutation(struct happy_meal *hp, struct hmeal_tcvregs *tregs)
369 {
370 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, DP83840_BMCR);
371
372 /* Downgrade from full to half duplex. Only possible
373 * via ethtool.
374 */
375 if(hp->sw_bmcr & BMCR_FULLDPLX) {
376 hp->sw_bmcr &= ~(BMCR_FULLDPLX);
377 happy_meal_tcvr_write(hp, tregs, DP83840_BMCR, hp->sw_bmcr);
378 return 0;
379 }
380
381 /* Downgrade from 100 to 10. */
382 if(hp->sw_bmcr & BMCR_SPEED100) {
383 hp->sw_bmcr &= ~(BMCR_SPEED100);
384 happy_meal_tcvr_write(hp, tregs, DP83840_BMCR, hp->sw_bmcr);
385 return 0;
386 }
387
388 /* We've tried everything. */
389 return -1;
390 }
391
392 static void display_link_mode(struct happy_meal *hp, struct hmeal_tcvregs *tregs)
393 {
394 printk("%s: Link is up using ", hp->dev->name);
395 if(hp->tcvr_type == external)
396 printk("external ");
397 else
398 printk("internal ");
399 printk("transceiver at ");
400 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, DP83840_LPA);
401 if(hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) {
402 if(hp->sw_lpa & LPA_100FULL)
403 printk("100Mb/s, Full Duplex.\n");
404 else
405 printk("100Mb/s, Half Duplex.\n");
406 } else {
407 if(hp->sw_lpa & LPA_10FULL)
408 printk("10Mb/s, Full Duplex.\n");
409 else
410 printk("10Mb/s, Half Duplex.\n");
411 }
412 }
413
414 static void display_forced_link_mode(struct happy_meal *hp, struct hmeal_tcvregs *tregs)
415 {
416 printk("%s: Link has been forced up using ", hp->dev->name);
417 if(hp->tcvr_type == external)
418 printk("external ");
419 else
420 printk("internal ");
421 printk("transceiver at ");
422 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, DP83840_BMCR);
423 if(hp->sw_bmcr & BMCR_SPEED100)
424 printk("100Mb/s, ");
425 else
426 printk("10Mb/s, ");
427 if(hp->sw_bmcr & BMCR_FULLDPLX)
428 printk("Full Duplex.\n");
429 else
430 printk("Half Duplex.\n");
431 }
432
433 static int set_happy_link_modes(struct happy_meal *hp, struct hmeal_tcvregs *tregs)
434 {
435 int full;
436
437 /* All we care about is making sure the bigmac tx_cfg has a
438 * proper duplex setting.
439 */
440 if(hp->timer_state == arbwait) {
441 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, DP83840_LPA);
442 if(!(hp->sw_lpa & (LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL)))
443 goto no_response;
444 if(hp->sw_lpa & LPA_100FULL)
445 full = 1;
446 else if(hp->sw_lpa & LPA_100HALF)
447 full = 0;
448 else if(hp->sw_lpa & LPA_10FULL)
449 full = 1;
450 else
451 full = 0;
452 } else {
453 /* Forcing a link mode. */
454 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, DP83840_BMCR);
455 if(hp->sw_bmcr & BMCR_FULLDPLX)
456 full = 1;
457 else
458 full = 0;
459 }
460
461 /* Before changing other bits in the tx_cfg register, and in
462 * general any of other the TX config registers too, you
463 * must:
464 * 1) Clear Enable
465 * 2) Poll with reads until that bit reads back as zero
466 * 3) Make TX configuration changes
467 * 4) Set Enable once more
468 */
469 hme_write32(hp, &hp->bigmacregs->tx_cfg,
470 hme_read32(hp, &hp->bigmacregs->tx_cfg) &
471 ~(BIGMAC_TXCFG_ENABLE));
472 while(hme_read32(hp, &hp->bigmacregs->tx_cfg) & BIGMAC_TXCFG_ENABLE)
473 barrier();
474 if(full) {
475 hp->happy_flags |= HFLAG_FULL;
476 hme_write32(hp, &hp->bigmacregs->tx_cfg,
477 hme_read32(hp, &hp->bigmacregs->tx_cfg) |
478 BIGMAC_TXCFG_FULLDPLX);
479 } else {
480 hp->happy_flags &= ~(HFLAG_FULL);
481 hme_write32(hp, &hp->bigmacregs->tx_cfg,
482 hme_read32(hp, &hp->bigmacregs->tx_cfg) &
483 ~(BIGMAC_TXCFG_FULLDPLX));
484 }
485 hme_write32(hp, &hp->bigmacregs->tx_cfg,
486 hme_read32(hp, &hp->bigmacregs->tx_cfg) |
487 BIGMAC_TXCFG_ENABLE);
488 return 0;
489 no_response:
490 return 1;
491 }
492
493 static int happy_meal_init(struct happy_meal *hp, int from_irq);
494
495 static void happy_meal_timer(unsigned long data)
496 {
497 struct happy_meal *hp = (struct happy_meal *) data;
498 struct hmeal_tcvregs *tregs = hp->tcvregs;
499 int restart_timer = 0;
500
501 hp->timer_ticks++;
502 switch(hp->timer_state) {
503 case arbwait:
504 /* Only allow for 5 ticks, thats 10 seconds and much too
505 * long to wait for arbitration to complete.
506 */
507 if(hp->timer_ticks >= 10) {
508 /* Enter force mode. */
509 do_force_mode:
510 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, DP83840_BMCR);
511 printk("%s: Auto-Negotiation unsuccessful, trying force link mode\n",
512 hp->dev->name);
513 hp->sw_bmcr = BMCR_SPEED100;
514 happy_meal_tcvr_write(hp, tregs, DP83840_BMCR, hp->sw_bmcr);
515
516 /* OK, seems we need do disable the transceiver for the first
517 * tick to make sure we get an accurate link state at the
518 * second tick.
519 */
520 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
521 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
522 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
523
524 hp->timer_state = ltrywait;
525 hp->timer_ticks = 0;
526 restart_timer = 1;
527 } else {
528 /* Anything interesting happen? */
529 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, DP83840_BMSR);
530 if(hp->sw_bmsr & BMSR_ANEGCOMPLETE) {
531 int ret;
532
533 /* Just what we've been waiting for... */
534 ret = set_happy_link_modes(hp, tregs);
535 if(ret) {
536 /* Ooops, something bad happened, go to force
537 * mode.
538 *
539 * XXX Broken hubs which don't support 802.3u
540 * XXX auto-negotiation make this happen as well.
541 */
542 goto do_force_mode;
543 }
544
545 /* Success, at least so far, advance our state engine. */
546 hp->timer_state = lupwait;
547 restart_timer = 1;
548 } else {
549 restart_timer = 1;
550 }
551 }
552 break;
553
554 case lupwait:
555 /* Auto negotiation was successful and we are awaiting a
556 * link up status. I have decided to let this timer run
557 * forever until some sort of error is signalled, reporting
558 * a message to the user at 10 second intervals.
559 */
560 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, DP83840_BMSR);
561 if(hp->sw_bmsr & BMSR_LSTATUS) {
562 /* Wheee, it's up, display the link mode in use and put
563 * the timer to sleep.
564 */
565 display_link_mode(hp, tregs);
566 hp->timer_state = asleep;
567 restart_timer = 0;
568 } else {
569 if(hp->timer_ticks >= 10) {
570 printk("%s: Auto negotiation successful, link still "
571 "not completely up.\n", hp->dev->name);
572 hp->timer_ticks = 0;
573 restart_timer = 1;
574 } else {
575 restart_timer = 1;
576 }
577 }
578 break;
579
580 case ltrywait:
581 /* Making the timeout here too long can make it take
582 * annoyingly long to attempt all of the link mode
583 * permutations, but then again this is essentially
584 * error recovery code for the most part.
585 */
586 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, DP83840_BMSR);
587 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
588 if(hp->timer_ticks == 1) {
589 /* Re-enable transceiver, we'll re-enable the transceiver next
590 * tick, then check link state on the following tick. */
591 hp->sw_csconfig |= CSCONFIG_TCVDISAB;
592 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
593 restart_timer = 1;
594 break;
595 }
596 if(hp->timer_ticks == 2) {
597 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
598 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
599 restart_timer = 1;
600 break;
601 }
602 if(hp->sw_bmsr & BMSR_LSTATUS) {
603 /* Force mode selection success. */
604 display_forced_link_mode(hp, tregs);
605 set_happy_link_modes(hp, tregs); /* XXX error? then what? */
606 hp->timer_state = asleep;
607 restart_timer = 0;
608 } else {
609 if(hp->timer_ticks >= 4) { /* 6 seconds or so... */
610 int ret;
611
612 ret = try_next_permutation(hp, tregs);
613 if(ret == -1) {
614 /* Aieee, tried them all, reset the
615 * chip and try all over again.
616 */
617
618 /* Let the user know... */
619 printk("%s: Link down, cable problem?\n",
620 hp->dev->name);
621
622 ret = happy_meal_init(hp, 0);
623 if(ret) {
624 /* ho hum... */
625 printk("%s: Error, cannot re-init the "
626 "Happy Meal.\n", hp->dev->name);
627 }
628 return;
629 }
630 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
631 hp->sw_csconfig |= CSCONFIG_TCVDISAB;
632 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
633 hp->timer_ticks = 0;
634 restart_timer = 1;
635 } else {
636 restart_timer = 1;
637 }
638 }
639 break;
640
641 case asleep:
642 default:
643 /* Can't happens.... */
644 printk("%s: Aieee, link timer is asleep but we got one anyways!\n",
645 hp->dev->name);
646 restart_timer = 0;
647 hp->timer_ticks = 0;
648 hp->timer_state = asleep; /* foo on you */
649 break;
650 };
651
652 if(restart_timer) {
653 hp->happy_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2 sec. */
654 add_timer(&hp->happy_timer);
655 }
656 }
657
658 #define TX_RESET_TRIES 32
659 #define RX_RESET_TRIES 32
660
661 static inline void happy_meal_tx_reset(struct happy_meal *hp,
662 struct hmeal_bigmacregs *bregs)
663 {
664 int tries = TX_RESET_TRIES;
665
666 HMD(("happy_meal_tx_reset: reset, "));
667
668 /* Would you like to try our SMCC Delux? */
669 hme_write32(hp, &bregs->tx_swreset, 0);
670 while((hme_read32(hp, &bregs->tx_swreset) & 1) && --tries)
671 udelay(20);
672
673 /* Lettuce, tomato, buggy hardware (no extra charge)? */
674 if(!tries)
675 printk("happy meal: Transceiver BigMac ATTACK!");
676
677 /* Take care. */
678 HMD(("done\n"));
679 }
680
681 static inline void happy_meal_rx_reset(struct happy_meal *hp,
682 struct hmeal_bigmacregs *bregs)
683 {
684 int tries = RX_RESET_TRIES;
685
686 HMD(("happy_meal_rx_reset: reset, "));
687
688 /* We have a special on GNU/Viking hardware bugs today. */
689 hme_write32(hp, &bregs->rx_swreset, 0);
690 while((hme_read32(hp, &bregs->rx_swreset) & 1) && --tries)
691 udelay(20);
692
693 /* Will that be all? */
694 if(!tries)
695 printk("happy meal: Receiver BigMac ATTACK!");
696
697 /* Don't forget your vik_1137125_wa. Have a nice day. */
698 HMD(("done\n"));
699 }
700
701 #define STOP_TRIES 16
702
703 static inline void happy_meal_stop(struct happy_meal *hp,
704 struct hmeal_gregs *gregs)
705 {
706 int tries = STOP_TRIES;
707
708 HMD(("happy_meal_stop: reset, "));
709
710 /* We're consolidating our STB products, it's your lucky day. */
711 hme_write32(hp, &gregs->sw_reset, GREG_RESET_ALL);
712 while(hme_read32(hp, &gregs->sw_reset) && --tries)
713 udelay(20);
714
715 /* Come back next week when we are "Sun Microelectronics". */
716 if(!tries)
717 printk("happy meal: Fry guys.");
718
719 /* Remember: "Different name, same old buggy as shit hardware." */
720 HMD(("done\n"));
721 }
722
723 static void happy_meal_get_counters(struct happy_meal *hp,
724 struct hmeal_bigmacregs *bregs)
725 {
726 struct net_device_stats *stats = &hp->net_stats;
727
728 stats->rx_crc_errors += hme_read32(hp, &bregs->rcrce_ctr);
729 hme_write32(hp, &bregs->rcrce_ctr, 0);
730
731 stats->rx_frame_errors += hme_read32(hp, &bregs->unale_ctr);
732 hme_write32(hp, &bregs->unale_ctr, 0);
733
734 stats->rx_length_errors += hme_read32(hp, &bregs->gle_ctr);
735 hme_write32(hp, &bregs->gle_ctr, 0);
736
737 stats->tx_aborted_errors += hme_read32(hp, &bregs->ex_ctr);
738
739 stats->collisions +=
740 (hme_read32(hp, &bregs->ex_ctr) +
741 hme_read32(hp, &bregs->lt_ctr));
742 hme_write32(hp, &bregs->ex_ctr, 0);
743 hme_write32(hp, &bregs->lt_ctr, 0);
744 }
745
746 static inline void happy_meal_poll_start(struct happy_meal *hp,
747 struct hmeal_tcvregs *tregs)
748 {
749 unsigned long tmp;
750 int speed;
751
752 ASD(("happy_meal_poll_start: "));
753 if(!(hp->happy_flags & HFLAG_POLLENABLE)) {
754 HMD(("polling disabled, return\n"));
755 return;
756 }
757
758 /* Start the MIF polling on the external transceiver. */
759 ASD(("polling on, "));
760 tmp = hme_read32(hp, &tregs->cfg);
761 tmp &= ~(TCV_CFG_PDADDR | TCV_CFG_PREGADDR);
762 tmp |= ((hp->paddr & 0x1f) << 10);
763 tmp |= (TCV_PADDR_ETX << 3);
764 tmp |= TCV_CFG_PENABLE;
765 hme_write32(hp, &tregs->cfg, tmp);
766
767 /* Let the bits set. */
768 udelay(200);
769
770 /* We are polling now. */
771 ASD(("now polling, "));
772 hp->happy_flags |= HFLAG_POLL;
773
774 /* Clear the poll flags, get the basic status as of now. */
775 hp->poll_flag = 0;
776 hp->poll_data = tregs->status >> 16;
777
778 if(hp->happy_flags & HFLAG_AUTO)
779 speed = hp->auto_speed;
780 else
781 speed = hp->forced_speed;
782
783 /* Listen only for the MIF interrupts we want to hear. */
784 ASD(("mif ints on, "));
785 if(speed == 100)
786 hme_write32(hp, &tregs->int_mask, 0xfffb);
787 else
788 hme_write32(hp, &tregs->int_mask, 0xfff9);
789 ASD(("done\n"));
790 }
791
792 static inline void happy_meal_poll_stop(struct happy_meal *hp,
793 struct hmeal_tcvregs *tregs)
794 {
795 ASD(("happy_meal_poll_stop: "));
796
797 /* If polling disabled or not polling already, nothing to do. */
798 if((hp->happy_flags & (HFLAG_POLLENABLE | HFLAG_POLL)) !=
799 (HFLAG_POLLENABLE | HFLAG_POLL)) {
800 HMD(("not polling, return\n"));
801 return;
802 }
803
804 /* Shut up the MIF. */
805 ASD(("were polling, mif ints off, "));
806 hme_write32(hp, &tregs->int_mask, 0xffff);
807
808 /* Turn off polling. */
809 ASD(("polling off, "));
810 hme_write32(hp, &tregs->cfg,
811 hme_read32(hp, &tregs->cfg) & ~(TCV_CFG_PENABLE));
812
813 /* We are no longer polling. */
814 hp->happy_flags &= ~(HFLAG_POLL);
815
816 /* Let the bits set. */
817 udelay(200);
818 ASD(("done\n"));
819 }
820
821 /* Only Sun can take such nice parts and fuck up the programming interface
822 * like this. Good job guys...
823 */
824 #define TCVR_RESET_TRIES 16 /* It should reset quickly */
825 #define TCVR_UNISOLATE_TRIES 32 /* Dis-isolation can take longer. */
826
827 static int happy_meal_tcvr_reset(struct happy_meal *hp,
828 struct hmeal_tcvregs *tregs)
829 {
830 unsigned long tconfig;
831 int result, tries = TCVR_RESET_TRIES;
832
833 tconfig = hme_read32(hp, &tregs->cfg);
834 ASD(("happy_meal_tcvr_reset: tcfg<%08lx> ", tconfig));
835 if(hp->tcvr_type == external) {
836 ASD(("external<"));
837 hme_write32(hp, &tregs->cfg, tconfig & ~(TCV_CFG_PSELECT));
838 hp->tcvr_type = internal;
839 hp->paddr = TCV_PADDR_ITX;
840 ASD(("ISOLATE,"));
841 happy_meal_tcvr_write(hp, tregs, DP83840_BMCR,
842 (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
843 result = happy_meal_tcvr_read(hp, tregs, DP83840_BMCR);
844 if(result == TCVR_FAILURE) {
845 ASD(("phyread_fail>\n"));
846 return -1;
847 }
848 ASD(("phyread_ok,PSELECT>"));
849 hme_write32(hp, &tregs->cfg, tconfig | TCV_CFG_PSELECT);
850 hp->tcvr_type = external;
851 hp->paddr = TCV_PADDR_ETX;
852 } else {
853 if(tconfig & TCV_CFG_MDIO1) {
854 ASD(("internal<PSELECT,"));
855 hme_write32(hp, &tregs->cfg, (tconfig | TCV_CFG_PSELECT));
856 ASD(("ISOLATE,"));
857 happy_meal_tcvr_write(hp, tregs, DP83840_BMCR,
858 (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
859 result = happy_meal_tcvr_read(hp, tregs, DP83840_BMCR);
860 if(result == TCVR_FAILURE) {
861 ASD(("phyread_fail>\n"));
862 return -1;
863 }
864 ASD(("phyread_ok,~PSELECT>"));
865 hme_write32(hp, &tregs->cfg, (tconfig & ~(TCV_CFG_PSELECT)));
866 hp->tcvr_type = internal;
867 hp->paddr = TCV_PADDR_ITX;
868 }
869 }
870
871 ASD(("BMCR_RESET "));
872 happy_meal_tcvr_write(hp, tregs, DP83840_BMCR, BMCR_RESET);
873
874 while(--tries) {
875 result = happy_meal_tcvr_read(hp, tregs, DP83840_BMCR);
876 if(result == TCVR_FAILURE)
877 return -1;
878 hp->sw_bmcr = result;
879 if(!(result & BMCR_RESET))
880 break;
881 udelay(20);
882 }
883 if(!tries) {
884 ASD(("BMCR RESET FAILED!\n"));
885 return -1;
886 }
887 ASD(("RESET_OK\n"));
888
889 /* Get fresh copies of the PHY registers. */
890 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, DP83840_BMSR);
891 hp->sw_physid1 = happy_meal_tcvr_read(hp, tregs, DP83840_PHYSID1);
892 hp->sw_physid2 = happy_meal_tcvr_read(hp, tregs, DP83840_PHYSID2);
893 hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, DP83840_ADVERTISE);
894
895 ASD(("UNISOLATE"));
896 hp->sw_bmcr &= ~(BMCR_ISOLATE);
897 happy_meal_tcvr_write(hp, tregs, DP83840_BMCR, hp->sw_bmcr);
898
899 tries = TCVR_UNISOLATE_TRIES;
900 while(--tries) {
901 result = happy_meal_tcvr_read(hp, tregs, DP83840_BMCR);
902 if(result == TCVR_FAILURE)
903 return -1;
904 if(!(result & BMCR_ISOLATE))
905 break;
906 udelay(20);
907 }
908 if(!tries) {
909 ASD((" FAILED!\n"));
910 return -1;
911 }
912 ASD((" SUCCESS and CSCONFIG_DFBYPASS\n"));
913 result = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
914 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, (result | CSCONFIG_DFBYPASS));
915 return 0;
916 }
917
918 /* Figure out whether we have an internal or external transceiver. */
919 static void happy_meal_transceiver_check(struct happy_meal *hp,
920 struct hmeal_tcvregs *tregs)
921 {
922 unsigned long tconfig = hme_read32(hp, &tregs->cfg);
923
924 ASD(("happy_meal_transceiver_check: tcfg=%08lx ", tconfig));
925 if(hp->happy_flags & HFLAG_POLL) {
926 /* If we are polling, we must stop to get the transceiver type. */
927 ASD(("<polling> "));
928 if(hp->tcvr_type == internal) {
929 if(tconfig & TCV_CFG_MDIO1) {
930 ASD(("<internal> <poll stop> "));
931 happy_meal_poll_stop(hp, tregs);
932 hp->paddr = TCV_PADDR_ETX;
933 hp->tcvr_type = external;
934 ASD(("<external>\n"));
935 tconfig &= ~(TCV_CFG_PENABLE);
936 tconfig |= TCV_CFG_PSELECT;
937 hme_write32(hp, &tregs->cfg, tconfig);
938 }
939 } else {
940 if(hp->tcvr_type == external) {
941 ASD(("<external> "));
942 if(!(hme_read32(hp, &tregs->status) >> 16)) {
943 ASD(("<poll stop> "));
944 happy_meal_poll_stop(hp, tregs);
945 hp->paddr = TCV_PADDR_ITX;
946 hp->tcvr_type = internal;
947 ASD(("<internal>\n"));
948 hme_write32(hp, &tregs->cfg,
949 hme_read32(hp, &tregs->cfg) &
950 ~(TCV_CFG_PSELECT));
951 }
952 ASD(("\n"));
953 } else {
954 ASD(("<none>\n"));
955 }
956 }
957 } else {
958 unsigned long reread = hme_read32(hp, &tregs->cfg);
959
960 /* Else we can just work off of the MDIO bits. */
961 ASD(("<not polling> "));
962 if(reread & TCV_CFG_MDIO1) {
963 hme_write32(hp, &tregs->cfg, tconfig | TCV_CFG_PSELECT);
964 hp->paddr = TCV_PADDR_ETX;
965 hp->tcvr_type = external;
966 ASD(("<external>\n"));
967 } else {
968 if(reread & TCV_CFG_MDIO0) {
969 hme_write32(hp, &tregs->cfg,
970 tconfig & ~(TCV_CFG_PSELECT));
971 hp->paddr = TCV_PADDR_ITX;
972 hp->tcvr_type = internal;
973 ASD(("<internal>\n"));
974 } else {
975 printk("happy meal: Transceiver and a coke please.");
976 hp->tcvr_type = none; /* Grrr... */
977 ASD(("<none>\n"));
978 }
979 }
980 }
981 }
982
983 /* The receive ring buffers are a bit tricky to get right. Here goes...
984 *
985 * The buffers we dma into must be 64 byte aligned. So we use a special
986 * alloc_skb() routine for the happy meal to allocate 64 bytes more than
987 * we really need.
988 *
989 * We use skb_reserve() to align the data block we get in the skb. We
990 * also program the etxregs->cfg register to use an offset of 2. This
991 * imperical constant plus the ethernet header size will always leave
992 * us with a nicely aligned ip header once we pass things up to the
993 * protocol layers.
994 *
995 * The numbers work out to:
996 *
997 * Max ethernet frame size 1518
998 * Ethernet header size 14
999 * Happy Meal base offset 2
1000 *
1001 * Say a skb data area is at 0xf001b010, and its size alloced is
1002 * (ETH_FRAME_LEN + 64 + 2) = (1514 + 64 + 2) = 1580 bytes.
1003 *
1004 * First our alloc_skb() routine aligns the data base to a 64 byte
1005 * boundry. We now have 0xf001b040 as our skb data address. We
1006 * plug this into the receive descriptor address.
1007 *
1008 * Next, we skb_reserve() 2 bytes to account for the Happy Meal offset.
1009 * So now the data we will end up looking at starts at 0xf001b042. When
1010 * the packet arrives, we will check out the size received and subtract
1011 * this from the skb->length. Then we just pass the packet up to the
1012 * protocols as is, and allocate a new skb to replace this slot we have
1013 * just received from.
1014 *
1015 * The ethernet layer will strip the ether header from the front of the
1016 * skb we just sent to it, this leaves us with the ip header sitting
1017 * nicely aligned at 0xf001b050. Also, for tcp and udp packets the
1018 * Happy Meal has even checksummed the tcp/udp data for us. The 16
1019 * bit checksum is obtained from the low bits of the receive descriptor
1020 * flags, thus:
1021 *
1022 * skb->csum = rxd->rx_flags & 0xffff;
1023 * skb->ip_summed = CHECKSUM_HW;
1024 *
1025 * before sending off the skb to the protocols, and we are good as gold.
1026 */
1027 static inline void happy_meal_clean_rings(struct happy_meal *hp)
1028 {
1029 int i;
1030
1031 for(i = 0; i < RX_RING_SIZE; i++) {
1032 if(hp->rx_skbs[i] != NULL) {
1033 dev_kfree_skb(hp->rx_skbs[i]);
1034 hp->rx_skbs[i] = NULL;
1035 }
1036 }
1037
1038 for(i = 0; i < TX_RING_SIZE; i++) {
1039 if(hp->tx_skbs[i] != NULL) {
1040 dev_kfree_skb(hp->tx_skbs[i]);
1041 hp->tx_skbs[i] = NULL;
1042 }
1043 }
1044 }
1045
1046 static void happy_meal_init_rings(struct happy_meal *hp, int from_irq)
1047 {
1048 struct hmeal_init_block *hb = hp->happy_block;
1049 struct net_device *dev = hp->dev;
1050 int i, gfp_flags = GFP_KERNEL;
1051
1052 if(from_irq || in_interrupt())
1053 gfp_flags = GFP_ATOMIC;
1054
1055 HMD(("happy_meal_init_rings: counters to zero, "));
1056 hp->rx_new = hp->rx_old = hp->tx_new = hp->tx_old = 0;
1057
1058 /* Free any skippy bufs left around in the rings. */
1059 HMD(("clean, "));
1060 happy_meal_clean_rings(hp);
1061
1062 /* Now get new skippy bufs for the receive ring. */
1063 HMD(("init rxring, "));
1064 for(i = 0; i < RX_RING_SIZE; i++) {
1065 struct sk_buff *skb;
1066
1067 skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, gfp_flags | GFP_DMA);
1068 if(!skb)
1069 continue;
1070 hp->rx_skbs[i] = skb;
1071 skb->dev = dev;
1072
1073 /* Because we reserve afterwards. */
1074 skb_put(skb, (ETH_FRAME_LEN + RX_OFFSET));
1075
1076 #ifdef CONFIG_PCI
1077 if(hp->happy_flags & HFLAG_PCI) {
1078 pcihme_write_rxd(&hb->happy_meal_rxd[i],
1079 (RXFLAG_OWN |
1080 ((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
1081 (u32)virt_to_bus((volatile void *)skb->data));
1082 } else
1083 #endif
1084 #ifndef __sparc_v9__
1085 if (sparc_cpu_model == sun4d) {
1086 __u32 va = (__u32)hp->sun4d_buffers + i * PAGE_SIZE;
1087
1088 hb->happy_meal_rxd[i].rx_addr =
1089 iounit_map_dma_page(va, skb->data, hp->happy_sbus_dev->my_bus);
1090 hb->happy_meal_rxd[i].rx_flags =
1091 (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16));
1092 } else
1093 #endif
1094 {
1095 hb->happy_meal_rxd[i].rx_addr = sbus_dvma_addr(skb->data);
1096 hb->happy_meal_rxd[i].rx_flags =
1097 (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16));
1098 }
1099 skb_reserve(skb, RX_OFFSET);
1100 }
1101
1102 HMD(("init txring, "));
1103 for(i = 0; i < TX_RING_SIZE; i++)
1104 hb->happy_meal_txd[i].tx_flags = 0;
1105 HMD(("done\n"));
1106 }
1107
1108 #ifndef __sparc_v9__
1109 static void sun4c_happy_meal_init_rings(struct happy_meal *hp)
1110 {
1111 struct hmeal_init_block *hb = hp->happy_block;
1112 __u32 hbufs = hp->s4c_buf_dvma;
1113 int i;
1114
1115 HMD(("happy_meal_init_rings: counters to zero, "));
1116 hp->rx_new = hp->rx_old = hp->tx_new = hp->tx_old = 0;
1117
1118 HMD(("init rxring, "));
1119 for(i = 0; i < RX_RING_SIZE; i++) {
1120 hb->happy_meal_rxd[i].rx_addr = hbufs + hbuf_offset(rx_buf, i);
1121 hb->happy_meal_rxd[i].rx_flags =
1122 (RXFLAG_OWN | ((SUN4C_RX_BUFF_SIZE - RX_OFFSET) << 16));
1123 }
1124
1125 HMD(("init txring, "));
1126 for(i = 0; i < TX_RING_SIZE; i++)
1127 hb->happy_meal_txd[i].tx_flags = 0;
1128 HMD(("done\n"));
1129 }
1130 #endif
1131
1132 static void happy_meal_begin_auto_negotiation(struct happy_meal *hp,
1133 struct hmeal_tcvregs *tregs,
1134 struct ethtool_cmd *ep)
1135 {
1136 int timeout;
1137
1138 /* Read all of the registers we are interested in now. */
1139 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, DP83840_BMSR);
1140 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, DP83840_BMCR);
1141 hp->sw_physid1 = happy_meal_tcvr_read(hp, tregs, DP83840_PHYSID1);
1142 hp->sw_physid2 = happy_meal_tcvr_read(hp, tregs, DP83840_PHYSID2);
1143
1144 /* XXX Check BMSR_ANEGCAPABLE, should not be necessary though. */
1145
1146 hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, DP83840_ADVERTISE);
1147 if(ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1148 /* Advertise everything we can support. */
1149 if(hp->sw_bmsr & BMSR_10HALF)
1150 hp->sw_advertise |= (ADVERTISE_10HALF);
1151 else
1152 hp->sw_advertise &= ~(ADVERTISE_10HALF);
1153
1154 if(hp->sw_bmsr & BMSR_10FULL)
1155 hp->sw_advertise |= (ADVERTISE_10FULL);
1156 else
1157 hp->sw_advertise &= ~(ADVERTISE_10FULL);
1158 if(hp->sw_bmsr & BMSR_100HALF)
1159 hp->sw_advertise |= (ADVERTISE_100HALF);
1160 else
1161 hp->sw_advertise &= ~(ADVERTISE_100HALF);
1162 if(hp->sw_bmsr & BMSR_100FULL)
1163 hp->sw_advertise |= (ADVERTISE_100FULL);
1164 else
1165 hp->sw_advertise &= ~(ADVERTISE_100FULL);
1166 happy_meal_tcvr_write(hp, tregs, DP83840_ADVERTISE, hp->sw_advertise);
1167
1168 /* XXX Currently no Happy Meal cards I know off support 100BaseT4,
1169 * XXX and this is because the DP83840 does not support it, changes
1170 * XXX would need to be made to the tx/rx logic in the driver as well
1171 * XXX so I completely skip checking for it in the BMSR for now.
1172 */
1173
1174 #ifdef AUTO_SWITCH_DEBUG
1175 ASD(("%s: Advertising [ ", hp->dev->name));
1176 if(hp->sw_advertise & ADVERTISE_10HALF)
1177 ASD(("10H "));
1178 if(hp->sw_advertise & ADVERTISE_10FULL)
1179 ASD(("10F "));
1180 if(hp->sw_advertise & ADVERTISE_100HALF)
1181 ASD(("100H "));
1182 if(hp->sw_advertise & ADVERTISE_100FULL)
1183 ASD(("100F "));
1184 #endif
1185
1186 /* Enable Auto-Negotiation, this is usually on already... */
1187 hp->sw_bmcr |= BMCR_ANENABLE;
1188 happy_meal_tcvr_write(hp, tregs, DP83840_BMCR, hp->sw_bmcr);
1189
1190 /* Restart it to make sure it is going. */
1191 hp->sw_bmcr |= BMCR_ANRESTART;
1192 happy_meal_tcvr_write(hp, tregs, DP83840_BMCR, hp->sw_bmcr);
1193
1194 /* BMCR_ANRESTART self clears when the process has begun. */
1195
1196 timeout = 64; /* More than enough. */
1197 while(--timeout) {
1198 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, DP83840_BMCR);
1199 if(!(hp->sw_bmcr & BMCR_ANRESTART))
1200 break; /* got it. */
1201 udelay(10);
1202 }
1203 if(!timeout) {
1204 printk("%s: Happy Meal would not start auto negotiation "
1205 "BMCR=0x%04x\n", hp->dev->name, hp->sw_bmcr);
1206 printk("%s: Performing force link detection.\n",
1207 hp->dev->name);
1208 goto force_link;
1209 } else {
1210 hp->timer_state = arbwait;
1211 }
1212 } else {
1213 force_link:
1214 /* Force the link up, trying first a particular mode.
1215 * Either we are here at the request of ethtool or
1216 * because the Happy Meal would not start to autoneg.
1217 */
1218
1219 /* Disable auto-negotiation in BMCR, enable the duplex and
1220 * speed setting, init the timer state machine, and fire it off.
1221 */
1222 if(ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1223 hp->sw_bmcr = BMCR_SPEED100;
1224 } else {
1225 if(ep->speed == SPEED_100)
1226 hp->sw_bmcr = BMCR_SPEED100;
1227 else
1228 hp->sw_bmcr = 0;
1229 if(ep->duplex == DUPLEX_FULL)
1230 hp->sw_bmcr |= BMCR_FULLDPLX;
1231 }
1232 happy_meal_tcvr_write(hp, tregs, DP83840_BMCR, hp->sw_bmcr);
1233
1234 /* OK, seems we need do disable the transceiver for the first
1235 * tick to make sure we get an accurate link state at the
1236 * second tick.
1237 */
1238 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
1239 DP83840_CSCONFIG);
1240 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
1241 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG,
1242 hp->sw_csconfig);
1243
1244 hp->timer_state = ltrywait;
1245 }
1246
1247 hp->timer_ticks = 0;
1248 hp->happy_timer.expires = jiffies + (12 * HZ)/10; /* 1.2 sec. */
1249 hp->happy_timer.data = (unsigned long) hp;
1250 hp->happy_timer.function = &happy_meal_timer;
1251 add_timer(&hp->happy_timer);
1252 }
1253
1254 #define CRC_POLYNOMIAL_BE 0x04c11db7UL /* Ethernet CRC, big endian */
1255 #define CRC_POLYNOMIAL_LE 0xedb88320UL /* Ethernet CRC, little endian */
1256
1257 static int happy_meal_init(struct happy_meal *hp, int from_irq)
1258 {
1259 struct hmeal_gregs *gregs = hp->gregs;
1260 struct hmeal_etxregs *etxregs = hp->etxregs;
1261 struct hmeal_erxregs *erxregs = hp->erxregs;
1262 struct hmeal_bigmacregs *bregs = hp->bigmacregs;
1263 struct hmeal_tcvregs *tregs = hp->tcvregs;
1264 unsigned long regtmp, rxcfg;
1265 unsigned char *e = &hp->dev->dev_addr[0];
1266
1267 /* If auto-negotiation timer is running, kill it. */
1268 del_timer(&hp->happy_timer);
1269
1270 HMD(("happy_meal_init: happy_flags[%08x] ",
1271 hp->happy_flags));
1272 if(!(hp->happy_flags & HFLAG_INIT)) {
1273 HMD(("set HFLAG_INIT, "));
1274 hp->happy_flags |= HFLAG_INIT;
1275 happy_meal_get_counters(hp, bregs);
1276 }
1277
1278 /* Stop polling. */
1279 HMD(("to happy_meal_poll_stop\n"));
1280 happy_meal_poll_stop(hp, tregs);
1281
1282 /* Stop transmitter and receiver. */
1283 HMD(("happy_meal_init: to happy_meal_stop\n"));
1284 happy_meal_stop(hp, gregs);
1285
1286 /* Alloc and reset the tx/rx descriptor chains. */
1287 HMD(("happy_meal_init: to happy_meal_init_rings\n"));
1288 #ifndef __sparc_v9__
1289 if(sparc_cpu_model == sun4c)
1290 sun4c_happy_meal_init_rings(hp);
1291 else
1292 #endif
1293 happy_meal_init_rings(hp, from_irq);
1294
1295 /* Shut up the MIF. */
1296 HMD(("happy_meal_init: Disable all MIF irqs (old[%08x]), ",
1297 hme_read32(hp, &tregs->int_mask)));
1298 hme_write32(hp, &tregs->int_mask, 0xffff);
1299
1300 /* See if we can enable the MIF frame on this card to speak to the DP83840. */
1301 if(hp->happy_flags & HFLAG_FENABLE) {
1302 HMD(("use frame old[%08x], ",
1303 hme_read32(hp, &tregs->cfg)));
1304 hme_write32(hp, &tregs->cfg,
1305 hme_read32(hp, &tregs->cfg) & ~(TCV_CFG_BENABLE));
1306 } else {
1307 HMD(("use bitbang old[%08x], ",
1308 hme_read32(hp, &tregs->cfg)));
1309 hme_write32(hp, &tregs->cfg,
1310 hme_read32(hp, &tregs->cfg) | TCV_CFG_BENABLE);
1311 }
1312
1313 /* Check the state of the transceiver. */
1314 HMD(("to happy_meal_transceiver_check\n"));
1315 happy_meal_transceiver_check(hp, tregs);
1316
1317 /* Put the Big Mac into a sane state. */
1318 HMD(("happy_meal_init: "));
1319 switch(hp->tcvr_type) {
1320 case none:
1321 /* Cannot operate if we don't know the transceiver type! */
1322 HMD(("AAIEEE no transceiver type, EAGAIN"));
1323 return -EAGAIN;
1324
1325 case internal:
1326 /* Using the MII buffers. */
1327 HMD(("internal, using MII, "));
1328 hme_write32(hp, &bregs->xif_cfg, 0);
1329 break;
1330
1331 case external:
1332 /* Not using the MII, disable it. */
1333 HMD(("external, disable MII, "));
1334 hme_write32(hp, &bregs->xif_cfg, BIGMAC_XCFG_MIIDISAB);
1335 break;
1336 };
1337
1338 if(happy_meal_tcvr_reset(hp, tregs))
1339 return -EAGAIN;
1340
1341 /* Reset the Happy Meal Big Mac transceiver and the receiver. */
1342 HMD(("tx/rx reset, "));
1343 happy_meal_tx_reset(hp, bregs);
1344 happy_meal_rx_reset(hp, bregs);
1345
1346 /* Set jam size and inter-packet gaps to reasonable defaults. */
1347 HMD(("jsize/ipg1/ipg2, "));
1348 hme_write32(hp, &bregs->jsize, DEFAULT_JAMSIZE);
1349 hme_write32(hp, &bregs->ipkt_gap1, DEFAULT_IPG1);
1350 hme_write32(hp, &bregs->ipkt_gap2, DEFAULT_IPG2);
1351
1352 /* Load up the MAC address and random seed. */
1353 HMD(("rseed/macaddr, "));
1354
1355 /* The docs recommend to use the 10LSB of our MAC here. */
1356 hme_write32(hp, &bregs->rand_seed, ((e[5] | e[4]<<8)&0x3ff));
1357
1358 hme_write32(hp, &bregs->mac_addr2, ((e[4] << 8) | e[5]));
1359 hme_write32(hp, &bregs->mac_addr1, ((e[2] << 8) | e[3]));
1360 hme_write32(hp, &bregs->mac_addr0, ((e[0] << 8) | e[1]));
1361
1362 HMD(("htable, "));
1363 if((hp->dev->flags & IFF_ALLMULTI) ||
1364 (hp->dev->mc_count > 64)) {
1365 hme_write32(hp, &bregs->htable0, 0xffff);
1366 hme_write32(hp, &bregs->htable1, 0xffff);
1367 hme_write32(hp, &bregs->htable2, 0xffff);
1368 hme_write32(hp, &bregs->htable3, 0xffff);
1369 } else if((hp->dev->flags & IFF_PROMISC) == 0) {
1370 u16 hash_table[4];
1371 struct dev_mc_list *dmi = hp->dev->mc_list;
1372 char *addrs;
1373 int i, j, bit, byte;
1374 u32 crc, poly = CRC_POLYNOMIAL_LE;
1375
1376 for(i = 0; i < 4; i++)
1377 hash_table[i] = 0;
1378
1379 for(i = 0; i < hp->dev->mc_count; i++) {
1380 addrs = dmi->dmi_addr;
1381 dmi = dmi->next;
1382
1383 if(!(*addrs & 1))
1384 continue;
1385
1386 crc = 0xffffffffU;
1387 for(byte = 0; byte < 6; byte++) {
1388 for(bit = *addrs++, j = 0; j < 8; j++, bit >>= 1) {
1389 int test;
1390
1391 test = ((bit ^ crc) & 0x01);
1392 crc >>= 1;
1393 if(test)
1394 crc = crc ^ poly;
1395 }
1396 }
1397 crc >>= 26;
1398 hash_table[crc >> 4] |= 1 << (crc & 0xf);
1399 }
1400 hme_write32(hp, &bregs->htable0, hash_table[0]);
1401 hme_write32(hp, &bregs->htable1, hash_table[1]);
1402 hme_write32(hp, &bregs->htable2, hash_table[2]);
1403 hme_write32(hp, &bregs->htable3, hash_table[3]);
1404 } else {
1405 hme_write32(hp, &bregs->htable3, 0);
1406 hme_write32(hp, &bregs->htable2, 0);
1407 hme_write32(hp, &bregs->htable1, 0);
1408 hme_write32(hp, &bregs->htable0, 0);
1409 }
1410
1411 /* Set the RX and TX ring ptrs. */
1412 HMD(("ring ptrs rxr[%08x] txr[%08x]\n",
1413 (hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)),
1414 (hp->hblock_dvma + hblock_offset(happy_meal_txd, 0))));
1415 hme_write32(hp, &erxregs->rx_ring,
1416 (hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)));
1417 hme_write32(hp, &etxregs->tx_ring,
1418 (hp->hblock_dvma + hblock_offset(happy_meal_txd, 0)));
1419
1420 /* Set the supported burst sizes. */
1421 HMD(("happy_meal_init: old[%08x] bursts<",
1422 hme_read32(hp, &gregs->cfg)));
1423
1424 #ifdef __sparc_v9__
1425 /* XXX Can sun4d do these too? */
1426 if(hp->happy_bursts & DMA_BURST64) {
1427 u32 gcfg = GREG_CFG_BURST64;
1428
1429 /* I have no idea if I should set the extended
1430 * transfer mode bit for Cheerio, so for now I
1431 * do not. -DaveM
1432 */
1433 if((hp->happy_flags & HFLAG_PCI) == 0) {
1434 mmu_set_sbus64(hp->happy_sbus_dev,
1435 hp->happy_bursts);
1436 gcfg |= GREG_CFG_64BIT;
1437 }
1438
1439 HMD(("64>"));
1440 hme_write32(hp, &gregs->cfg, gcfg);
1441 } else
1442 #endif
1443 if(hp->happy_bursts & DMA_BURST32) {
1444 HMD(("32>"));
1445 hme_write32(hp, &gregs->cfg, GREG_CFG_BURST32);
1446 } else if(hp->happy_bursts & DMA_BURST16) {
1447 HMD(("16>"));
1448 hme_write32(hp, &gregs->cfg, GREG_CFG_BURST16);
1449 } else {
1450 HMD(("XXX>"));
1451 hme_write32(hp, &gregs->cfg, 0);
1452 }
1453
1454 /* Turn off interrupts we do not want to hear. */
1455 HMD((", enable global interrupts, "));
1456 hme_write32(hp, &gregs->imask,
1457 (GREG_IMASK_GOTFRAME | GREG_IMASK_RCNTEXP |
1458 GREG_IMASK_SENTFRAME | GREG_IMASK_TXPERR));
1459
1460 /* Set the transmit ring buffer size. */
1461 HMD(("tx rsize=%d oreg[%08x], ", (int)TX_RING_SIZE,
1462 hme_read32(hp, &etxregs->tx_rsize)));
1463 hme_write32(hp, &etxregs->tx_rsize, (TX_RING_SIZE >> ETX_RSIZE_SHIFT) - 1);
1464
1465 /* Enable transmitter DVMA. */
1466 HMD(("tx dma enable old[%08x], ",
1467 hme_read32(hp, &etxregs->cfg)));
1468 hme_write32(hp, &etxregs->cfg,
1469 hme_read32(hp, &etxregs->cfg) | ETX_CFG_DMAENABLE);
1470
1471 /* This chip really rots, for the receiver sometimes when you
1472 * write to it's control registers not all the bits get there
1473 * properly. I cannot think of a sane way to provide complete
1474 * coverage for this hardware bug yet.
1475 */
1476 HMD(("erx regs bug old[%08x]\n",
1477 hme_read32(hp, &erxregs->cfg)));
1478 hme_write32(hp, &erxregs->cfg, ERX_CFG_DEFAULT(RX_OFFSET));
1479 regtmp = hme_read32(hp, &erxregs->cfg);
1480 hme_write32(hp, &erxregs->cfg, ERX_CFG_DEFAULT(RX_OFFSET));
1481 if(hme_read32(hp, &erxregs->cfg) != ERX_CFG_DEFAULT(RX_OFFSET)) {
1482 printk("happy meal: Eieee, rx config register gets greasy fries.\n");
1483 printk("happy meal: Trying to set %08x, reread gives %08lx\n",
1484 ERX_CFG_DEFAULT(RX_OFFSET), regtmp);
1485 /* XXX Should return failure here... */
1486 }
1487
1488 /* Enable Big Mac hash table filter. */
1489 HMD(("happy_meal_init: enable hash rx_cfg_old[%08x], ",
1490 hme_read32(hp, &bregs->rx_cfg)));
1491 rxcfg = BIGMAC_RXCFG_HENABLE;
1492 if(hp->dev->flags & IFF_PROMISC)
1493 rxcfg |= BIGMAC_RXCFG_PMISC;
1494 hme_write32(hp, &bregs->rx_cfg, rxcfg);
1495
1496 /* Let the bits settle in the chip. */
1497 udelay(10);
1498
1499 /* Ok, configure the Big Mac transmitter. */
1500 HMD(("BIGMAC init, "));
1501 regtmp = 0;
1502 if(hp->happy_flags & HFLAG_FULL)
1503 regtmp |= BIGMAC_TXCFG_FULLDPLX;
1504 hme_write32(hp, &bregs->tx_cfg, regtmp | BIGMAC_TXCFG_DGIVEUP);
1505
1506 /* Enable the output drivers no matter what. */
1507 regtmp = BIGMAC_XCFG_ODENABLE;
1508
1509 /* If card can do lance mode, enable it. */
1510 if(hp->happy_flags & HFLAG_LANCE)
1511 regtmp |= (DEFAULT_IPG0 << 5) | BIGMAC_XCFG_LANCE;
1512
1513 /* Disable the MII buffers if using external transceiver. */
1514 if(hp->tcvr_type == external)
1515 regtmp |= BIGMAC_XCFG_MIIDISAB;
1516
1517 HMD(("XIF config old[%08x], ",
1518 hme_read32(hp, &bregs->xif_cfg)));
1519 hme_write32(hp, &bregs->xif_cfg, regtmp);
1520
1521 /* Start things up. */
1522 HMD(("tx old[%08x] and rx [%08x] ON!\n",
1523 hme_read32(hp, &bregs->tx_cfg),
1524 hme_read32(hp, &bregs->rx_cfg)));
1525 hme_write32(hp, &bregs->tx_cfg,
1526 hme_read32(hp, &bregs->tx_cfg) | BIGMAC_TXCFG_ENABLE);
1527 hme_write32(hp, &bregs->rx_cfg,
1528 hme_read32(hp, &bregs->rx_cfg) | BIGMAC_RXCFG_ENABLE);
1529
1530 /* Get the autonegotiation started, and the watch timer ticking. */
1531 happy_meal_begin_auto_negotiation(hp, tregs, NULL);
1532
1533 /* Success. */
1534 return 0;
1535 }
1536
1537 static void happy_meal_set_initial_advertisement(struct happy_meal *hp)
1538 {
1539 struct hmeal_tcvregs *tregs = hp->tcvregs;
1540 struct hmeal_bigmacregs *bregs = hp->bigmacregs;
1541 struct hmeal_gregs *gregs = hp->gregs;
1542
1543 happy_meal_stop(hp, gregs);
1544 hme_write32(hp, &tregs->int_mask, 0xffff);
1545 if(hp->happy_flags & HFLAG_FENABLE)
1546 hme_write32(hp, &tregs->cfg,
1547 hme_read32(hp, &tregs->cfg) & ~(TCV_CFG_BENABLE));
1548 else
1549 hme_write32(hp, &tregs->cfg,
1550 hme_read32(hp, &tregs->cfg) | TCV_CFG_BENABLE);
1551 happy_meal_transceiver_check(hp, tregs);
1552 switch(hp->tcvr_type) {
1553 case none:
1554 return;
1555 case internal:
1556 hme_write32(hp, &bregs->xif_cfg, 0);
1557 break;
1558 case external:
1559 hme_write32(hp, &bregs->xif_cfg, BIGMAC_XCFG_MIIDISAB);
1560 break;
1561 };
1562 if(happy_meal_tcvr_reset(hp, tregs))
1563 return;
1564
1565 /* Latch PHY registers as of now. */
1566 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, DP83840_BMSR);
1567 hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, DP83840_ADVERTISE);
1568
1569 /* Advertise everything we can support. */
1570 if(hp->sw_bmsr & BMSR_10HALF)
1571 hp->sw_advertise |= (ADVERTISE_10HALF);
1572 else
1573 hp->sw_advertise &= ~(ADVERTISE_10HALF);
1574
1575 if(hp->sw_bmsr & BMSR_10FULL)
1576 hp->sw_advertise |= (ADVERTISE_10FULL);
1577 else
1578 hp->sw_advertise &= ~(ADVERTISE_10FULL);
1579 if(hp->sw_bmsr & BMSR_100HALF)
1580 hp->sw_advertise |= (ADVERTISE_100HALF);
1581 else
1582 hp->sw_advertise &= ~(ADVERTISE_100HALF);
1583 if(hp->sw_bmsr & BMSR_100FULL)
1584 hp->sw_advertise |= (ADVERTISE_100FULL);
1585 else
1586 hp->sw_advertise &= ~(ADVERTISE_100FULL);
1587
1588 /* Update the PHY advertisement register. */
1589 happy_meal_tcvr_write(hp, tregs, DP83840_ADVERTISE, hp->sw_advertise);
1590 }
1591
1592 /* Once status is latched (by happy_meal_interrupt) it is cleared by
1593 * the hardware, so we cannot re-read it and get a correct value.
1594 */
1595 static int happy_meal_is_not_so_happy(struct happy_meal *hp,
1596 struct hmeal_gregs *gregs,
1597 unsigned long status)
1598 {
1599 int reset = 0;
1600
1601 /* Only print messages for non-counter related interrupts. */
1602 if(status & (GREG_STAT_STSTERR | GREG_STAT_TFIFO_UND |
1603 GREG_STAT_MAXPKTERR | GREG_STAT_RXERR |
1604 GREG_STAT_RXPERR | GREG_STAT_RXTERR | GREG_STAT_EOPERR |
1605 GREG_STAT_MIFIRQ | GREG_STAT_TXEACK | GREG_STAT_TXLERR |
1606 GREG_STAT_TXPERR | GREG_STAT_TXTERR | GREG_STAT_SLVERR |
1607 GREG_STAT_SLVPERR))
1608 printk("%s: Error interrupt for happy meal, status = %08lx\n",
1609 hp->dev->name, status);
1610
1611 if(status & GREG_STAT_RFIFOVF) {
1612 /* Receive FIFO overflow is harmless and the hardware will take
1613 care of it, just some packets are lost. Who cares. */
1614 printk(KERN_DEBUG "%s: Happy Meal receive FIFO overflow.\n", hp->dev->name);
1615 }
1616
1617 if(status & GREG_STAT_STSTERR) {
1618 /* BigMAC SQE link test failed. */
1619 printk("%s: Happy Meal BigMAC SQE test failed.\n", hp->dev->name);
1620 reset = 1;
1621 }
1622
1623 if(status & GREG_STAT_TFIFO_UND) {
1624 /* Transmit FIFO underrun, again DMA error likely. */
1625 printk("%s: Happy Meal transmitter FIFO underrun, DMA error.\n",
1626 hp->dev->name);
1627 reset = 1;
1628 }
1629
1630 if(status & GREG_STAT_MAXPKTERR) {
1631 /* Driver error, tried to transmit something larger
1632 * than ethernet max mtu.
1633 */
1634 printk("%s: Happy Meal MAX Packet size error.\n", hp->dev->name);
1635 reset = 1;
1636 }
1637
1638 if(status & GREG_STAT_NORXD) {
1639 /* This is harmless, it just means the system is
1640 * quite loaded and the incomming packet rate was
1641 * faster than the interrupt handler could keep up
1642 * with.
1643 */
1644 printk(KERN_INFO "%s: Happy Meal out of receive "
1645 "descriptors, packet dropped.\n",
1646 hp->dev->name);
1647 }
1648
1649 if(status & (GREG_STAT_RXERR|GREG_STAT_RXPERR|GREG_STAT_RXTERR)) {
1650 /* All sorts of DMA receive errors. */
1651 printk("%s: Happy Meal rx DMA errors [ ", hp->dev->name);
1652 if(status & GREG_STAT_RXERR)
1653 printk("GenericError ");
1654 if(status & GREG_STAT_RXPERR)
1655 printk("ParityError ");
1656 if(status & GREG_STAT_RXTERR)
1657 printk("RxTagBotch ");
1658 printk("]\n");
1659 reset = 1;
1660 }
1661
1662 if(status & GREG_STAT_EOPERR) {
1663 /* Driver bug, didn't set EOP bit in tx descriptor given
1664 * to the happy meal.
1665 */
1666 printk("%s: EOP not set in happy meal transmit descriptor!\n",
1667 hp->dev->name);
1668 reset = 1;
1669 }
1670
1671 if(status & GREG_STAT_MIFIRQ) {
1672 /* MIF signalled an interrupt, were we polling it? */
1673 printk("%s: Happy Meal MIF interrupt.\n", hp->dev->name);
1674 }
1675
1676 if(status &
1677 (GREG_STAT_TXEACK|GREG_STAT_TXLERR|GREG_STAT_TXPERR|GREG_STAT_TXTERR)) {
1678 /* All sorts of transmit DMA errors. */
1679 printk("%s: Happy Meal tx DMA errors [ ", hp->dev->name);
1680 if(status & GREG_STAT_TXEACK)
1681 printk("GenericError ");
1682 if(status & GREG_STAT_TXLERR)
1683 printk("LateError ");
1684 if(status & GREG_STAT_TXPERR)
1685 printk("ParityErro ");
1686 if(status & GREG_STAT_TXTERR)
1687 printk("TagBotch ");
1688 printk("]\n");
1689 reset = 1;
1690 }
1691
1692 if(status & (GREG_STAT_SLVERR|GREG_STAT_SLVPERR)) {
1693 /* Bus or parity error when cpu accessed happy meal registers
1694 * or it's internal FIFO's. Should never see this.
1695 */
1696 printk("%s: Happy Meal register access SBUS slave (%s) error.\n",
1697 hp->dev->name,
1698 (status & GREG_STAT_SLVPERR) ? "parity" : "generic");
1699 reset = 1;
1700 }
1701
1702 if(reset) {
1703 printk("%s: Resetting...\n", hp->dev->name);
1704 happy_meal_init(hp, 1);
1705 return 1;
1706 }
1707 return 0;
1708 }
1709
1710 static inline void happy_meal_mif_interrupt(struct happy_meal *hp,
1711 struct hmeal_gregs *gregs,
1712 struct hmeal_tcvregs *tregs)
1713 {
1714 printk("%s: Link status change.\n", hp->dev->name);
1715 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, DP83840_BMCR);
1716 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, DP83840_LPA);
1717
1718 /* Use the fastest transmission protocol possible. */
1719 if(hp->sw_lpa & LPA_100FULL) {
1720 printk("%s: Switching to 100Mbps at full duplex.", hp->dev->name);
1721 hp->sw_bmcr |= (BMCR_FULLDPLX | BMCR_SPEED100);
1722 } else if(hp->sw_lpa & LPA_100HALF) {
1723 printk("%s: Switching to 100MBps at half duplex.", hp->dev->name);
1724 hp->sw_bmcr |= BMCR_SPEED100;
1725 } else if(hp->sw_lpa & LPA_10FULL) {
1726 printk("%s: Switching to 10MBps at full duplex.", hp->dev->name);
1727 hp->sw_bmcr |= BMCR_FULLDPLX;
1728 } else {
1729 printk("%s: Using 10Mbps at half duplex.", hp->dev->name);
1730 }
1731 happy_meal_tcvr_write(hp, tregs, DP83840_BMCR, hp->sw_bmcr);
1732
1733 /* Finally stop polling and shut up the MIF. */
1734 happy_meal_poll_stop(hp, tregs);
1735 }
1736
1737 #ifdef TXDEBUG
1738 #define TXD(x) printk x
1739 #else
1740 #define TXD(x)
1741 #endif
1742
1743 static inline void happy_meal_tx(struct happy_meal *hp)
1744 {
1745 struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
1746 struct happy_meal_txd *this;
1747 int elem = hp->tx_old;
1748
1749 TXD(("TX<"));
1750 while(elem != hp->tx_new) {
1751 struct sk_buff *skb;
1752
1753 TXD(("[%d]", elem));
1754 this = &txbase[elem];
1755 if(this->tx_flags & TXFLAG_OWN)
1756 break;
1757 skb = hp->tx_skbs[elem];
1758 hp->tx_skbs[elem] = NULL;
1759 hp->net_stats.tx_bytes+=skb->len;
1760
1761 dev_kfree_skb(skb);
1762
1763 hp->net_stats.tx_packets++;
1764 elem = NEXT_TX(elem);
1765 }
1766 hp->tx_old = elem;
1767 TXD((">"));
1768 }
1769
1770 #ifdef CONFIG_PCI
1771 static inline void pci_happy_meal_tx(struct happy_meal *hp)
1772 {
1773 struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
1774 struct happy_meal_txd *this;
1775 int elem = hp->tx_old;
1776
1777 TXD(("TX<"));
1778 while(elem != hp->tx_new) {
1779 struct sk_buff *skb;
1780 unsigned int flags;
1781
1782 TXD(("[%d]", elem));
1783 this = &txbase[elem];
1784 #ifdef __sparc_v9__
1785 __asm__ __volatile__("lduwa [%1] %2, %0"
1786 : "=r" (flags)
1787 : "r" (&this->tx_flags), "i" (ASI_PL));
1788 #else
1789 flags = flip_dword(this->tx_flags);
1790 #endif
1791 if(flags & TXFLAG_OWN)
1792 break;
1793 skb = hp->tx_skbs[elem];
1794 hp->tx_skbs[elem] = NULL;
1795 hp->net_stats.tx_bytes+=skb->len;
1796
1797 dev_kfree_skb(skb);
1798
1799 hp->net_stats.tx_packets++;
1800 elem = NEXT_TX(elem);
1801 }
1802 hp->tx_old = elem;
1803 TXD((">"));
1804 }
1805 #endif
1806
1807 #ifndef __sparc_v9__
1808 static inline void sun4c_happy_meal_tx(struct happy_meal *hp)
1809 {
1810 struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
1811 struct happy_meal_txd *this;
1812 int elem = hp->tx_old;
1813
1814 TXD(("TX<"));
1815 while(elem != hp->tx_new) {
1816 TXD(("[%d]", elem));
1817
1818 this = &txbase[elem];
1819
1820 if(this->tx_flags & TXFLAG_OWN)
1821 break;
1822
1823 hp->net_stats.tx_packets++;
1824 elem = NEXT_TX(elem);
1825 }
1826 hp->tx_old = elem;
1827 TXD((">"));
1828 }
1829 #endif
1830
1831 #ifdef RXDEBUG
1832 #define RXD(x) printk x
1833 #else
1834 #define RXD(x)
1835 #endif
1836
1837 /* Originally I used to handle the allocation failure by just giving back just
1838 * that one ring buffer to the happy meal. Problem is that usually when that
1839 * condition is triggered, the happy meal expects you to do something reasonable
1840 * with all of the packets it has DMA'd in. So now I just drop the entire
1841 * ring when we cannot get a new skb and give them all back to the happy meal,
1842 * maybe things will be "happier" now.
1843 */
1844 static inline void happy_meal_rx(struct happy_meal *hp, struct net_device *dev,
1845 struct hmeal_gregs *gregs)
1846 {
1847 struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
1848 struct happy_meal_rxd *this;
1849 int elem = hp->rx_new, drops = 0;
1850
1851 RXD(("RX<"));
1852 this = &rxbase[elem];
1853 while(!(this->rx_flags & RXFLAG_OWN)) {
1854 struct sk_buff *skb;
1855 unsigned int flags = this->rx_flags;
1856 int len = flags >> 16;
1857 u16 csum = flags & RXFLAG_CSUM;
1858
1859 RXD(("[%d ", elem));
1860
1861 /* Check for errors. */
1862 if((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
1863 RXD(("ERR(%08x)]", flags));
1864 hp->net_stats.rx_errors++;
1865 if(len < ETH_ZLEN)
1866 hp->net_stats.rx_length_errors++;
1867 if(len & (RXFLAG_OVERFLOW >> 16)) {
1868 hp->net_stats.rx_over_errors++;
1869 hp->net_stats.rx_fifo_errors++;
1870 }
1871
1872 /* Return it to the Happy meal. */
1873 drop_it:
1874 hp->net_stats.rx_dropped++;
1875 this->rx_addr = kva_to_hva(hp, hp->rx_skbs[elem]->data);
1876 this->rx_flags =
1877 (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16));
1878 goto next;
1879 }
1880 skb = hp->rx_skbs[elem];
1881 #ifdef NEED_DMA_SYNCHRONIZATION
1882 mmu_sync_dma(kva_to_hva(hp, skb->data),
1883 skb->len, hp->happy_sbus_dev->my_bus);
1884 #endif
1885 if(len > RX_COPY_THRESHOLD) {
1886 struct sk_buff *new_skb;
1887
1888 /* Now refill the entry, if we can. */
1889 new_skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE,
1890 (GFP_DMA|GFP_ATOMIC));
1891 if(!new_skb) {
1892 drops++;
1893 goto drop_it;
1894 }
1895
1896 hp->rx_skbs[elem] = new_skb;
1897 new_skb->dev = dev;
1898 skb_put(new_skb, (ETH_FRAME_LEN + RX_OFFSET));
1899 rxbase[elem].rx_addr = kva_to_hva(hp, new_skb->data);
1900 skb_reserve(new_skb, RX_OFFSET);
1901 rxbase[elem].rx_flags =
1902 (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16));
1903
1904 /* Trim the original skb for the netif. */
1905 skb_trim(skb, len);
1906 } else {
1907 struct sk_buff *copy_skb = dev_alloc_skb(len + 2);
1908
1909 if(!copy_skb) {
1910 drops++;
1911 goto drop_it;
1912 }
1913
1914 copy_skb->dev = dev;
1915 skb_reserve(copy_skb, 2);
1916 skb_put(copy_skb, len);
1917 memcpy(copy_skb->data, skb->data, len);
1918
1919 /* Reuse original ring buffer. */
1920 rxbase[elem].rx_addr = kva_to_hva(hp, skb->data);
1921 rxbase[elem].rx_flags =
1922 (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16));
1923
1924 skb = copy_skb;
1925 }
1926
1927 /* This card is _fucking_ hot... */
1928 if(!(csum ^ 0xffff))
1929 skb->ip_summed = CHECKSUM_UNNECESSARY;
1930 else
1931 skb->ip_summed = CHECKSUM_NONE;
1932
1933 RXD(("len=%d csum=%4x]", len, csum));
1934 skb->protocol = eth_type_trans(skb, dev);
1935 netif_rx(skb);
1936
1937 hp->net_stats.rx_packets++;
1938 hp->net_stats.rx_bytes+=len;
1939 next:
1940 elem = NEXT_RX(elem);
1941 this = &rxbase[elem];
1942 }
1943 hp->rx_new = elem;
1944 if(drops)
1945 printk("%s: Memory squeeze, deferring packet.\n", hp->dev->name);
1946 RXD((">"));
1947 }
1948
1949 #ifdef CONFIG_PCI
1950 static inline void pci_happy_meal_rx(struct happy_meal *hp, struct net_device *dev,
1951 struct hmeal_gregs *gregs)
1952 {
1953 struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
1954 struct happy_meal_rxd *this;
1955 unsigned int flags;
1956 int elem = hp->rx_new, drops = 0;
1957
1958 RXD(("RX<"));
1959 this = &rxbase[elem];
1960 #ifdef __sparc_v9__
1961 __asm__ __volatile__("lduwa [%1] %2, %0"
1962 : "=r" (flags)
1963 : "r" (&this->rx_flags), "i" (ASI_PL));
1964 #else
1965 flags = flip_dword(this->rx_flags); /* FIXME */
1966 #endif
1967 while(!(flags & RXFLAG_OWN)) {
1968 struct sk_buff *skb;
1969 int len;
1970 u16 csum;
1971
1972 RXD(("[%d ", elem));
1973
1974 len = flags >> 16;
1975 csum = flags & RXFLAG_CSUM;
1976
1977 /* Check for errors. */
1978 if((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
1979 RXD(("ERR(%08x)]", flags));
1980 hp->net_stats.rx_errors++;
1981 if(len < ETH_ZLEN)
1982 hp->net_stats.rx_length_errors++;
1983 if(len & (RXFLAG_OVERFLOW >> 16)) {
1984 hp->net_stats.rx_over_errors++;
1985 hp->net_stats.rx_fifo_errors++;
1986 }
1987
1988 /* Return it to the Happy meal. */
1989 drop_it:
1990 hp->net_stats.rx_dropped++;
1991 pcihme_write_rxd(this,
1992 (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
1993 (u32) virt_to_bus((volatile void *)hp->rx_skbs[elem]->data));
1994 goto next;
1995 }
1996 skb = hp->rx_skbs[elem];
1997 if(len > RX_COPY_THRESHOLD) {
1998 struct sk_buff *new_skb;
1999
2000 /* Now refill the entry, if we can. */
2001 new_skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE,
2002 (GFP_DMA|GFP_ATOMIC));
2003 if(!new_skb) {
2004 drops++;
2005 goto drop_it;
2006 }
2007
2008 hp->rx_skbs[elem] = new_skb;
2009 new_skb->dev = dev;
2010 skb_put(new_skb, (ETH_FRAME_LEN + RX_OFFSET));
2011 pcihme_write_rxd(&rxbase[elem],
2012 (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2013 (u32)virt_to_bus((volatile void *)new_skb->data));
2014 skb_reserve(new_skb, RX_OFFSET);
2015
2016 /* Trim the original skb for the netif. */
2017 skb_trim(skb, len);
2018 } else {
2019 struct sk_buff *copy_skb = dev_alloc_skb(len + 2);
2020
2021 if(!copy_skb) {
2022 drops++;
2023 goto drop_it;
2024 }
2025
2026 copy_skb->dev = dev;
2027 skb_reserve(copy_skb, 2);
2028 skb_put(copy_skb, len);
2029 memcpy(copy_skb->data, skb->data, len);
2030
2031 /* Reuse original ring buffer. */
2032 pcihme_write_rxd(&rxbase[elem],
2033 (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2034 (u32)virt_to_bus((volatile void *)skb->data));
2035
2036 skb = copy_skb;
2037 }
2038
2039 /* This card is _fucking_ hot... */
2040 if(!~(csum))
2041 skb->ip_summed = CHECKSUM_UNNECESSARY;
2042 else
2043 skb->ip_summed = CHECKSUM_NONE;
2044
2045 RXD(("len=%d csum=%4x]", len, csum));
2046 skb->protocol = eth_type_trans(skb, dev);
2047 netif_rx(skb);
2048
2049 hp->net_stats.rx_packets++;
2050 hp->net_stats.rx_bytes+=len;
2051 next:
2052 elem = NEXT_RX(elem);
2053 this = &rxbase[elem];
2054 #ifdef __sparc_v9__
2055 __asm__ __volatile__("lduwa [%1] %2, %0"
2056 : "=r" (flags)
2057 : "r" (&this->rx_flags), "i" (ASI_PL));
2058 #else
2059 flags = flip_dword(this->rx_flags); /* FIXME */
2060 #endif
2061 }
2062 hp->rx_new = elem;
2063 if(drops)
2064 printk("%s: Memory squeeze, deferring packet.\n", hp->dev->name);
2065 RXD((">"));
2066 }
2067 #endif
2068
2069 #ifndef __sparc_v9__
2070 static inline void sun4c_happy_meal_rx(struct happy_meal *hp, struct net_device *dev,
2071 struct hmeal_gregs *gregs)
2072 {
2073 struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
2074 struct happy_meal_rxd *this;
2075 struct hmeal_buffers *hbufs = hp->sun4c_buffers;
2076 __u32 hbufs_dvma = hp->s4c_buf_dvma;
2077 int elem = hp->rx_new, drops = 0;
2078
2079 RXD(("RX<"));
2080 this = &rxbase[elem];
2081 while(!(this->rx_flags & RXFLAG_OWN)) {
2082 struct sk_buff *skb;
2083 unsigned int flags = this->rx_flags;
2084 unsigned char *thisbuf = &hbufs->rx_buf[elem][0];
2085 __u32 thisbuf_dvma = hbufs_dvma + hbuf_offset(rx_buf, elem);
2086 int len = flags >> 16;
2087
2088 RXD(("[%d ", elem));
2089
2090 /* Check for errors. */
2091 if((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
2092 RXD(("ERR(%08x)]", flags));
2093 hp->net_stats.rx_errors++;
2094 if(len < ETH_ZLEN)
2095 hp->net_stats.rx_length_errors++;
2096 if(len & (RXFLAG_OVERFLOW >> 16)) {
2097 hp->net_stats.rx_over_errors++;
2098 hp->net_stats.rx_fifo_errors++;
2099 }
2100
2101 hp->net_stats.rx_dropped++;
2102 } else {
2103 skb = dev_alloc_skb(len + 2);
2104 if(skb == 0) {
2105 drops++;
2106 hp->net_stats.rx_dropped++;
2107 } else {
2108 RXD(("len=%d]", len));
2109 skb->dev = hp->dev;
2110 skb_reserve(skb, 2);
2111 skb_put(skb, len);
2112 eth_copy_and_sum(skb, (thisbuf+2), len, 0);
2113 skb->protocol = eth_type_trans(skb, dev);
2114 netif_rx(skb);
2115 hp->net_stats.rx_packets++;
2116 hp->net_stats.rx_bytes+=len;
2117 }
2118 }
2119 /* Return the buffer to the Happy Meal. */
2120 this->rx_addr = thisbuf_dvma;
2121 this->rx_flags =
2122 (RXFLAG_OWN | ((SUN4C_RX_BUFF_SIZE - RX_OFFSET) << 16));
2123
2124 elem = NEXT_RX(elem);
2125 this = &rxbase[elem];
2126 }
2127 hp->rx_new = elem;
2128 if(drops)
2129 printk("%s: Memory squeeze, deferring packet.\n", hp->dev->name);
2130 RXD((">"));
2131 }
2132
2133 static inline void sun4d_happy_meal_rx(struct happy_meal *hp, struct net_device *dev,
2134 struct hmeal_gregs *gregs)
2135 {
2136 struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
2137 struct happy_meal_rxd *this;
2138 int elem = hp->rx_new, drops = 0;
2139 __u32 va;
2140
2141 RXD(("RX<"));
2142 this = &rxbase[elem];
2143 while(!(this->rx_flags & RXFLAG_OWN)) {
2144 struct sk_buff *skb;
2145 unsigned int flags = this->rx_flags;
2146 int len = flags >> 16;
2147 u16 csum = flags & RXFLAG_CSUM;
2148
2149 RXD(("[%d ", elem));
2150
2151 /* Check for errors. */
2152 if((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
2153 RXD(("ERR(%08x)]", flags));
2154 hp->net_stats.rx_errors++;
2155 if(len < ETH_ZLEN)
2156 hp->net_stats.rx_length_errors++;
2157 if(len & (RXFLAG_OVERFLOW >> 16)) {
2158 hp->net_stats.rx_over_errors++;
2159 hp->net_stats.rx_fifo_errors++;
2160 }
2161
2162 /* Return it to the Happy meal. */
2163 drop_it:
2164 hp->net_stats.rx_dropped++;
2165 va = (__u32)hp->sun4d_buffers + elem * PAGE_SIZE;
2166 this->rx_addr = iounit_map_dma_page(va, hp->rx_skbs[elem]->data,
2167 hp->happy_sbus_dev->my_bus);
2168 this->rx_flags =
2169 (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16));
2170 goto next;
2171 }
2172 skb = hp->rx_skbs[elem];
2173 if(len > RX_COPY_THRESHOLD) {
2174 struct sk_buff *new_skb;
2175
2176 /* Now refill the entry, if we can. */
2177 new_skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE,
2178 (GFP_DMA | GFP_ATOMIC));
2179 if(!new_skb) {
2180 drops++;
2181 goto drop_it;
2182 }
2183
2184 hp->rx_skbs[elem] = new_skb;
2185 new_skb->dev = dev;
2186 skb_put(new_skb, (ETH_FRAME_LEN + RX_OFFSET));
2187 va = (__u32)hp->sun4d_buffers + elem * PAGE_SIZE;
2188 rxbase[elem].rx_addr = iounit_map_dma_page(va, new_skb->data,
2189 hp->happy_sbus_dev->my_bus);
2190
2191 skb_reserve(new_skb, RX_OFFSET);
2192 rxbase[elem].rx_flags =
2193 (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16));
2194
2195 /* Trim the original skb for the netif. */
2196 skb_trim(skb, len);
2197 } else {
2198 struct sk_buff *copy_skb = dev_alloc_skb(len + 2);
2199
2200 if(!copy_skb) {
2201 drops++;
2202 goto drop_it;
2203 }
2204
2205 copy_skb->dev = dev;
2206 skb_reserve(copy_skb, 2);
2207 skb_put(copy_skb, len);
2208 memcpy(copy_skb->data, skb->data, len);
2209
2210 /* Reuse original ring buffer. */
2211 va = (__u32)hp->sun4d_buffers + elem * PAGE_SIZE;
2212 rxbase[elem].rx_addr = iounit_map_dma_page(va, skb->data,
2213 hp->happy_sbus_dev->my_bus);
2214 rxbase[elem].rx_flags =
2215 (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16));
2216
2217 skb = copy_skb;
2218 }
2219
2220 /* This card is _fucking_ hot... */
2221 if(!(csum ^ 0xffff))
2222 skb->ip_summed = CHECKSUM_UNNECESSARY;
2223 else
2224 skb->ip_summed = CHECKSUM_NONE;
2225
2226 RXD(("len=%d csum=%4x]", len, csum));
2227 skb->protocol = eth_type_trans(skb, dev);
2228 netif_rx(skb);
2229
2230 hp->net_stats.rx_packets++;
2231 hp->net_stats.rx_bytes+=len;
2232 next:
2233 elem = NEXT_RX(elem);
2234 this = &rxbase[elem];
2235 }
2236 hp->rx_new = elem;
2237 if(drops)
2238 printk("%s: Memory squeeze, deferring packet.\n", hp->dev->name);
2239 RXD((">"));
2240 }
2241 #endif
2242
2243 static void happy_meal_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2244 {
2245 struct net_device *dev = (struct net_device *) dev_id;
2246 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2247 struct hmeal_gregs *gregs = hp->gregs;
2248 struct hmeal_tcvregs *tregs = hp->tcvregs;
2249 unsigned int happy_status = hme_read32(hp, &gregs->stat);
2250
2251 HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2252
2253 dev->interrupt = 1;
2254
2255 if(happy_status & GREG_STAT_ERRORS) {
2256 HMD(("ERRORS "));
2257 if(happy_meal_is_not_so_happy(hp, gregs, /* un- */ happy_status)) {
2258 dev->interrupt = 0;
2259 return;
2260 }
2261 }
2262
2263 if(happy_status & GREG_STAT_MIFIRQ) {
2264 HMD(("MIFIRQ "));
2265 happy_meal_mif_interrupt(hp, gregs, tregs);
2266 }
2267
2268 if(happy_status & GREG_STAT_TXALL) {
2269 HMD(("TXALL "));
2270 happy_meal_tx(hp);
2271 }
2272
2273 if(happy_status & GREG_STAT_RXTOHOST) {
2274 HMD(("RXTOHOST "));
2275 happy_meal_rx(hp, dev, gregs);
2276 }
2277
2278 if(dev->tbusy && (TX_BUFFS_AVAIL(hp) >= 0)) {
2279 hp->dev->tbusy = 0;
2280 mark_bh(NET_BH);
2281 }
2282
2283 dev->interrupt = 0;
2284 HMD(("done\n"));
2285 }
2286
2287 #ifdef CONFIG_PCI
2288 static void pci_happy_meal_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2289 {
2290 struct net_device *dev = (struct net_device *) dev_id;
2291 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2292 struct hmeal_gregs *gregs = hp->gregs;
2293 struct hmeal_tcvregs *tregs = hp->tcvregs;
2294 unsigned int happy_status = readl((unsigned long)&gregs->stat);
2295
2296 HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2297
2298 dev->interrupt = 1;
2299
2300 if(happy_status & GREG_STAT_ERRORS) {
2301 HMD(("ERRORS "));
2302 if(happy_meal_is_not_so_happy(hp, gregs, /* un- */ happy_status)) {
2303 dev->interrupt = 0;
2304 return;
2305 }
2306 }
2307
2308 if(happy_status & GREG_STAT_MIFIRQ) {
2309 HMD(("MIFIRQ "));
2310 happy_meal_mif_interrupt(hp, gregs, tregs);
2311 }
2312
2313 if(happy_status & GREG_STAT_TXALL) {
2314 HMD(("TXALL "));
2315 pci_happy_meal_tx(hp);
2316 }
2317
2318 if(happy_status & GREG_STAT_RXTOHOST) {
2319 HMD(("RXTOHOST "));
2320 pci_happy_meal_rx(hp, dev, gregs);
2321 }
2322
2323 if(dev->tbusy && (TX_BUFFS_AVAIL(hp) >= 0)) {
2324 hp->dev->tbusy = 0;
2325 mark_bh(NET_BH);
2326 }
2327 tx_add_log(hp, TXLOG_ACTION_IRQ, happy_status);
2328 dev->interrupt = 0;
2329 HMD(("done\n"));
2330 }
2331 #endif
2332
2333 #ifndef __sparc_v9__
2334 static void sun4c_happy_meal_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2335 {
2336 struct net_device *dev = (struct net_device *) dev_id;
2337 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2338 struct hmeal_gregs *gregs = hp->gregs;
2339 struct hmeal_tcvregs *tregs = hp->tcvregs;
2340 unsigned int happy_status = hme_read32(hp, &gregs->stat);
2341
2342 HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2343
2344 dev->interrupt = 1;
2345
2346 if(happy_status & GREG_STAT_ERRORS) {
2347 HMD(("ERRORS "));
2348 if(happy_meal_is_not_so_happy(hp, gregs, /* un- */ happy_status)) {
2349 dev->interrupt = 0;
2350 return;
2351 }
2352 }
2353
2354 if(happy_status & GREG_STAT_MIFIRQ) {
2355 HMD(("MIFIRQ "));
2356 happy_meal_mif_interrupt(hp, gregs, tregs);
2357 }
2358
2359 if(happy_status & GREG_STAT_TXALL) {
2360 HMD(("TXALL "));
2361 sun4c_happy_meal_tx(hp);
2362 }
2363
2364 if(happy_status & GREG_STAT_RXTOHOST) {
2365 HMD(("RXTOHOST "));
2366 sun4c_happy_meal_rx(hp, dev, gregs);
2367 }
2368
2369 if(dev->tbusy && (TX_BUFFS_AVAIL(hp) >= 0)) {
2370 hp->dev->tbusy = 0;
2371 mark_bh(NET_BH);
2372 }
2373
2374 dev->interrupt = 0;
2375 HMD(("done\n"));
2376 }
2377
2378 static void sun4d_happy_meal_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2379 {
2380 struct net_device *dev = (struct net_device *) dev_id;
2381 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2382 struct hmeal_gregs *gregs = hp->gregs;
2383 struct hmeal_tcvregs *tregs = hp->tcvregs;
2384 unsigned int happy_status = hme_read32(hp, &gregs->stat);
2385
2386 HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2387
2388 dev->interrupt = 1;
2389
2390 if(happy_status & GREG_STAT_ERRORS) {
2391 HMD(("ERRORS "));
2392 if(happy_meal_is_not_so_happy(hp, gregs, /* un- */ happy_status)) {
2393 dev->interrupt = 0;
2394 return;
2395 }
2396 }
2397
2398 if(happy_status & GREG_STAT_MIFIRQ) {
2399 HMD(("MIFIRQ "));
2400 happy_meal_mif_interrupt(hp, gregs, tregs);
2401 }
2402
2403 if(happy_status & GREG_STAT_TXALL) {
2404 HMD(("TXALL "));
2405 happy_meal_tx(hp);
2406 }
2407
2408 if(happy_status & GREG_STAT_RXTOHOST) {
2409 HMD(("RXTOHOST "));
2410 sun4d_happy_meal_rx(hp, dev, gregs);
2411 }
2412
2413 if(dev->tbusy && (TX_BUFFS_AVAIL(hp) >= 0)) {
2414 hp->dev->tbusy = 0;
2415 mark_bh(NET_BH);
2416 }
2417
2418 dev->interrupt = 0;
2419 HMD(("done\n"));
2420 }
2421 #endif
2422
2423 static void quattro_sbus_interrupt(int irq, void *cookie, struct pt_regs *ptregs)
2424 {
2425 struct quattro *qp = (struct quattro *)cookie;
2426 int i;
2427
2428 for(i = 0; i < 4; i++) {
2429 struct net_device *dev = qp->happy_meals[i];
2430 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2431 struct hmeal_gregs *gregs = hp->gregs;
2432 struct hmeal_tcvregs *tregs = hp->tcvregs;
2433 unsigned int happy_status = hme_read32(hp, &gregs->stat);
2434
2435 HMD(("quattro_interrupt: status=%08x ",happy_status));
2436
2437 dev->interrupt=1;
2438
2439 if(happy_status & GREG_STAT_ERRORS) {
2440 HMD(("ERRORS "));
2441 if(happy_meal_is_not_so_happy(hp, gregs, happy_status)) {
2442 dev->interrupt=0;
2443 break;
2444 }
2445 }
2446
2447 if(happy_status & GREG_STAT_MIFIRQ) {
2448 HMD(("MIFIRQ "));
2449 happy_meal_mif_interrupt(hp, gregs, tregs);
2450 }
2451
2452 if(happy_status & GREG_STAT_TXALL) {
2453 HMD(("TXALL "));
2454 happy_meal_tx(hp);
2455 }
2456
2457 if(happy_status & GREG_STAT_RXTOHOST) {
2458 HMD(("RXTOHOST "));
2459 happy_meal_rx(hp, dev, gregs);
2460 }
2461
2462 if(dev->tbusy && (TX_BUFFS_AVAIL(hp) >= 0)) {
2463 hp->dev->tbusy = 0;
2464 mark_bh(NET_BH);
2465 }
2466 dev->interrupt=0;
2467 }
2468 HMD(("done\n"));
2469 }
2470
2471 static int happy_meal_open(struct net_device *dev)
2472 {
2473 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2474 int res;
2475
2476 HMD(("happy_meal_open: "));
2477
2478 /* On SBUS Quattro QFE cards, all hme interrupts are concentrated
2479 * into a single source which we register handling at probe time.
2480 */
2481 if((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) == HFLAG_QUATTRO) {
2482 hp->qfe_parent->irq_status[hp->qfe_ent] = &hp->gregs->stat;
2483 goto after_request_irq;
2484 }
2485 #ifndef __sparc_v9__
2486 if(sparc_cpu_model == sun4c) {
2487 if(request_irq(dev->irq, &sun4c_happy_meal_interrupt,
2488 SA_SHIRQ, "HAPPY MEAL", (void *) dev)) {
2489 HMD(("EAGAIN\n"));
2490 printk("happy meal: Can't order irq %d to go.\n", dev->irq);
2491 return -EAGAIN;
2492 }
2493 } else if (sparc_cpu_model == sun4d) {
2494 if(request_irq(dev->irq, &sun4d_happy_meal_interrupt,
2495 SA_SHIRQ, "HAPPY MEAL", (void *) dev)) {
2496 HMD(("EAGAIN\n"));
2497 printk("happy_meal(SBUS): Can't order irq %s to go.\n",
2498 __irq_itoa(dev->irq));
2499 return -EAGAIN;
2500 }
2501 } else
2502 #endif
2503 #ifdef CONFIG_PCI
2504 if(hp->happy_flags & HFLAG_PCI) {
2505 if(request_irq(dev->irq, &pci_happy_meal_interrupt,
2506 SA_SHIRQ, "HAPPY MEAL (PCI)", dev)) {
2507 HMD(("EAGAIN\n"));
2508 printk("happy_meal(PCI: Can't order irq %s to go.\n",
2509 __irq_itoa(dev->irq));
2510 return -EAGAIN;
2511 }
2512 } else
2513 #endif
2514 if(request_irq(dev->irq, &happy_meal_interrupt,
2515 SA_SHIRQ, "HAPPY MEAL", (void *)dev)) {
2516 HMD(("EAGAIN\n"));
2517 printk("happy_meal(SBUS): Can't order irq %s to go.\n",
2518 __irq_itoa(dev->irq));
2519 return -EAGAIN;
2520 }
2521
2522 after_request_irq:
2523 HMD(("to happy_meal_init\n"));
2524 res = happy_meal_init(hp, 0);
2525 if(!res) {
2526 MOD_INC_USE_COUNT;
2527 }
2528 return res;
2529 }
2530
2531 static int happy_meal_close(struct net_device *dev)
2532 {
2533 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2534
2535 happy_meal_stop(hp, hp->gregs);
2536 happy_meal_clean_rings(hp);
2537
2538 /* If auto-negotiation timer is running, kill it. */
2539 del_timer(&hp->happy_timer);
2540
2541 /* On Quattro QFE cards, all hme interrupts are concentrated
2542 * into a single source which we register handling at probe
2543 * time and never unregister.
2544 */
2545 if((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {
2546 free_irq(dev->irq, (void *)dev);
2547 } else {
2548 /* Zap the status register pointer. */
2549 hp->qfe_parent->irq_status[hp->qfe_ent] = NULL;
2550 }
2551
2552 MOD_DEC_USE_COUNT;
2553 return 0;
2554 }
2555
2556 #ifdef SXDEBUG
2557 #define SXD(x) printk x
2558 #else
2559 #define SXD(x)
2560 #endif
2561
2562 static int happy_meal_start_xmit(struct sk_buff *skb, struct net_device *dev)
2563 {
2564 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2565 int len, entry;
2566
2567 if(test_and_set_bit(0, (void *) &dev->tbusy) != 0) {
2568 int tickssofar = jiffies - dev->trans_start;
2569
2570 if (tickssofar >= 40) {
2571 printk ("%s: transmit timed out, resetting\n", dev->name);
2572 hp->net_stats.tx_errors++;
2573 tx_dump_log();
2574 printk ("%s: Happy Status %08x TX[%08x:%08x]\n", dev->name,
2575 hme_read32(hp, &hp->gregs->stat),
2576 hme_read32(hp, &hp->etxregs->cfg),
2577 hme_read32(hp, &hp->bigmacregs->tx_cfg));
2578 happy_meal_init(hp, 0);
2579 dev->tbusy = 0;
2580 dev->trans_start = jiffies;
2581 } else
2582 tx_add_log(hp, TXLOG_ACTION_TXMIT|TXLOG_ACTION_TBUSY, 0);
2583 return 1;
2584 }
2585
2586 if(!TX_BUFFS_AVAIL(hp)) {
2587 tx_add_log(hp, TXLOG_ACTION_TXMIT|TXLOG_ACTION_NBUFS, 0);
2588 return 1;
2589 }
2590 #ifdef __sparc_v9__
2591 if ((unsigned long)(skb->data + skb->len) >= MAX_DMA_ADDRESS) {
2592 struct sk_buff *new_skb = skb_copy(skb, GFP_DMA | GFP_ATOMIC);
2593 if (!new_skb)
2594 return 1;
2595 dev_kfree_skb(skb);
2596 skb = new_skb;
2597 }
2598 #endif
2599 len = skb->len;
2600 entry = hp->tx_new;
2601
2602 SXD(("SX<l[%d]e[%d]>", len, entry));
2603 #ifdef NEED_DMA_SYNCHRONIZATION
2604 mmu_sync_dma(kva_to_hva(hp, skb->data),
2605 skb->len, hp->happy_sbus_dev->my_bus);
2606 #endif
2607 hp->tx_skbs[entry] = skb;
2608 hp->happy_block->happy_meal_txd[entry].tx_addr = kva_to_hva(hp, skb->data);
2609 hp->happy_block->happy_meal_txd[entry].tx_flags =
2610 (TXFLAG_OWN | TXFLAG_SOP | TXFLAG_EOP | (len & TXFLAG_SIZE));
2611 hp->tx_new = NEXT_TX(entry);
2612
2613 /* Get it going. */
2614 dev->trans_start = jiffies;
2615 hme_write32(hp, &hp->etxregs->tx_pnding, ETX_TP_DMAWAKEUP);
2616
2617 if(TX_BUFFS_AVAIL(hp))
2618 dev->tbusy = 0;
2619
2620 tx_add_log(hp, TXLOG_ACTION_TXMIT, 0);
2621 return 0;
2622 }
2623
2624 #ifdef CONFIG_PCI
2625 static int pci_happy_meal_start_xmit(struct sk_buff *skb, struct net_device *dev)
2626 {
2627 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2628 int len, entry;
2629
2630 if(test_and_set_bit(0, (void *) &dev->tbusy) != 0) {
2631 int tickssofar = jiffies - dev->trans_start;
2632
2633 if (tickssofar >= 40) {
2634 unsigned long flags;
2635
2636 printk ("%s: transmit timed out, resetting\n", dev->name);
2637
2638 save_and_cli(flags);
2639 tx_dump_log();
2640 tx_dump_ring(hp);
2641 restore_flags(flags);
2642
2643 hp->net_stats.tx_errors++;
2644 happy_meal_init(hp, 0);
2645 dev->tbusy = 0;
2646 dev->trans_start = jiffies;
2647 } else
2648 tx_add_log(hp, TXLOG_ACTION_TXMIT|TXLOG_ACTION_TBUSY, 0);
2649 return 1;
2650 }
2651
2652 if(!TX_BUFFS_AVAIL(hp)) {
2653 tx_add_log(hp, TXLOG_ACTION_TXMIT|TXLOG_ACTION_NBUFS, 0);
2654 return 1;
2655 }
2656 len = skb->len;
2657 entry = hp->tx_new;
2658
2659 SXD(("SX<l[%d]e[%d]>", len, entry));
2660 hp->tx_skbs[entry] = skb;
2661 pcihme_write_txd(&hp->happy_block->happy_meal_txd[entry],
2662 (TXFLAG_OWN|TXFLAG_SOP|TXFLAG_EOP|(len & TXFLAG_SIZE)),
2663 (u32) virt_to_bus((volatile void *)skb->data));
2664 hp->tx_new = NEXT_TX(entry);
2665
2666 /* Get it going. */
2667 dev->trans_start = jiffies;
2668 writel(ETX_TP_DMAWAKEUP, (unsigned long)&hp->etxregs->tx_pnding);
2669
2670 if(TX_BUFFS_AVAIL(hp))
2671 dev->tbusy = 0;
2672
2673 tx_add_log(hp, TXLOG_ACTION_TXMIT, 0);
2674 return 0;
2675 }
2676 #endif
2677
2678 #ifndef __sparc_v9__
2679 static int sun4c_happy_meal_start_xmit(struct sk_buff *skb, struct net_device *dev)
2680 {
2681 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2682 struct hmeal_buffers *hbufs = hp->sun4c_buffers;
2683 __u32 txbuf_dvma, hbufs_dvma = hp->s4c_buf_dvma;
2684 unsigned char *txbuf;
2685 int len, entry;
2686
2687 if(dev->tbusy) {
2688 int tickssofar = jiffies - dev->trans_start;
2689
2690 if (tickssofar < 40) {
2691 return 1;
2692 } else {
2693 printk ("%s: transmit timed out, resetting\n", dev->name);
2694 hp->net_stats.tx_errors++;
2695 happy_meal_init(hp, 0);
2696 dev->tbusy = 0;
2697 dev->trans_start = jiffies;
2698 return 0;
2699 }
2700 }
2701
2702 if(test_and_set_bit(0, (void *) &dev->tbusy) != 0) {
2703 printk("happy meal: Transmitter access conflict.\n");
2704 return 1;
2705 }
2706
2707 if(!TX_BUFFS_AVAIL(hp))
2708 return 1;
2709
2710 len = skb->len;
2711 entry = hp->tx_new;
2712
2713 txbuf = &hbufs->tx_buf[entry][0];
2714 memcpy(txbuf, skb->data, len);
2715
2716 SXD(("SX<l[%d]e[%d]>", len, entry));
2717 txbuf_dvma = hbufs_dvma + hbuf_offset(tx_buf, entry);
2718 hp->happy_block->happy_meal_txd[entry].tx_addr = txbuf_dvma;
2719 hp->happy_block->happy_meal_txd[entry].tx_flags =
2720 (TXFLAG_OWN | TXFLAG_SOP | TXFLAG_EOP | (len & TXFLAG_SIZE));
2721 hp->tx_new = NEXT_TX(entry);
2722
2723 /* Get it going. */
2724 dev->trans_start = jiffies;
2725 hp->etxregs->tx_pnding = ETX_TP_DMAWAKEUP;
2726
2727 dev_kfree_skb(skb);
2728
2729 if(TX_BUFFS_AVAIL(hp))
2730 dev->tbusy = 0;
2731
2732 return 0;
2733 }
2734
2735 static int sun4d_happy_meal_start_xmit(struct sk_buff *skb, struct net_device *dev)
2736 {
2737 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2738 int len, entry;
2739 __u32 va;
2740
2741 if(test_and_set_bit(0, (void *) &dev->tbusy) != 0) {
2742 int tickssofar = jiffies - dev->trans_start;
2743
2744 if (tickssofar >= 40) {
2745 printk ("%s: transmit timed out, resetting\n", dev->name);
2746 hp->net_stats.tx_errors++;
2747 tx_dump_log();
2748 printk ("%s: Happy Status %08x TX[%08x:%08x]\n", dev->name,
2749 hme_read32(hp, &hp->gregs->stat),
2750 hme_read32(hp, &hp->etxregs->cfg),
2751 hme_read32(hp, &hp->bigmacregs->tx_cfg));
2752 happy_meal_init(hp, 0);
2753 dev->tbusy = 0;
2754 dev->trans_start = jiffies;
2755 } else
2756 tx_add_log(hp, TXLOG_ACTION_TXMIT|TXLOG_ACTION_TBUSY, 0);
2757 return 1;
2758 }
2759
2760 if(!TX_BUFFS_AVAIL(hp)) {
2761 tx_add_log(hp, TXLOG_ACTION_TXMIT|TXLOG_ACTION_NBUFS, 0);
2762 return 1;
2763 }
2764 len = skb->len;
2765 entry = hp->tx_new;
2766
2767 SXD(("SX<l[%d]e[%d]>", len, entry));
2768 hp->tx_skbs[entry] = skb;
2769 va = (__u32)hp->sun4d_buffers + (RX_RING_SIZE + entry) * PAGE_SIZE;
2770 hp->happy_block->happy_meal_txd[entry].tx_addr =
2771 iounit_map_dma_page(va, skb->data, hp->happy_sbus_dev->my_bus);
2772 hp->happy_block->happy_meal_txd[entry].tx_flags =
2773 (TXFLAG_OWN | TXFLAG_SOP | TXFLAG_EOP | (len & TXFLAG_SIZE));
2774 hp->tx_new = NEXT_TX(entry);
2775
2776 /* Get it going. */
2777 dev->trans_start = jiffies;
2778 hme_write32(hp, &hp->etxregs->tx_pnding, ETX_TP_DMAWAKEUP);
2779
2780 if(TX_BUFFS_AVAIL(hp))
2781 dev->tbusy = 0;
2782
2783 tx_add_log(hp, TXLOG_ACTION_TXMIT, 0);
2784 return 0;
2785 }
2786 #endif
2787
2788 static struct net_device_stats *happy_meal_get_stats(struct net_device *dev)
2789 {
2790 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2791
2792 happy_meal_get_counters(hp, hp->bigmacregs);
2793 return &hp->net_stats;
2794 }
2795
2796 static void happy_meal_set_multicast(struct net_device *dev)
2797 {
2798 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2799 struct hmeal_bigmacregs *bregs = hp->bigmacregs;
2800 struct dev_mc_list *dmi = dev->mc_list;
2801 char *addrs;
2802 int i, j, bit, byte;
2803 u32 crc, poly = CRC_POLYNOMIAL_LE;
2804
2805 /* Lock out others. */
2806 set_bit(0, (void *) &dev->tbusy);
2807
2808 if((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 64)) {
2809 hme_write32(hp, &bregs->htable0, 0xffff);
2810 hme_write32(hp, &bregs->htable1, 0xffff);
2811 hme_write32(hp, &bregs->htable2, 0xffff);
2812 hme_write32(hp, &bregs->htable3, 0xffff);
2813 } else if(dev->flags & IFF_PROMISC) {
2814 hme_write32(hp, &bregs->rx_cfg,
2815 hme_read32(hp, &bregs->rx_cfg) | BIGMAC_RXCFG_PMISC);
2816 } else {
2817 u16 hash_table[4];
2818
2819 for(i = 0; i < 4; i++)
2820 hash_table[i] = 0;
2821
2822 for(i = 0; i < dev->mc_count; i++) {
2823 addrs = dmi->dmi_addr;
2824 dmi = dmi->next;
2825
2826 if(!(*addrs & 1))
2827 continue;
2828
2829 crc = 0xffffffffU;
2830 for(byte = 0; byte < 6; byte++) {
2831 for(bit = *addrs++, j = 0; j < 8; j++, bit >>= 1) {
2832 int test;
2833
2834 test = ((bit ^ crc) & 0x01);
2835 crc >>= 1;
2836 if(test)
2837 crc = crc ^ poly;
2838 }
2839 }
2840 crc >>= 26;
2841 hash_table[crc >> 4] |= 1 << (crc & 0xf);
2842 }
2843 hme_write32(hp, &bregs->htable0, hash_table[0]);
2844 hme_write32(hp, &bregs->htable1, hash_table[1]);
2845 hme_write32(hp, &bregs->htable2, hash_table[2]);
2846 hme_write32(hp, &bregs->htable3, hash_table[3]);
2847 }
2848
2849 /* Let us get going again. */
2850 dev->tbusy = 0;
2851 }
2852
2853 /* Ethtool support... */
2854 static int happy_meal_ioctl(struct net_device *dev,
2855 struct ifreq *rq, int cmd)
2856 {
2857 struct happy_meal *hp = (struct happy_meal *) dev->priv;
2858 struct ethtool_cmd *ep_user = (struct ethtool_cmd *) rq->ifr_data;
2859 struct ethtool_cmd ecmd;
2860
2861 if(cmd != SIOCETHTOOL)
2862 return -EOPNOTSUPP;
2863 if(copy_from_user(&ecmd, ep_user, sizeof(ecmd)))
2864 return -EFAULT;
2865
2866 if(ecmd.cmd == SPARC_ETH_GSET) {
2867 ecmd.supported =
2868 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2869 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2870 SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
2871
2872 /* XXX hardcoded stuff for now */
2873 ecmd.port = PORT_TP; /* XXX no MII support */
2874 ecmd.transceiver = XCVR_INTERNAL; /* XXX no external xcvr support */
2875 ecmd.phy_address = 0; /* XXX fixed PHYAD */
2876
2877 /* Record PHY settings. */
2878 hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, DP83840_BMCR);
2879 hp->sw_lpa = happy_meal_tcvr_read(hp, hp->tcvregs, DP83840_LPA);
2880 if(hp->sw_bmcr & BMCR_ANENABLE) {
2881 ecmd.autoneg = AUTONEG_ENABLE;
2882 ecmd.speed =
2883 (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) ?
2884 SPEED_100 : SPEED_10;
2885 if(ecmd.speed == SPEED_100)
2886 ecmd.duplex =
2887 (hp->sw_lpa & (LPA_100FULL)) ?
2888 DUPLEX_FULL : DUPLEX_HALF;
2889 else
2890 ecmd.duplex =
2891 (hp->sw_lpa & (LPA_10FULL)) ?
2892 DUPLEX_FULL : DUPLEX_HALF;
2893 } else {
2894 ecmd.autoneg = AUTONEG_DISABLE;
2895 ecmd.speed =
2896 (hp->sw_bmcr & BMCR_SPEED100) ?
2897 SPEED_100 : SPEED_10;
2898 ecmd.duplex =
2899 (hp->sw_bmcr & BMCR_FULLDPLX) ?
2900 DUPLEX_FULL : DUPLEX_HALF;
2901 }
2902 if(copy_to_user(ep_user, &ecmd, sizeof(ecmd)))
2903 return -EFAULT;
2904 return 0;
2905 } else if(ecmd.cmd == SPARC_ETH_SSET) {
2906 if(!capable(CAP_NET_ADMIN))
2907 return -EPERM;
2908
2909 /* Verify the settings we care about. */
2910 if(ecmd.autoneg != AUTONEG_ENABLE &&
2911 ecmd.autoneg != AUTONEG_DISABLE)
2912 return -EINVAL;
2913 if(ecmd.autoneg == AUTONEG_DISABLE &&
2914 ((ecmd.speed != SPEED_100 &&
2915 ecmd.speed != SPEED_10) ||
2916 (ecmd.duplex != DUPLEX_HALF &&
2917 ecmd.duplex != DUPLEX_FULL)))
2918 return -EINVAL;
2919
2920 /* Ok, do it to it. */
2921 del_timer(&hp->happy_timer);
2922 happy_meal_begin_auto_negotiation(hp,
2923 hp->tcvregs,
2924 &ecmd);
2925
2926 return 0;
2927 } else
2928 return -EOPNOTSUPP;
2929 }
2930
2931 void __init quattro_get_ranges(struct quattro *qp)
2932 {
2933 int err;
2934
2935 err = prom_getproperty(qp->quattro_sbus_dev->prom_node,
2936 "ranges",
2937 (char *)&qp->ranges[0],
2938 sizeof(qp->ranges));
2939 if(err == 0 || err == -1) {
2940 qp->nranges = 0;
2941 return;
2942 }
2943 qp->nranges = (err / sizeof(struct linux_prom_ranges));
2944 }
2945
2946 static void __init quattro_apply_ranges(struct quattro *qp, struct happy_meal *hp)
2947 {
2948 struct linux_sbus_device *sdev = hp->happy_sbus_dev;
2949 int rng;
2950
2951 for(rng = 0; rng < qp->nranges; rng++) {
2952 struct linux_prom_ranges *rngp = &qp->ranges[rng];
2953 int reg;
2954
2955 for(reg = 0; reg < 5; reg++) {
2956 if(sdev->reg_addrs[reg].which_io ==
2957 rngp->ot_child_space)
2958 break;
2959 }
2960 if(reg == 5)
2961 continue;
2962
2963 sdev->reg_addrs[reg].which_io = rngp->ot_parent_space;
2964 sdev->reg_addrs[reg].phys_addr += rngp->ot_parent_base;
2965 }
2966 }
2967
2968 /* Given a happy meal sbus device, find it's quattro parent.
2969 * If none exist, allocate and return a new one.
2970 *
2971 * Return NULL on failure.
2972 */
2973 static struct quattro * __init quattro_sbus_find(struct linux_sbus_device *goal_sdev)
2974 {
2975 struct linux_sbus *sbus;
2976 struct linux_sbus_device *sdev;
2977 struct quattro *qp;
2978
2979 if(qfe_sbus_list == NULL)
2980 goto found;
2981
2982 for(qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2983 for(sdev = qp->quattro_sbus_dev;
2984 sdev != NULL;
2985 sdev = sdev->next) {
2986 if(sdev == goal_sdev)
2987 return qp;
2988 }
2989 }
2990 for_each_sbus(sbus) {
2991 for_each_sbusdev(sdev, sbus) {
2992 if(sdev->child != NULL) {
2993 struct linux_sbus_device *p;
2994
2995 for(p = sdev->child; p != NULL; p = p->next)
2996 if(p == goal_sdev)
2997 goto found;
2998 }
2999 }
3000 }
3001
3002 /* Cannot find quattro parent, fail. */
3003 return NULL;
3004
3005 found:
3006 qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
3007 if(qp != NULL) {
3008 int i;
3009
3010 for(i = 0; i < 4; i++) {
3011 qp->irq_status[i] = NULL;
3012 qp->happy_meals[i] = NULL;
3013 }
3014 qp->handler = NULL;
3015 qp->quattro_sbus_dev = goal_sdev;
3016 #ifdef CONFIG_PCI
3017 qp->quattro_pci_dev = NULL;
3018 #endif
3019 qp->next = qfe_sbus_list;
3020 qfe_sbus_list = qp;
3021 quattro_get_ranges(qp);
3022 }
3023 return qp;
3024 }
3025
3026 #ifdef CONFIG_PCI
3027 static struct quattro * __init quattro_pci_find(struct pci_dev *pdev)
3028 {
3029 struct pci_dev *bdev = pdev->bus->self;
3030 struct quattro *qp;
3031
3032 if (!bdev) return NULL;
3033 for(qp = qfe_pci_list; qp != NULL; qp = qp->next) {
3034 if(qp->quattro_pci_dev == bdev)
3035 return qp;
3036 }
3037 qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
3038 if(qp != NULL) {
3039 int i;
3040
3041 for(i = 0; i < 4; i++) {
3042 qp->irq_status[i] = NULL;
3043 qp->happy_meals[i] = NULL;
3044 }
3045 qp->handler = NULL;
3046 qp->quattro_sbus_dev = NULL;
3047 qp->quattro_pci_dev = bdev;
3048 qp->next = qfe_pci_list;
3049 qfe_pci_list = qp;
3050
3051 /* No range tricks necessary on PCI. */
3052 qp->nranges = 0;
3053 }
3054 return qp;
3055 }
3056 #endif
3057
3058 /* After all quattro cards have been probed, we call these functions
3059 * to register the IRQ handlers.
3060 */
3061 static void __init quattro_sbus_register_irqs(void)
3062 {
3063 struct quattro *qp;
3064
3065 for(qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
3066 int err;
3067
3068 /* Set the handler. */
3069 #ifndef __sparc_v9__
3070 if(sparc_cpu_model == sun4c)
3071 qp->handler = sun4c_happy_meal_interrupt;
3072 else if(sparc_cpu_model == sun4d)
3073 qp->handler = sun4d_happy_meal_interrupt;
3074 else
3075 #endif
3076 #ifdef CONFIG_PCI
3077 if(qp->quattro_pci_dev != NULL)
3078 panic("QFE: PCI qfe in sbus_register_irqs!");
3079 else
3080 #endif
3081 qp->handler = happy_meal_interrupt;
3082
3083 err = request_irq(qp->quattro_sbus_dev->irqs[0],
3084 quattro_sbus_interrupt,
3085 SA_SHIRQ, "Quattro",
3086 qp);
3087 if(err != 0) {
3088 printk("Quattro: Fatal IRQ registery error %d.\n", err);
3089 panic("QFE request irq");
3090 }
3091 }
3092 }
3093
3094 static unsigned hme_version_printed = 0;
3095
3096 static int __init happy_meal_ether_init(struct net_device *dev, struct linux_sbus_device *sdev, int is_qfe)
3097 {
3098 struct quattro *qp = NULL;
3099 struct happy_meal *hp;
3100 int i, qfe_slot = -1;
3101
3102 if(is_qfe) {
3103 qp = quattro_sbus_find(sdev);
3104 if(qp == NULL)
3105 return ENODEV;
3106 for(qfe_slot = 0; qfe_slot < 4; qfe_slot++)
3107 if(qp->happy_meals[qfe_slot] == NULL)
3108 break;
3109 if(qfe_slot == 4)
3110 return ENODEV;
3111 }
3112 if(dev == NULL) {
3113 dev = init_etherdev(0, sizeof(struct happy_meal));
3114 } else {
3115 dev->priv = kmalloc(sizeof(struct happy_meal), GFP_KERNEL);
3116 if(dev->priv == NULL)
3117 return -ENOMEM;
3118 }
3119 if(hme_version_printed++ == 0)
3120 printk(version);
3121
3122 if(qfe_slot != -1)
3123 printk("%s: Quattro HME slot %d (SBUS) 10/100baseT Ethernet ",
3124 dev->name, qfe_slot);
3125 else
3126 printk("%s: HAPPY MEAL (SBUS) 10/100baseT Ethernet ",
3127 dev->name);
3128
3129 dev->base_addr = (long) sdev;
3130
3131 /* XXX Check for local-mac-address property on Quattro... -DaveM */
3132 /* Quattro local-mac-address... */
3133 if(qfe_slot != -1 && prom_getproplen(sdev->prom_node,"local-mac-address")==6)
3134 prom_getproperty(sdev->prom_node,"local-mac-address",dev->dev_addr,6);
3135 else
3136 memcpy(dev->dev_addr,idprom->id_ethaddr,6);
3137 for(i = 0; i < 6; i++)
3138 printk("%2.2x%c",
3139 dev->dev_addr[i], i == 5 ? ' ' : ':');
3140 printk("\n");
3141
3142 hp = (struct happy_meal *) dev->priv;
3143 memset(hp, 0, sizeof(*hp));
3144
3145 hp->happy_sbus_dev = sdev;
3146 #ifdef CONFIG_PCI
3147 hp->happy_pci_dev = NULL;
3148 #endif
3149
3150 if(sdev->num_registers != 5) {
3151 printk("happymeal: Device does not have 5 regs, it has %d.\n",
3152 sdev->num_registers);
3153 printk("happymeal: Would you like that for here or to go?\n");
3154 return ENODEV;
3155 }
3156
3157 if(qp != NULL) {
3158 hp->qfe_parent = qp;
3159 hp->qfe_ent = qfe_slot;
3160 qp->happy_meals[qfe_slot] = dev;
3161 quattro_apply_ranges(qp, hp);
3162 }
3163
3164 prom_apply_sbus_ranges(sdev->my_bus, &sdev->reg_addrs[0],
3165 sdev->num_registers, sdev);
3166 hp->gregs = sparc_alloc_io(sdev->reg_addrs[0].phys_addr, 0,
3167 sizeof(struct hmeal_gregs),
3168 "Happy Meal Global Regs",
3169 sdev->reg_addrs[0].which_io, 0);
3170 if(!hp->gregs) {
3171 printk("happymeal: Cannot map Happy Meal global registers.\n");
3172 return ENODEV;
3173 }
3174
3175 hp->etxregs = sparc_alloc_io(sdev->reg_addrs[1].phys_addr, 0,
3176 sizeof(struct hmeal_etxregs),
3177 "Happy Meal MAC TX Regs",
3178 sdev->reg_addrs[1].which_io, 0);
3179 if(!hp->etxregs) {
3180 printk("happymeal: Cannot map Happy Meal MAC Transmit registers.\n");
3181 return ENODEV;
3182 }
3183
3184 hp->erxregs = sparc_alloc_io(sdev->reg_addrs[2].phys_addr, 0,
3185 sizeof(struct hmeal_erxregs),
3186 "Happy Meal MAC RX Regs",
3187 sdev->reg_addrs[2].which_io, 0);
3188 if(!hp->erxregs) {
3189 printk("happymeal: Cannot map Happy Meal MAC Receive registers.\n");
3190 return ENODEV;
3191 }
3192
3193 hp->bigmacregs = sparc_alloc_io(sdev->reg_addrs[3].phys_addr, 0,
3194 sizeof(struct hmeal_bigmacregs),
3195 "Happy Meal BIGMAC Regs",
3196 sdev->reg_addrs[3].which_io, 0);
3197 if(!hp->bigmacregs) {
3198 printk("happymeal: Cannot map Happy Meal BIGMAC registers.\n");
3199 return ENODEV;
3200 }
3201
3202 hp->tcvregs = sparc_alloc_io(sdev->reg_addrs[4].phys_addr, 0,
3203 sizeof(struct hmeal_tcvregs),
3204 "Happy Meal Tranceiver Regs",
3205 sdev->reg_addrs[4].which_io, 0);
3206 if(!hp->tcvregs) {
3207 printk("happymeal: Cannot map Happy Meal Tranceiver registers.\n");
3208 return ENODEV;
3209 }
3210
3211 hp->hm_revision = prom_getintdefault(sdev->prom_node, "hm-rev", 0xff);
3212 if(hp->hm_revision == 0xff)
3213 hp->hm_revision = 0xa0;
3214
3215 /* Now enable the feature flags we can. */
3216 if(hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
3217 hp->happy_flags = HFLAG_20_21;
3218 else if(hp->hm_revision != 0xa0)
3219 hp->happy_flags = HFLAG_NOT_A0;
3220
3221 if(qp != NULL)
3222 hp->happy_flags |= HFLAG_QUATTRO;
3223
3224 /* Get the supported DVMA burst sizes from our Happy SBUS. */
3225 hp->happy_bursts = prom_getintdefault(hp->happy_sbus_dev->my_bus->prom_node,
3226 "burst-sizes", 0x00);
3227
3228 hp->happy_block = (struct hmeal_init_block *)
3229 sparc_dvma_malloc(PAGE_SIZE, "Happy Meal Init Block",
3230 &hp->hblock_dvma);
3231
3232 #ifndef __sparc_v9__
3233 if(sparc_cpu_model == sun4c)
3234 hp->sun4c_buffers = (struct hmeal_buffers *)
3235 sparc_dvma_malloc(sizeof(struct hmeal_buffers), "Happy Meal Bufs",
3236 &hp->s4c_buf_dvma);
3237 else if (sparc_cpu_model == sun4d)
3238 hp->sun4d_buffers = (struct hmeal_buffers *)
3239 iounit_map_dma_init(hp->happy_sbus_dev->my_bus,
3240 (RX_RING_SIZE + TX_RING_SIZE) * PAGE_SIZE);
3241 else
3242 #endif
3243 hp->sun4c_buffers = 0;
3244
3245 /* Force check of the link first time we are brought up. */
3246 hp->linkcheck = 0;
3247
3248 /* Force timer state to 'asleep' with count of zero. */
3249 hp->timer_state = asleep;
3250 hp->timer_ticks = 0;
3251
3252 /* Grrr, Happy Meal comes up by default not advertising
3253 * full duplex 100baseT capabilities, fix this.
3254 */
3255 happy_meal_set_initial_advertisement(hp);
3256
3257 init_timer(&hp->happy_timer);
3258
3259 hp->dev = dev;
3260 dev->open = &happy_meal_open;
3261 dev->stop = &happy_meal_close;
3262 #ifndef __sparc_v9__
3263 if(sparc_cpu_model == sun4c)
3264 dev->hard_start_xmit = &sun4c_happy_meal_start_xmit;
3265 else if (sparc_cpu_model == sun4d)
3266 dev->hard_start_xmit = &sun4d_happy_meal_start_xmit;
3267 else
3268 #endif
3269 dev->hard_start_xmit = &happy_meal_start_xmit;
3270 dev->get_stats = &happy_meal_get_stats;
3271 dev->set_multicast_list = &happy_meal_set_multicast;
3272 dev->do_ioctl = &happy_meal_ioctl;
3273
3274 dev->irq = sdev->irqs[0];
3275 dev->dma = 0;
3276 ether_setup(dev);
3277 #ifdef MODULE
3278 /* We are home free at this point, link us in to the happy
3279 * module device list.
3280 */
3281 dev->ifindex = dev_new_index();
3282 hp->next_module = root_happy_dev;
3283 root_happy_dev = hp;
3284 #endif
3285 return 0;
3286 }
3287
3288 #ifdef CONFIG_PCI
3289 static int __init happy_meal_pci_init(struct net_device *dev, struct pci_dev *pdev)
3290 {
3291 struct quattro *qp = NULL;
3292 struct pcidev_cookie *pcp;
3293 struct happy_meal *hp;
3294 unsigned long hpreg_base;
3295 unsigned short pci_command;
3296 int i, node, qfe_slot = -1;
3297 char prom_name[64];
3298
3299 /* Now make sure pci_dev cookie is there. */
3300 pcp = pdev->sysdata;
3301 if(pcp == NULL || pcp->prom_node == -1) {
3302 printk("happymeal(PCI): Some PCI device info missing\n");
3303 return ENODEV;
3304 }
3305 node = pcp->prom_node;
3306
3307 prom_getstring(node, "name", prom_name, sizeof(prom_name));
3308 if (!strcmp(prom_name, "SUNW,qfe") || !strcmp(prom_name, "qfe")) {
3309 qp = quattro_pci_find(pdev);
3310 if(qp == NULL)
3311 return ENODEV;
3312 for(qfe_slot = 0; qfe_slot < 4; qfe_slot++)
3313 if(qp->happy_meals[qfe_slot] == NULL)
3314 break;
3315 if(qfe_slot == 4)
3316 return ENODEV;
3317 }
3318 if(dev == NULL) {
3319 dev = init_etherdev(0, sizeof(struct happy_meal));
3320 } else {
3321 dev->priv = kmalloc(sizeof(struct happy_meal), GFP_KERNEL);
3322 if(dev->priv == NULL)
3323 return -ENOMEM;
3324 }
3325 if(hme_version_printed++ == 0)
3326 printk(version);
3327
3328 if (!qfe_slot) {
3329 prom_name[0] = 0;
3330 if (!strncmp(dev->name, "eth", 3)) {
3331 int i = simple_strtoul(dev->name + 3, NULL, 10);
3332 sprintf(prom_name, "-%d", i + 3);
3333 }
3334 printk("%s%s: Quattro HME (PCI/CheerIO) 10/100baseT Ethernet ", dev->name, prom_name);
3335 if (qp->quattro_pci_dev->vendor == PCI_VENDOR_ID_DEC &&
3336 qp->quattro_pci_dev->device == PCI_DEVICE_ID_DEC_21153)
3337 printk("DEC 21153 PCI Bridge\n");
3338 else
3339 printk("unknown bridge %04x.%04x\n",
3340 qp->quattro_pci_dev->vendor, qp->quattro_pci_dev->device);
3341 }
3342 if(qfe_slot != -1)
3343 printk("%s: Quattro HME slot %d (PCI/CheerIO) 10/100baseT Ethernet ",
3344 dev->name, qfe_slot);
3345 else
3346 printk("%s: HAPPY MEAL (PCI/CheerIO) 10/100BaseT Ethernet ",
3347 dev->name);
3348
3349 dev->base_addr = (long) pdev;
3350
3351 hp = (struct happy_meal *)dev->priv;
3352 memset(hp, 0, sizeof(*hp));
3353
3354 hp->happy_sbus_dev = NULL;
3355 hp->happy_pci_dev = pdev;
3356
3357 if(qp != NULL) {
3358 hp->qfe_parent = qp;
3359 hp->qfe_ent = qfe_slot;
3360 qp->happy_meals[qfe_slot] = dev;
3361 }
3362
3363 hpreg_base = pdev->resource[0].start;
3364 if ((pdev->resource[0].flags & IORESOURCE_IO) != 0) {
3365 printk("happymeal(PCI): Cannot find proper PCI device base address.\n");
3366 return ENODEV;
3367 }
3368
3369 if (qfe_slot != -1 && prom_getproplen(node, "local-mac-address") == 6)
3370 prom_getproperty(node, "local-mac-address", dev->dev_addr, 6);
3371 else
3372 memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
3373 for(i = 0; i < 6; i++)
3374 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ' ' : ':');
3375
3376 printk("\n");
3377
3378 /* Layout registers. */
3379 hp->gregs = (struct hmeal_gregs *) (hpreg_base + 0x0000);
3380 hp->etxregs = (struct hmeal_etxregs *) (hpreg_base + 0x2000);
3381 hp->erxregs = (struct hmeal_erxregs *) (hpreg_base + 0x4000);
3382 hp->bigmacregs = (struct hmeal_bigmacregs *) (hpreg_base + 0x6000);
3383 hp->tcvregs = (struct hmeal_tcvregs *) (hpreg_base + 0x7000);
3384
3385 hp->hm_revision = prom_getintdefault(node, "hm-rev", 0xff);
3386 if(hp->hm_revision == 0xff)
3387 hp->hm_revision = 0xa0;
3388
3389 /* Now enable the feature flags we can. */
3390 if(hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
3391 hp->happy_flags = HFLAG_20_21;
3392 else if(hp->hm_revision != 0xa0)
3393 hp->happy_flags = HFLAG_NOT_A0;
3394
3395 if(qp != NULL)
3396 hp->happy_flags |= HFLAG_QUATTRO;
3397
3398 /* And of course, indicate this is PCI. */
3399 hp->happy_flags |= HFLAG_PCI;
3400
3401 /* Assume PCI happy meals can handle all burst sizes. */
3402 hp->happy_bursts = DMA_BURSTBITS;
3403
3404 hp->happy_block = (struct hmeal_init_block *) get_free_page(GFP_DMA);
3405 if(!hp->happy_block) {
3406 printk("happymeal(PCI): Cannot get hme init block.\n");
3407 return ENODEV;
3408 }
3409
3410 hp->hblock_dvma = (u32) virt_to_bus(hp->happy_block);
3411 #ifndef __sparc_v9__
3412 /* This case we currently need to use 'sparc_alloc_io' */
3413 hp->happy_block = sparc_alloc_io (hp->hblock_dvma, NULL,
3414 PAGE_SIZE, "sunhme", 0, 0);
3415 #endif
3416 hp->sun4c_buffers = 0;
3417
3418 hp->linkcheck = 0;
3419 hp->timer_state = asleep;
3420 hp->timer_ticks = 0;
3421 happy_meal_set_initial_advertisement(hp);
3422
3423 init_timer(&hp->happy_timer);
3424
3425 hp->dev = dev;
3426 dev->open = &happy_meal_open;
3427 dev->stop = &happy_meal_close;
3428 dev->hard_start_xmit = &pci_happy_meal_start_xmit;
3429 dev->get_stats = &happy_meal_get_stats;
3430 dev->set_multicast_list = &happy_meal_set_multicast;
3431 dev->do_ioctl = &happy_meal_ioctl;
3432 dev->irq = pdev->irq;
3433 dev->dma = 0;
3434 ether_setup(dev);
3435
3436 /* If we don't do this, nothing works. */
3437 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
3438 pci_command |= PCI_COMMAND_MASTER;
3439 pci_write_config_word(pdev, PCI_COMMAND, pci_command);
3440
3441 /* Set the latency timer and cache line size as well,
3442 * PROM leaves it at zero.
3443 */
3444 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64);
3445 #ifdef __sparc_v9__
3446 /* NOTE: Cache line size is in 32-bit word units. */
3447 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x10);
3448 #endif
3449
3450 #ifdef MODULE
3451 /* We are home free at this point, link us in to the happy
3452 * module device list.
3453 */
3454 dev->ifindex = dev_new_index();
3455 hp->next_module = root_happy_dev;
3456 root_happy_dev = hp;
3457 #endif
3458 return 0;
3459 }
3460 #endif
3461
3462 int __init happy_meal_probe(struct net_device *dev)
3463 {
3464 struct linux_sbus *bus;
3465 struct linux_sbus_device *sdev = 0;
3466 static int called = 0;
3467 int cards = 0, v;
3468
3469 if(called)
3470 return ENODEV;
3471 called++;
3472
3473 for_each_sbus(bus) {
3474 for_each_sbusdev(sdev, bus) {
3475 if(cards)
3476 dev = NULL;
3477 if(!strcmp(sdev->prom_name, "SUNW,hme")) {
3478 cards++;
3479 if((v = happy_meal_ether_init(dev, sdev, 0)))
3480 return v;
3481 } else if(!strcmp(sdev->prom_name, "qfe") ||
3482 !strcmp(sdev->prom_name, "SUNW,qfe")) {
3483 cards++;
3484 if((v = happy_meal_ether_init(dev, sdev, 1)))
3485 return v;
3486 }
3487 }
3488 }
3489 if(cards != 0)
3490 quattro_sbus_register_irqs();
3491 #ifdef CONFIG_PCI
3492 if(pci_present()) {
3493 struct pci_dev *pdev;
3494
3495 pdev = pci_find_device(PCI_VENDOR_ID_SUN,
3496 PCI_DEVICE_ID_SUN_HAPPYMEAL, 0);
3497 while (pdev) {
3498 if(cards)
3499 dev = NULL;
3500 cards++;
3501 if((v = happy_meal_pci_init(dev, pdev)))
3502 return v;
3503 pdev = pci_find_device(PCI_VENDOR_ID_SUN,
3504 PCI_DEVICE_ID_SUN_HAPPYMEAL,
3505 pdev);
3506 }
3507 }
3508 #endif
3509 if(!cards)
3510 return ENODEV;
3511 return 0;
3512 }
3513
3514 #ifdef MODULE
3515
3516 int
3517 init_module(void)
3518 {
3519 root_happy_dev = NULL;
3520 return happy_meal_probe(NULL);
3521 }
3522
3523 void
3524 cleanup_module(void)
3525 {
3526 struct happy_meal *sunshine;
3527
3528 /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
3529 while (root_happy_dev) {
3530 struct happy_meal *hp = root_happy_dev;
3531 sunshine = root_happy_dev->next_module;
3532
3533 sparc_free_io(hp->gregs, sizeof(struct hmeal_gregs));
3534 sparc_free_io(hp->etxregs, sizeof(struct hmeal_etxregs));
3535 sparc_free_io(hp->erxregs, sizeof(struct hmeal_erxregs));
3536 sparc_free_io(hp->bigmacregs, sizeof(struct hmeal_bigmacregs));
3537 sparc_free_io(hp->tcvregs, sizeof(struct hmeal_tcvregs));
3538 #ifndef __sparc_v9__
3539 if (sparc_cpu_model == sun4d)
3540 iounit_map_dma_finish(hp->happy_sbus_dev->my_bus,
3541 (__u32)hp->sun4d_buffers, (RX_RING_SIZE + TX_RING_SIZE) * PAGE_SIZE);
3542 #endif
3543 unregister_netdev(hp->dev);
3544 kfree(hp->dev);
3545 root_happy_dev = sunshine;
3546 }
3547 }
3548
3549 #endif /* MODULE */