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* add p cc
[mascara-docs.git] / i386 / linux / linux-2.3.21 / drivers / sbus / char / bpp.c
blob0bd64dccedd9e3580c88f3cafe7065b29368ab9d
1 /*
2 * drivers/sbus/char/bpp.c
3 *
4 * Copyright (c) 1995 Picture Elements
5 * Stephen Williams (steve@icarus.com)
6 * Gus Baldauf (gbaldauf@ix.netcom.com)
7 *
8 * Linux/SPARC port by Peter Zaitcev.
9 * Integration into SPARC tree by Tom Dyas.
10 */
11
12
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/version.h>
16 #include <linux/fs.h>
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/timer.h>
20 #include <linux/ioport.h>
21 #include <linux/major.h>
22
23 #include <asm/uaccess.h>
24 #include <asm/io.h>
25
26 #if defined(__i386__)
27 # include <asm/system.h>
28 # include <asm/segment.h>
29 #endif
30
31 #if defined(__sparc__)
32 # include <linux/init.h>
33 # include <linux/delay.h> /* udelay() */
34
35 # include <asm/oplib.h> /* OpenProm Library */
36 # include <asm/sbus.h> /* struct linux_sbus *SBus_chain */
37 #endif
38
39 #include <asm/bpp.h>
40
41 #define BPP_PROBE_CODE 0x55
42 #define BPP_DELAY 100
43
44 static const unsigned BPP_MAJOR = LP_MAJOR;
45 static const char* dev_name = "bpp";
46
47 /* When switching from compatibility to a mode where I can read, try
48 the following mode first. */
49
50 /* const unsigned char DEFAULT_ECP = 0x10; */
51 static const unsigned char DEFAULT_ECP = 0x30;
52 static const unsigned char DEFAULT_NIBBLE = 0x00;
53
54 /*
55 * These are 1284 time constraints, in units of jiffies.
56 */
57
58 static const unsigned long TIME_PSetup = 1;
59 static const unsigned long TIME_PResponse = 6;
60 static const unsigned long TIME_IDLE_LIMIT = 2000;
61
62 /*
63 * One instance per supported subdevice...
64 */
65 # define BPP_NO 3
66
67 enum IEEE_Mode { COMPATIBILITY, NIBBLE, ECP, ECP_RLE, EPP };
68
69 struct inst {
70 unsigned present : 1; /* True if the hardware exists */
71 unsigned enhanced : 1; /* True if the hardware in "enhanced" */
72 unsigned opened : 1; /* True if the device is opened already */
73 unsigned run_flag : 1; /* True if waiting for a repeate byte */
74
75 unsigned char direction; /* 0 --> out, 0x20 --> IN */
76 unsigned char pp_state; /* State of host controlled pins. */
77 enum IEEE_Mode mode;
78
79 unsigned char run_length;
80 unsigned char repeat_byte;
81
82 /* These members manage timeouts for programmed delays */
83 wait_queue_head_t wait_queue;
84 struct timer_list timer_list;
85 };
86
87 static struct inst instances[BPP_NO];
88
89 #if defined(__i386__)
90
91 const unsigned short base_addrs[BPP_NO] = { 0x278, 0x378, 0x3bc };
92
93 /*
94 * These are for data access.
95 * Control lines accesses are hidden in set_bits() and get_bits().
96 * The exeption is the probe procedure, which is system-dependent.
97 */
98 #define bpp_outb_p(data, base) outb_p((data), (base))
99 #define bpp_inb(base) inb(base)
100 #define bpp_inb_p(base) inb_p(base)
101
102 /*
103 * This method takes the pin values mask and sets the hardware pins to
104 * the requested value: 1 == high voltage, 0 == low voltage. This
105 * burries the annoying PC bit inversion and preserves the direction
106 * flag.
107 */
108 static void set_pins(unsigned short pins, unsigned minor)
109 {
110 unsigned char bits = instances[minor].direction; /* == 0x20 */
111
112 if (! (pins & BPP_PP_nStrobe)) bits |= 1;
113 if (! (pins & BPP_PP_nAutoFd)) bits |= 2;
114 if ( pins & BPP_PP_nInit) bits |= 4;
115 if (! (pins & BPP_PP_nSelectIn)) bits |= 8;
116
117 instances[minor].pp_state = bits;
118
119 outb_p(bits, base_addrs[minor]+2);
120 }
121
122 static unsigned short get_pins(unsigned minor)
123 {
124 unsigned short bits = 0;
125
126 unsigned value = instances[minor].pp_state;
127 if (! (value & 0x01)) bits |= BPP_PP_nStrobe;
128 if (! (value & 0x02)) bits |= BPP_PP_nAutoFd;
129 if (value & 0x04) bits |= BPP_PP_nInit;
130 if (! (value & 0x08)) bits |= BPP_PP_nSelectIn;
131
132 value = inb_p(base_addrs[minor]+1);
133 if (value & 0x08) bits |= BPP_GP_nFault;
134 if (value & 0x10) bits |= BPP_GP_Select;
135 if (value & 0x20) bits |= BPP_GP_PError;
136 if (value & 0x40) bits |= BPP_GP_nAck;
137 if (! (value & 0x80)) bits |= BPP_GP_Busy;
138
139 return bits;
140 }
141
142 #endif /* __i386__ */
143
144 #if defined(__sparc__)
145
146 /*
147 * Register block
148 */
149 struct bpp_regs {
150 /* DMA registers */
151 __volatile__ __u32 p_csr; /* DMA Control/Status Register */
152 __volatile__ __u32 p_addr; /* Address Register */
153 __volatile__ __u32 p_bcnt; /* Byte Count Register */
154 __volatile__ __u32 p_tst_csr; /* Test Control/Status (DMA2 only) */
155 /* Parallel Port registers */
156 __volatile__ __u16 p_hcr; /* Hardware Configuration Register */
157 __volatile__ __u16 p_ocr; /* Operation Configuration Register */
158 __volatile__ __u8 p_dr; /* Parallel Data Register */
159 __volatile__ __u8 p_tcr; /* Transfer Control Register */
160 __volatile__ __u8 p_or; /* Output Register */
161 __volatile__ __u8 p_ir; /* Input Register */
162 __volatile__ __u16 p_icr; /* Interrupt Control Register */
163 };
164
165 /* P_CSR. Bits of type RW1 are cleared with writting '1'. */
166 #define P_DEV_ID_MASK 0xf0000000 /* R */
167 #define P_DEV_ID_ZEBRA 0x40000000
168 #define P_DEV_ID_L64854 0xa0000000 /* == NCR 89C100+89C105. Pity. */
169 #define P_NA_LOADED 0x08000000 /* R NA wirtten but was not used */
170 #define P_A_LOADED 0x04000000 /* R */
171 #define P_DMA_ON 0x02000000 /* R DMA is not disabled */
172 #define P_EN_NEXT 0x01000000 /* RW */
173 #define P_TCI_DIS 0x00800000 /* RW TCI forbidden from interrupts */
174 #define P_DIAG 0x00100000 /* RW Disables draining and resetting
175 of P-FIFO on loading of P_ADDR*/
176 #define P_BURST_SIZE 0x000c0000 /* RW SBus burst size */
177 #define P_BURST_8 0x00000000
178 #define P_BURST_4 0x00040000
179 #define P_BURST_1 0x00080000 /* "No burst" write */
180 #define P_TC 0x00004000 /* RW1 Term Count, can be cleared when
181 P_EN_NEXT=1 */
182 #define P_EN_CNT 0x00002000 /* RW */
183 #define P_EN_DMA 0x00000200 /* RW */
184 #define P_WRITE 0x00000100 /* R DMA dir, 1=to ram, 0=to port */
185 #define P_RESET 0x00000080 /* RW */
186 #define P_SLAVE_ERR 0x00000040 /* RW1 Access size error */
187 #define P_INVALIDATE 0x00000020 /* W Drop P-FIFO */
188 #define P_INT_EN 0x00000010 /* RW OK to P_INT_PEND||P_ERR_PEND */
189 #define P_DRAINING 0x0000000c /* R P-FIFO is draining to memory */
190 #define P_ERR_PEND 0x00000002 /* R */
191 #define P_INT_PEND 0x00000001 /* R */
192
193 /* P_HCR. Time is in increments of SBus clock. */
194 #define P_HCR_TEST 0x8000 /* Allows buried counters to be read */
195 #define P_HCR_DSW 0x7f00 /* Data strobe width (in ticks) */
196 #define P_HCR_DDS 0x007f /* Data setup before strobe (in ticks) */
197
198 /* P_OCR. */
199 #define P_OCR_MEM_CLR 0x8000
200 #define P_OCR_DATA_SRC 0x4000 /* ) */
201 #define P_OCR_DS_DSEL 0x2000 /* ) Bidirectional */
202 #define P_OCR_BUSY_DSEL 0x1000 /* ) selects */
203 #define P_OCR_ACK_DSEL 0x0800 /* ) */
204 #define P_OCR_EN_DIAG 0x0400
205 #define P_OCR_BUSY_OP 0x0200 /* Busy operation */
206 #define P_OCR_ACK_OP 0x0100 /* Ack operation */
207 #define P_OCR_SRST 0x0080 /* Reset state machines. Not selfcleaning. */
208 #define P_OCR_IDLE 0x0008 /* PP data transfer state machine is idle */
209 #define P_OCR_V_ILCK 0x0002 /* Versatec faded. Zebra only. */
210 #define P_OCR_EN_VER 0x0001 /* Enable Versatec (0 - enable). Zebra only. */
211
212 /* P_TCR */
213 #define P_TCR_DIR 0x08
214 #define P_TCR_BUSY 0x04
215 #define P_TCR_ACK 0x02
216 #define P_TCR_DS 0x01 /* Strobe */
217
218 /* P_OR */
219 #define P_OR_V3 0x20 /* ) */
220 #define P_OR_V2 0x10 /* ) on Zebra only */
221 #define P_OR_V1 0x08 /* ) */
222 #define P_OR_INIT 0x04
223 #define P_OR_AFXN 0x02 /* Auto Feed */
224 #define P_OR_SLCT_IN 0x01
225
226 /* P_IR */
227 #define P_IR_PE 0x04
228 #define P_IR_SLCT 0x02
229 #define P_IR_ERR 0x01
230
231 /* P_ICR */
232 #define P_DS_IRQ 0x8000 /* RW1 */
233 #define P_ACK_IRQ 0x4000 /* RW1 */
234 #define P_BUSY_IRQ 0x2000 /* RW1 */
235 #define P_PE_IRQ 0x1000 /* RW1 */
236 #define P_SLCT_IRQ 0x0800 /* RW1 */
237 #define P_ERR_IRQ 0x0400 /* RW1 */
238 #define P_DS_IRQ_EN 0x0200 /* RW Always on rising edge */
239 #define P_ACK_IRQ_EN 0x0100 /* RW Always on rising edge */
240 #define P_BUSY_IRP 0x0080 /* RW 1= rising edge */
241 #define P_BUSY_IRQ_EN 0x0040 /* RW */
242 #define P_PE_IRP 0x0020 /* RW 1= rising edge */
243 #define P_PE_IRQ_EN 0x0010 /* RW */
244 #define P_SLCT_IRP 0x0008 /* RW 1= rising edge */
245 #define P_SLCT_IRQ_EN 0x0004 /* RW */
246 #define P_ERR_IRP 0x0002 /* RW1 1= rising edge */
247 #define P_ERR_IRQ_EN 0x0001 /* RW */
248
249 volatile struct bpp_regs *base_addrs[BPP_NO];
250
251 static inline void bpp_outb_p(__u8 data, volatile struct bpp_regs *base){
252 base->p_dr = data;
253 }
254
255 #define bpp_inb_p(base) bpp_inb(base)
256
257 static inline __u8 bpp_inb(volatile struct bpp_regs *base){
258 return base->p_dr;
259 }
260
261
262 static void set_pins(unsigned short pins, unsigned minor)
263 {
264 volatile struct bpp_regs *base = base_addrs[minor];
265 unsigned char bits_tcr = 0, bits_or = 0;
266
267 if (instances[minor].direction & 0x20) bits_tcr |= P_TCR_DIR;
268 if ( pins & BPP_PP_nStrobe) bits_tcr |= P_TCR_DS;
269
270 if ( pins & BPP_PP_nAutoFd) bits_or |= P_OR_AFXN;
271 if (! (pins & BPP_PP_nInit)) bits_or |= P_OR_INIT;
272 if (! (pins & BPP_PP_nSelectIn)) bits_or |= P_OR_SLCT_IN;
273
274 base->p_or = bits_or;
275 base->p_tcr = bits_tcr;
276 }
277
278 /*
279 * i386 people read output pins from a software image.
280 * We may get them back from hardware.
281 * Again, inversion of pins must he buried here.
282 */
283 static unsigned short get_pins(unsigned minor)
284 {
285 volatile struct bpp_regs *base = base_addrs[minor];
286 unsigned short bits = 0;
287 unsigned value_tcr = base->p_tcr;
288 unsigned value_ir = base->p_ir;
289 unsigned value_or = base->p_or;
290
291 if (value_tcr & P_TCR_DS) bits |= BPP_PP_nStrobe;
292 if (value_or & P_OR_AFXN) bits |= BPP_PP_nAutoFd;
293 if (! (value_or & P_OR_INIT)) bits |= BPP_PP_nInit;
294 if (! (value_or & P_OR_SLCT_IN)) bits |= BPP_PP_nSelectIn;
295
296 if (value_ir & P_IR_ERR) bits |= BPP_GP_nFault;
297 if (! (value_ir & P_IR_SLCT)) bits |= BPP_GP_Select;
298 if (! (value_ir & P_IR_PE)) bits |= BPP_GP_PError;
299 if (! (value_tcr & P_TCR_ACK)) bits |= BPP_GP_nAck;
300 if (value_tcr & P_TCR_BUSY) bits |= BPP_GP_Busy;
301
302 return bits;
303 }
304
305 #if 0
306 /* P3 */
307 static inline void bpp_snap(const char *msg, unsigned minor)
308 {
309 volatile struct bpp_regs *r = base_addrs[minor];
310 printk("bpp.%s: c=%02x o=%02x i=%02x\n", msg, r->p_tcr, r->p_or, r->p_ir);
311 }
312 #endif
313
314 #endif /* __sparc__ */
315
316 static void bpp_wake_up(unsigned long val)
317 { wake_up(&instances[val].wait_queue); }
318
319 static void snooze(unsigned long snooze_time, unsigned minor)
320 {
321 instances[minor].timer_list.expires = jiffies + snooze_time + 1;
322 instances[minor].timer_list.data = minor;
323 add_timer(&instances[minor].timer_list);
324 sleep_on (&instances[minor].wait_queue);
325 }
326
327 static int wait_for(unsigned short set, unsigned short clr,
328 unsigned long delay, unsigned minor)
329 {
330 unsigned short pins = get_pins(minor);
331
332 unsigned long extime = 0;
333
334 /*
335 * Try a real fast scan for the first jiffy, in case the device
336 * responds real good. The first while loop guesses an expire
337 * time accounting for possible wraparound of jiffies.
338 */
339 while (time_after_eq(jiffies, extime)) extime = jiffies + 1;
340 while ( (time_before(jiffies, extime))
341 && (((pins & set) != set) || ((pins & clr) != 0)) ) {
342 pins = get_pins(minor);
343 }
344
345 delay -= 1;
346
347 /*
348 * If my delay expired or the pins are still not where I want
349 * them, then resort to using the timer and greatly reduce my
350 * sample rate. If the peripheral is going to be slow, this will
351 * give the CPU up to some more worthy process.
352 */
353 while ( delay && (((pins & set) != set) || ((pins & clr) != 0)) ) {
354
355 snooze(1, minor);
356 pins = get_pins(minor);
357 delay -= 1;
358 }
359
360 if (delay == 0) return -1;
361 else return pins;
362 }
363
364 /*
365 * Return ZERO(0) If the negotiation succeeds, an errno otherwise. An
366 * errno means something broke, and I do not yet know how to fix it.
367 */
368 static int negotiate(unsigned char mode, unsigned minor)
369 {
370 int rc;
371 unsigned short pins = get_pins(minor);
372 if (pins & BPP_PP_nSelectIn) return -EIO;
373
374
375 /* Event 0: Write the mode to the data lines */
376 bpp_outb_p(mode, base_addrs[minor]);
377
378 snooze(TIME_PSetup, minor);
379
380 /* Event 1: Strobe the mode code into the peripheral */
381 set_pins(BPP_PP_nSelectIn|BPP_PP_nStrobe|BPP_PP_nInit, minor);
382
383 /* Wait for Event 2: Peripheral responds as a 1284 device. */
384 rc = wait_for(BPP_GP_PError|BPP_GP_Select|BPP_GP_nFault,
385 BPP_GP_nAck,
386 TIME_PResponse,
387 minor);
388
389 if (rc == -1) return -ETIMEDOUT;
390
391 /* Event 3: latch extensibility request */
392 set_pins(BPP_PP_nSelectIn|BPP_PP_nInit, minor);
393
394 /* ... quick nap while peripheral ponders the byte i'm sending...*/
395 snooze(1, minor);
396
397 /* Event 4: restore strobe, to ACK peripheral's response. */
398 set_pins(BPP_PP_nSelectIn|BPP_PP_nAutoFd|BPP_PP_nStrobe|BPP_PP_nInit, minor);
399
400 /* Wait for Event 6: Peripheral latches response bits */
401 rc = wait_for(BPP_GP_nAck, 0, TIME_PSetup+TIME_PResponse, minor);
402 if (rc == -1) return -EIO;
403
404 /* A 1284 device cannot refuse nibble mode */
405 if (mode == DEFAULT_NIBBLE) return 0;
406
407 if (pins & BPP_GP_Select) return 0;
408
409 return -EPROTONOSUPPORT;
410 }
411
412 static int terminate(unsigned minor)
413 {
414 int rc;
415
416 /* Event 22: Request termination of 1284 mode */
417 set_pins(BPP_PP_nAutoFd|BPP_PP_nStrobe|BPP_PP_nInit, minor);
418
419 /* Wait for Events 23 and 24: ACK termination request. */
420 rc = wait_for(BPP_GP_Busy|BPP_GP_nFault,
421 BPP_GP_nAck,
422 TIME_PSetup+TIME_PResponse,
423 minor);
424
425 instances[minor].direction = 0;
426 instances[minor].mode = COMPATIBILITY;
427
428 if (rc == -1) {
429 return -EIO;
430 }
431
432 /* Event 25: Handshake by lowering nAutoFd */
433 set_pins(BPP_PP_nStrobe|BPP_PP_nInit, minor);
434
435 /* Event 26: Peripheral wiggles lines... */
436
437 /* Event 27: Peripheral sets nAck HIGH to ack handshake */
438 rc = wait_for(BPP_GP_nAck, 0, TIME_PResponse, minor);
439 if (rc == -1) {
440 set_pins(BPP_PP_nAutoFd|BPP_PP_nStrobe|BPP_PP_nInit, minor);
441 return -EIO;
442 }
443
444 /* Event 28: Finish phase by raising nAutoFd */
445 set_pins(BPP_PP_nAutoFd|BPP_PP_nStrobe|BPP_PP_nInit, minor);
446
447 return 0;
448 }
449
450
451 /*
452 * Allow only one process to open the device at a time.
453 */
454 static int bpp_open(struct inode *inode, struct file *f)
455 {
456 unsigned minor = MINOR(inode->i_rdev);
457 if (minor >= BPP_NO) return -ENODEV;
458 if (! instances[minor].present) return -ENODEV;
459 if (instances[minor].opened) return -EBUSY;
460
461 instances[minor].opened = 1;
462
463 return 0;
464 }
465
466 /*
467 * When the process closes the device, this method is called to clean
468 * up and reset the hardware. Always leave the device in compatibility
469 * mode as this is a reasonable place to clean up from messes made by
470 * ioctls, or other mayhem.
471 */
472 static int bpp_release(struct inode *inode, struct file *f)
473 {
474 unsigned minor = MINOR(inode->i_rdev);
475 instances[minor].opened = 0;
476
477 if (instances[minor].mode != COMPATIBILITY)
478 terminate(minor);
479 return 0;
480 }
481
482 static long read_nibble(unsigned minor, char *c, unsigned long cnt)
483 {
484 unsigned long remaining = cnt;
485 long rc;
486
487 while (remaining > 0) {
488 unsigned char byte = 0;
489 int pins;
490
491 /* Event 7: request nibble */
492 set_pins(BPP_PP_nSelectIn|BPP_PP_nStrobe, minor);
493
494 /* Wait for event 9: Peripher strobes first nibble */
495 pins = wait_for(0, BPP_GP_nAck, TIME_IDLE_LIMIT, minor);
496 if (pins == -1) return -ETIMEDOUT;
497
498 /* Event 10: I handshake nibble */
499 set_pins(BPP_PP_nSelectIn|BPP_PP_nStrobe|BPP_PP_nAutoFd, minor);
500 if (pins & BPP_GP_nFault) byte |= 0x01;
501 if (pins & BPP_GP_Select) byte |= 0x02;
502 if (pins & BPP_GP_PError) byte |= 0x04;
503 if (pins & BPP_GP_Busy) byte |= 0x08;
504
505 /* Wait for event 11: Peripheral handshakes nibble */
506 rc = wait_for(BPP_GP_nAck, 0, TIME_PResponse, minor);
507
508 /* Event 7: request nibble */
509 set_pins(BPP_PP_nSelectIn|BPP_PP_nStrobe, minor);
510
511 /* Wait for event 9: Peripher strobes first nibble */
512 pins = wait_for(0, BPP_GP_nAck, TIME_PResponse, minor);
513 if (rc == -1) return -ETIMEDOUT;
514
515 /* Event 10: I handshake nibble */
516 set_pins(BPP_PP_nSelectIn|BPP_PP_nStrobe|BPP_PP_nAutoFd, minor);
517 if (pins & BPP_GP_nFault) byte |= 0x10;
518 if (pins & BPP_GP_Select) byte |= 0x20;
519 if (pins & BPP_GP_PError) byte |= 0x40;
520 if (pins & BPP_GP_Busy) byte |= 0x80;
521
522 put_user_ret(byte, c, -EFAULT);
523 c += 1;
524 remaining -= 1;
525
526 /* Wait for event 11: Peripheral handshakes nibble */
527 rc = wait_for(BPP_GP_nAck, 0, TIME_PResponse, minor);
528 if (rc == -1) return -EIO;
529 }
530
531 return cnt - remaining;
532 }
533
534 static long read_ecp(unsigned minor, char *c, unsigned long cnt)
535 {
536 unsigned long remaining;
537 long rc;
538
539 /* Turn ECP mode from forward to reverse if needed. */
540 if (! instances[minor].direction) {
541 unsigned short pins = get_pins(minor);
542
543 /* Event 38: Turn the bus around */
544 instances[minor].direction = 0x20;
545 pins &= ~BPP_PP_nAutoFd;
546 set_pins(pins, minor);
547
548 /* Event 39: Set pins for reverse mode. */
549 snooze(TIME_PSetup, minor);
550 set_pins(BPP_PP_nStrobe|BPP_PP_nSelectIn, minor);
551
552 /* Wait for event 40: Peripheral ready to be strobed */
553 rc = wait_for(0, BPP_GP_PError, TIME_PResponse, minor);
554 if (rc == -1) return -ETIMEDOUT;
555 }
556
557 remaining = cnt;
558
559 while (remaining > 0) {
560
561 /* If there is a run length for a repeated byte, repeat */
562 /* that byte a few times. */
563 if (instances[minor].run_length && !instances[minor].run_flag) {
564
565 char buffer[128];
566 unsigned idx;
567 unsigned repeat = remaining < instances[minor].run_length
568 ? remaining
569 : instances[minor].run_length;
570
571 for (idx = 0 ; idx < repeat ; idx += 1)
572 buffer[idx] = instances[minor].repeat_byte;
573
574 copy_to_user_ret(c, buffer, repeat, -EFAULT);
575 remaining -= repeat;
576 c += repeat;
577 instances[minor].run_length -= repeat;
578 }
579
580 if (remaining == 0) break;
581
582
583 /* Wait for Event 43: Data active on the bus. */
584 rc = wait_for(0, BPP_GP_nAck, TIME_IDLE_LIMIT, minor);
585 if (rc == -1) break;
586
587 if (rc & BPP_GP_Busy) {
588 /* OK, this is data. read it in. */
589 unsigned char byte = bpp_inb(base_addrs[minor]);
590 put_user_ret(byte, c, -EFAULT);
591 c += 1;
592 remaining -= 1;
593
594 if (instances[minor].run_flag) {
595 instances[minor].repeat_byte = byte;
596 instances[minor].run_flag = 0;
597 }
598
599 } else {
600 unsigned char byte = bpp_inb(base_addrs[minor]);
601 if (byte & 0x80) {
602 printk("bpp%d: "
603 "Ignoring ECP channel %u from device.\n",
604 minor, byte & 0x7f);
605 } else {
606 instances[minor].run_length = byte;
607 instances[minor].run_flag = 1;
608 }
609 }
610
611 /* Event 44: I got it. */
612 set_pins(BPP_PP_nStrobe|BPP_PP_nAutoFd|BPP_PP_nSelectIn, minor);
613
614 /* Wait for event 45: peripheral handshake */
615 rc = wait_for(BPP_GP_nAck, 0, TIME_PResponse, minor);
616 if (rc == -1) return -ETIMEDOUT;
617
618 /* Event 46: Finish handshake */
619 set_pins(BPP_PP_nStrobe|BPP_PP_nSelectIn, minor);
620
621 }
622
623
624 return cnt - remaining;
625 }
626
627 static ssize_t bpp_read(struct file *f, char *c, size_t cnt, loff_t * ppos)
628 {
629 long rc;
630 const unsigned minor = MINOR(f->f_dentry->d_inode->i_rdev);
631 if (minor >= BPP_NO) return -ENODEV;
632 if (!instances[minor].present) return -ENODEV;
633
634 switch (instances[minor].mode) {
635
636 default:
637 if (instances[minor].mode != COMPATIBILITY)
638 terminate(minor);
639
640 if (instances[minor].enhanced) {
641 /* For now, do all reads with ECP-RLE mode */
642 unsigned short pins;
643
644 rc = negotiate(DEFAULT_ECP, minor);
645 if (rc < 0) break;
646
647 instances[minor].mode = ECP_RLE;
648
649 /* Event 30: set nAutoFd low to setup for ECP mode */
650 pins = get_pins(minor);
651 pins &= ~BPP_PP_nAutoFd;
652 set_pins(pins, minor);
653
654 /* Wait for Event 31: peripheral ready */
655 rc = wait_for(BPP_GP_PError, 0, TIME_PResponse, minor);
656 if (rc == -1) return -ETIMEDOUT;
657
658 rc = read_ecp(minor, c, cnt);
659
660 } else {
661 rc = negotiate(DEFAULT_NIBBLE, minor);
662 if (rc < 0) break;
663
664 instances[minor].mode = NIBBLE;
665
666 rc = read_nibble(minor, c, cnt);
667 }
668 break;
669
670 case NIBBLE:
671 rc = read_nibble(minor, c, cnt);
672 break;
673
674 case ECP:
675 case ECP_RLE:
676 rc = read_ecp(minor, c, cnt);
677 break;
678
679 }
680
681
682 return rc;
683 }
684
685 /*
686 * Compatibility mode handshaking is a matter of writing data,
687 * strobing it, and waiting for the printer to stop being busy.
688 */
689 static long write_compat(unsigned minor, const char *c, unsigned long cnt)
690 {
691 long rc;
692 unsigned short pins = get_pins(minor);
693
694 unsigned long remaining = cnt;
695
696
697 while (remaining > 0) {
698 unsigned char byte;
699
700 get_user_ret(byte, c, -EFAULT);
701 c += 1;
702
703 rc = wait_for(BPP_GP_nAck, BPP_GP_Busy, TIME_IDLE_LIMIT, minor);
704 if (rc == -1) return -ETIMEDOUT;
705
706 bpp_outb_p(byte, base_addrs[minor]);
707 remaining -= 1;
708 /* snooze(1, minor); */
709
710 pins &= ~BPP_PP_nStrobe;
711 set_pins(pins, minor);
712
713 rc = wait_for(BPP_GP_Busy, 0, TIME_PResponse, minor);
714
715 pins |= BPP_PP_nStrobe;
716 set_pins(pins, minor);
717 }
718
719 return cnt - remaining;
720 }
721
722 /*
723 * Write data using ECP mode. Watch out that the port may be set up
724 * for reading. If so, turn the port around.
725 */
726 static long write_ecp(unsigned minor, const char *c, unsigned long cnt)
727 {
728 unsigned short pins = get_pins(minor);
729 unsigned long remaining = cnt;
730
731 if (instances[minor].direction) {
732 int rc;
733
734 /* Event 47 Request bus be turned around */
735 pins |= BPP_PP_nInit;
736 set_pins(pins, minor);
737
738 /* Wait for Event 49: Peripheral relinquished bus */
739 rc = wait_for(BPP_GP_PError, 0, TIME_PResponse, minor);
740
741 pins |= BPP_PP_nAutoFd;
742 instances[minor].direction = 0;
743 set_pins(pins, minor);
744 }
745
746 while (remaining > 0) {
747 unsigned char byte;
748 int rc;
749
750 get_user_ret(byte, c, -EFAULT);
751
752 rc = wait_for(0, BPP_GP_Busy, TIME_PResponse, minor);
753 if (rc == -1) return -ETIMEDOUT;
754
755 c += 1;
756
757 bpp_outb_p(byte, base_addrs[minor]);
758
759 pins &= ~BPP_PP_nStrobe;
760 set_pins(pins, minor);
761
762 pins |= BPP_PP_nStrobe;
763 rc = wait_for(BPP_GP_Busy, 0, TIME_PResponse, minor);
764 if (rc == -1) return -EIO;
765
766 set_pins(pins, minor);
767 }
768
769 return cnt - remaining;
770 }
771
772 /*
773 * Write to the peripheral. Be sensitive of the current mode. If I'm
774 * in a mode that can be turned around (ECP) then just do
775 * that. Otherwise, terminate and do my writing in compat mode. This
776 * is the safest course as any device can handle it.
777 */
778 static ssize_t bpp_write(struct file *f, const char *c, size_t cnt, loff_t * ppos)
779 {
780 long errno = 0;
781 const unsigned minor = MINOR(f->f_dentry->d_inode->i_rdev);
782 if (minor >= BPP_NO) return -ENODEV;
783 if (!instances[minor].present) return -ENODEV;
784
785 switch (instances[minor].mode) {
786
787 case ECP:
788 case ECP_RLE:
789 errno = write_ecp(minor, c, cnt);
790 break;
791 case COMPATIBILITY:
792 errno = write_compat(minor, c, cnt);
793 break;
794 default:
795 terminate(minor);
796 errno = write_compat(minor, c, cnt);
797 }
798
799 return errno;
800 }
801
802 static int bpp_ioctl(struct inode *inode, struct file *f, unsigned int cmd,
803 unsigned long arg)
804 {
805 int errno = 0;
806
807 unsigned minor = MINOR(inode->i_rdev);
808 if (minor >= BPP_NO) return -ENODEV;
809 if (!instances[minor].present) return -ENODEV;
810
811
812 switch (cmd) {
813
814 case BPP_PUT_PINS:
815 set_pins(arg, minor);
816 break;
817
818 case BPP_GET_PINS:
819 errno = get_pins(minor);
820 break;
821
822 case BPP_PUT_DATA:
823 bpp_outb_p(arg, base_addrs[minor]);
824 break;
825
826 case BPP_GET_DATA:
827 errno = bpp_inb_p(base_addrs[minor]);
828 break;
829
830 case BPP_SET_INPUT:
831 if (arg)
832 if (instances[minor].enhanced) {
833 unsigned short bits = get_pins(minor);
834 instances[minor].direction = 0x20;
835 set_pins(bits, minor);
836 } else {
837 errno = -ENOTTY;
838 }
839 else {
840 unsigned short bits = get_pins(minor);
841 instances[minor].direction = 0x00;
842 set_pins(bits, minor);
843 }
844 break;
845
846 default:
847 errno = -EINVAL;
848 }
849
850 return errno;
851 }
852
853 static struct file_operations bpp_fops = {
854 NULL, /* bpp_lseek */
855 bpp_read,
856 bpp_write,
857 NULL, /* bpp_readdir */
858 NULL, /* bpp_select */
859 bpp_ioctl,
860 NULL, /* bpp_mmap */
861 bpp_open,
862 NULL, /* flush */
863 bpp_release,
864 NULL, /* fsync */
865 NULL, /* fasync */
866 NULL, /* check media change */
867 NULL, /* revalidate */
868 NULL, /* lock */
869 };
870
871 #if defined(__i386__)
872
873 #define collectLptPorts() {}
874
875 static void probeLptPort(unsigned idx)
876 {
877 unsigned int testvalue;
878 const unsigned short lpAddr = base_addrs[idx];
879
880 instances[idx].present = 0;
881 instances[idx].enhanced = 0;
882 instances[idx].direction = 0;
883 instances[idx].mode = COMPATIBILITY;
884 instances[idx].wait_queue = 0;
885 instances[idx].run_length = 0;
886 instances[idx].run_flag = 0;
887 init_timer(&instances[idx].timer_list);
888 instances[idx].timer_list.function = bpp_wake_up;
889 if (check_region(lpAddr,3)) return;
890
891 /*
892 * First, make sure the instance exists. Do this by writing to
893 * the data latch and reading the value back. If the port *is*
894 * present, test to see if it supports extended-mode
895 * operation. This will be required for IEEE1284 reverse
896 * transfers.
897 */
898
899 outb_p(BPP_PROBE_CODE, lpAddr);
900 for (testvalue=0; testvalue<BPP_DELAY; testvalue++)
901 ;
902 testvalue = inb_p(lpAddr);
903 if (testvalue == BPP_PROBE_CODE) {
904 unsigned save;
905 instances[idx].present = 1;
906
907 request_region(lpAddr,3, dev_name);
908 save = inb_p(lpAddr+2);
909 for (testvalue=0; testvalue<BPP_DELAY; testvalue++)
910 ;
911 outb_p(save|0x20, lpAddr+2);
912 for (testvalue=0; testvalue<BPP_DELAY; testvalue++)
913 ;
914 outb_p(~BPP_PROBE_CODE, lpAddr);
915 for (testvalue=0; testvalue<BPP_DELAY; testvalue++)
916 ;
917 testvalue = inb_p(lpAddr);
918 if ((testvalue&0xff) == (0xff&~BPP_PROBE_CODE))
919 instances[idx].enhanced = 0;
920 else
921 instances[idx].enhanced = 1;
922 outb_p(save, lpAddr+2);
923 }
924
925 /*
926 * Leave the port in compat idle mode.
927 */
928 set_pins(BPP_PP_nAutoFd|BPP_PP_nStrobe|BPP_PP_nInit, idx);
929
930 printk("bpp%d: Port at 0x%03x: Enhanced mode %s\n", idx, base_addrs[idx],
931 instances[idx].enhanced? "SUPPORTED" : "UNAVAILABLE");
932 }
933
934 static inline void freeLptPort(int idx)
935 {
936 release_region(base_addrs[idx], 3);
937 }
938
939 #endif
940
941 #if defined(__sparc__)
942
943 static volatile struct bpp_regs *map_bpp(struct linux_sbus_device *dev, int idx)
944 {
945 volatile struct bpp_regs *regs;
946
947 /*
948 * PROM reports different numbers on Zebra and on DMA2.
949 * We need to figure out when to apply parent ranges.
950 * printk will show this on different machines.
951 */
952
953 /* IPC Zebra 1.fa200000[1c] i=2 */
954 prom_apply_sbus_ranges(dev->my_bus, &dev->reg_addrs[0],
955 dev->num_registers, dev);
956
957 regs = sparc_alloc_io(dev->reg_addrs[0].phys_addr, 0,
958 dev->reg_addrs[0].reg_size, "bpp",
959 dev->reg_addrs[0].which_io, 0x0);
960 printk("bpp%d.map_bpp: 0x%x.%p[0x%x] i=%d\n", idx,
961 dev->reg_addrs[0].which_io, dev->reg_addrs[0].phys_addr,
962 dev->reg_addrs[0].reg_size, dev->irqs[0]);
963
964 return regs;
965 }
966
967 static int collectLptPorts(void)
968 {
969 struct linux_sbus *bus;
970 struct linux_sbus_device *dev;
971 int count;
972
973 count = 0;
974 for_all_sbusdev(dev, bus) {
975 if (strcmp(dev->prom_name, "SUNW,bpp") == 0) {
976 if (count >= BPP_NO) {
977 printk(KERN_NOTICE
978 "bpp: More than %d bpp ports,"
979 " rest is ignored\n", BPP_NO);
980 return count;
981 }
982 base_addrs[count] = map_bpp(dev, count);
983 count++;
984 }
985 }
986 return count;
987 }
988
989 static void probeLptPort(unsigned idx)
990 {
991 volatile struct bpp_regs *rp = base_addrs[idx];
992 __u32 csr;
993 char *brand;
994
995 instances[idx].present = 0;
996 instances[idx].enhanced = 0;
997 instances[idx].direction = 0;
998 instances[idx].mode = COMPATIBILITY;
999 init_waitqueue_head(&instances[idx].wait_queue);
1000 instances[idx].run_length = 0;
1001 instances[idx].run_flag = 0;
1002 init_timer(&instances[idx].timer_list);
1003 instances[idx].timer_list.function = bpp_wake_up;
1004
1005 if (rp == 0) return;
1006
1007 instances[idx].present = 1;
1008 instances[idx].enhanced = 1; /* Sure */
1009
1010 if (((csr = rp->p_csr) & P_DRAINING) != 0 && (csr & P_ERR_PEND) == 0) {
1011 udelay(20);
1012 csr = rp->p_csr;
1013 if ((csr & P_DRAINING) != 0 && (csr & P_ERR_PEND) == 0) {
1014 printk("bpp%d: DRAINING still active (0x%08x)\n", idx, csr);
1015 }
1016 }
1017 printk("bpp%d: reset with 0x%08x ..", idx, csr);
1018 rp->p_csr = (csr | P_RESET) & ~P_INT_EN;
1019 udelay(500);
1020 rp->p_csr &= ~P_RESET;
1021 printk(" done with csr=0x%08x ocr=0x%04x\n", rp->p_csr, rp->p_ocr);
1022
1023 switch (rp->p_csr & P_DEV_ID_MASK) {
1024 case P_DEV_ID_ZEBRA:
1025 brand = "Zebra";
1026 break;
1027 case P_DEV_ID_L64854:
1028 brand = "DMA2";
1029 break;
1030 default:
1031 brand = "Unknown";
1032 }
1033 printk("bpp%d: %s at 0x%p\n", idx, brand, rp);
1034
1035 /*
1036 * Leave the port in compat idle mode.
1037 */
1038 set_pins(BPP_PP_nAutoFd|BPP_PP_nStrobe|BPP_PP_nInit, idx);
1039
1040 return;
1041 }
1042
1043 static inline void freeLptPort(int idx)
1044 {
1045 sparc_free_io ((void *)base_addrs[idx], sizeof(struct bpp_regs));
1046 }
1047
1048 #endif
1049
1050 #ifdef MODULE
1051 int init_module(void)
1052 #else
1053 int __init bpp_init(void)
1054 #endif
1055 {
1056 int rc;
1057 unsigned idx;
1058
1059 rc = collectLptPorts();
1060 if (rc == 0)
1061 return -ENODEV;
1062
1063 rc = register_chrdev(BPP_MAJOR, dev_name, &bpp_fops);
1064 if (rc < 0)
1065 return rc;
1066
1067 for (idx = 0; idx < BPP_NO; idx += 1) {
1068 instances[idx].opened = 0;
1069 probeLptPort(idx);
1070 }
1071
1072 return 0;
1073 }
1074
1075 #ifdef MODULE
1076 void cleanup_module(void)
1077 {
1078 unsigned idx;
1079
1080 unregister_chrdev(BPP_MAJOR, dev_name);
1081
1082 for (idx = 0 ; idx < BPP_NO ; idx += 1) {
1083 if (instances[idx].present)
1084 freeLptPort(idx);
1085 }
1086 }
1087 #endif