2 * include/asm-m68k/cache.h
4 #ifndef __ARCH_M68K_CACHE_H
5 #define __ARCH_M68K_CACHE_H
7 /* bytes per L1 cache line */
8 #define L1_CACHE_BYTES 16
10 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
12 #define SMP_CACHE_BYTES L1_CACHE_BYTES
15 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES)))
17 #define __cacheline_aligned \
18 __attribute__((__aligned__(L1_CACHE_BYTES), \
19 __section__(".data.cacheline_aligned")))